S.L. Tan, KH Toh, J. Phang, D.S.H. Chan, C. Chua, L. Koh
{"title":"A Near-Infrared, Continuous Wavelength, In-Lens Spectroscopic Photon Emission Microscope System","authors":"S.L. Tan, KH Toh, J. Phang, D.S.H. Chan, C. Chua, L. Koh","doi":"10.1109/IPFA.2007.4378092","DOIUrl":"https://doi.org/10.1109/IPFA.2007.4378092","url":null,"abstract":"A near-infrared continuous wavelength, in-lens spectroscopic photon emission microscope has been developed. The dispersive element is a three-element prism which has been specially designed to disperse light from 0.9 mum to 1.6 mum about the optical axis. The system has been used to perform frontside and backside spectroscopy on forward and reverse-biased p-n junctions and saturated nMOSFETs. The difference in the frontside and backside spectra is due to the \"silicon filter effect\" for the backside spectra and the optical effects of the dielectrics for the frontside spectra.","PeriodicalId":334987,"journal":{"name":"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132627439","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Advanced π-FET Technology for 45 nm Technology Node","authors":"Y. Eng, Jyi-Tsong Lin","doi":"10.1109/IPFA.2007.4378081","DOIUrl":"https://doi.org/10.1109/IPFA.2007.4378081","url":null,"abstract":"In this study, the enhancement of pi-FET performance using optimized parameters is designed to investigate the electrical characteristics as a function of the BOI length (LBOI) under the body region. Additionally, the SOI devices (FDSOI-FET and UTBSOI-FET) are also designed for the comparison with the pi-FET by using ISE TCAD tools.","PeriodicalId":334987,"journal":{"name":"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134268862","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
G. Groeseneken, R. Degraeve, B. Kaczer, P. Roussel
{"title":"Challenges in Reliability Assessment of Advanced CMOS Technologies","authors":"G. Groeseneken, R. Degraeve, B. Kaczer, P. Roussel","doi":"10.1109/IPFA.2007.4378048","DOIUrl":"https://doi.org/10.1109/IPFA.2007.4378048","url":null,"abstract":"In this paper it was demonstrated that by applying the classical way of reliability lifetime prediction, the reliability of a product can no longer be guaranteed in some cases and for some failure mechanisms. This is caused by reduced reliability margins under the influence of increasing fields, current and power densities on the one hand, by introduction of new materials and devices on the other hand, and by ever increasing failure rate requirements imposed by the market. As a result, the reliability engineers have started to rethink the classical reliability assessment methodology. By taking into account the changes in failure behavior and statistics under influence of scaling trends, and analyzing the impact of such failures on the device and circuit operation, new reliability margins can be gained. This will, however, require more interaction between technology, reliability and design engineers, in order to define realistic failure specifications and new chip failure criteria for each type of circuit. In this paper some elements of such a new reliability assessment methodology have been demonstrated by using oxide breakdown as the failure mechanism for a case study where the classical reliability margins are already reduced to zero. It is expected, however, that for most of the other failure mechanisms a similar trend will emerge, and similar solutions, requiring the interaction with design engineers, will be necessary.","PeriodicalId":334987,"journal":{"name":"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"18 10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127612886","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design for Reliability (DfR) in MEMS using Worst-Case Methods","authors":"S. Praveen, S. Lavu, R. Laur","doi":"10.1109/IPFA.2007.4378098","DOIUrl":"https://doi.org/10.1109/IPFA.2007.4378098","url":null,"abstract":"The growing applications of microsystem devices in extreme environments have a great impact on the rising importance of their reliability studies. Reliability study in MEMS lacks the availability of methods and tools to analyze them in a quick and efficient way. In this paper, we present a novel approach for reliability analysis in MEMS using worst-case methods. The method facilitates the designers to find out the critical operational parameters of the device with respect to a particular functional specification. This paper also introduces a reliability coefficient instigated from an inherent advantage of the worst-case methods.","PeriodicalId":334987,"journal":{"name":"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"83 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121058414","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
P. Chaparala, D. Brisbin, Jonggook Kim, Barry OConnell
{"title":"Reliability Challenges in Analog and Mixed Signal Technologies","authors":"P. Chaparala, D. Brisbin, Jonggook Kim, Barry OConnell","doi":"10.1109/IPFA.2007.4378073","DOIUrl":"https://doi.org/10.1109/IPFA.2007.4378073","url":null,"abstract":"Unique analog product application requirements such as high speed, low noise, low power, high precision and high voltage demand complex analog process technologies. This complexity poses several reliability challenges that are specific to each technology. In this paper some of the key reliability mechanisms in most common analog process technologies are highlighted. To meet broad range of analog IC reliability requirements, in-depth device reliability characterization is essential besides the traditional process reliability qualification.","PeriodicalId":334987,"journal":{"name":"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121201452","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Application of Time Domain Reflectometry in Evaluating Irregular Inter-metallic Compound Growth in Gold Wire Bonds Encapsulated with Green Epoxy Mold Compound","authors":"Jason Wong, Alvin Seah, Spencer Chew","doi":"10.1109/IPFA.2007.4378085","DOIUrl":"https://doi.org/10.1109/IPFA.2007.4378085","url":null,"abstract":"In this paper, we have successfully used the comparative TDR technique as a means to detect and locate intermittent electrical failures in various packaged devices caused by weak interconnect interfaces or transmission traces that are degraded due to electromigration or intermetallic diffusion processes. A series of different common fail signatures from the resultant TDR waveforms can be correlated with cross section images of weak interconnect interfaces will be shared.","PeriodicalId":334987,"journal":{"name":"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125288556","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Extensive Reliability Analysis of Tungsten Dot NC Devices Embedded in HfAlO High-k Dielectric under NAND (FN/FN) Operation","authors":"P.K. Singh, A. Nainani","doi":"10.1109/IPFA.2007.4378084","DOIUrl":"https://doi.org/10.1109/IPFA.2007.4378084","url":null,"abstract":"In this work we present an extensive reliability and performance evaluation of tungsten dot nanocrystal (NC) devices under NAND mode of operation. Improvement in performance and reliability was observed with scaling W and L. The use of better high-k processing is proposed to improve the reliability. We also propose a numerical simulation model for NC memory devices using transient capacitive charging model. The approach is very generic and computationally less extensive than the previous works.","PeriodicalId":334987,"journal":{"name":"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"56 4","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113981585","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"New Hot-Carrier Lifetime Technique for High- to Low-Supplied Voltage nMOSFETs","authors":"C. Guérin, C. Parthasarathy, V. Huard, A. Bravaix","doi":"10.1109/IPFA.2007.4378079","DOIUrl":"https://doi.org/10.1109/IPFA.2007.4378079","url":null,"abstract":"In this paper, we propose to distinguish the distinct carrier degradation modes as a function of the energy range developing a complete lifetime extrapolation technique down to the low voltage operation. This provides a starting point of a more accurate modeling of CHC effects during product operations. This work shows that CHC effects in nMOSFET consist in three different regimes depending on the gate voltage (Vg). A simple way to extrapolate lifetime at nominal bias conditions from data get under accelerated stress conditions was detailed for each regime. We also propose an answer to the contradictory debate of the respective contributions of electron-electron scattering (EES) (Rauch et al., 2001) and the multiple vibrational excitation (MVE) (Hess et al., 1999) to CHC effects in the low energy range.","PeriodicalId":334987,"journal":{"name":"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114275522","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Impact of Front End Processing on Gate Oxide Reliability","authors":"K. Ahmed","doi":"10.1109/IPFA.2007.4378078","DOIUrl":"https://doi.org/10.1109/IPFA.2007.4378078","url":null,"abstract":"In the past decade, SiON films with N content less than 15% at. have enabled scaling of CMOS devices down to 65nm node. The introduction of new materials (e.g. high-k, metal electrodes) and integration flows resulted in new device and circuit reliability issues. Innovation in process, integration and manufacturing equipment, in addition to acceleration of understanding of reliability physics for these new materials, are necessary in order to meet product reliability and performance specifications.","PeriodicalId":334987,"journal":{"name":"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"161 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114243380","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
B. Caillard, C. Pellet, A. Touboul, Y. Mita, H. Fujita
{"title":"Electrical OverStress/ElectroStatic Discharges (EOS/ESD) Specificities in MEMS: Outline of a Protection Strategy","authors":"B. Caillard, C. Pellet, A. Touboul, Y. Mita, H. Fujita","doi":"10.1109/IPFA.2007.4378067","DOIUrl":"https://doi.org/10.1109/IPFA.2007.4378067","url":null,"abstract":"In this paper, increased EOS/ESD concerns related to MEMS structural specificities are indexed and general works about failures and reliability improvement in MEMS are reviewed from an EOS/ESD point of view, as well as existing protection methods. Then a new method is proposed and recommandations for a general scheme for MEMS protection are suggested.","PeriodicalId":334987,"journal":{"name":"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116410932","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}