{"title":"45纳米节点先进π-FET技术","authors":"Y. Eng, Jyi-Tsong Lin","doi":"10.1109/IPFA.2007.4378081","DOIUrl":null,"url":null,"abstract":"In this study, the enhancement of pi-FET performance using optimized parameters is designed to investigate the electrical characteristics as a function of the BOI length (LBOI) under the body region. Additionally, the SOI devices (FDSOI-FET and UTBSOI-FET) are also designed for the comparison with the pi-FET by using ISE TCAD tools.","PeriodicalId":334987,"journal":{"name":"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Advanced π-FET Technology for 45 nm Technology Node\",\"authors\":\"Y. Eng, Jyi-Tsong Lin\",\"doi\":\"10.1109/IPFA.2007.4378081\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this study, the enhancement of pi-FET performance using optimized parameters is designed to investigate the electrical characteristics as a function of the BOI length (LBOI) under the body region. Additionally, the SOI devices (FDSOI-FET and UTBSOI-FET) are also designed for the comparison with the pi-FET by using ISE TCAD tools.\",\"PeriodicalId\":334987,\"journal\":{\"name\":\"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits\",\"volume\":\"9 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-07-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IPFA.2007.4378081\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPFA.2007.4378081","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Advanced π-FET Technology for 45 nm Technology Node
In this study, the enhancement of pi-FET performance using optimized parameters is designed to investigate the electrical characteristics as a function of the BOI length (LBOI) under the body region. Additionally, the SOI devices (FDSOI-FET and UTBSOI-FET) are also designed for the comparison with the pi-FET by using ISE TCAD tools.