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2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits最新文献

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Use of Nanoprobing as the Diagnostic Tool for Nanoscaled Devices 纳米探针作为纳米器件诊断工具的应用
2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 2007-07-11 DOI: 10.1109/IPFA.2007.4378057
S. Toh, Z. Mai, P. K. Tan, E. Hendarto, H. Tan, Q.F. Wang, J.L. Cai, Q. Deng, T. H. Ng, Y. W. Goh, J. Lam, L. Hsia
{"title":"Use of Nanoprobing as the Diagnostic Tool for Nanoscaled Devices","authors":"S. Toh, Z. Mai, P. K. Tan, E. Hendarto, H. Tan, Q.F. Wang, J.L. Cai, Q. Deng, T. H. Ng, Y. W. Goh, J. Lam, L. Hsia","doi":"10.1109/IPFA.2007.4378057","DOIUrl":"https://doi.org/10.1109/IPFA.2007.4378057","url":null,"abstract":"Nanoprobing plays a crucial role for failure analysis (FA) in the nanometer-region generation nodes by having the capability to detect the failure sites and characterize the electrical behaviour of malfunctional devices for better understanding of the failure mechanisms. It also offers a guide to the necessary physical analysis in identifying the cause of failure. This established electrical failure analysis (EFA) methodology at a localized area helps to accelerate the FA. Its application to few of the front-end issues is highlighted in the paper.","PeriodicalId":334987,"journal":{"name":"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131365145","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Blech Effect in Cu Interconnects with Oxide and Low-k Dielectrics 铜与氧化物和低钾电介质互连中的漂白效应
2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 2007-07-11 DOI: 10.1109/IPFA.2007.4378059
Yuejin Hou, C. Tan
{"title":"Blech Effect in Cu Interconnects with Oxide and Low-k Dielectrics","authors":"Yuejin Hou, C. Tan","doi":"10.1109/IPFA.2007.4378059","DOIUrl":"https://doi.org/10.1109/IPFA.2007.4378059","url":null,"abstract":"This paper investigates the mechanism of the temperature dependence of the Blech product for both the Cu/oxide and Cu/low-k interconnections. Using finite element modeling (FEM), we demonstrate that Blech product should be temperature dependent at high temperature if the inelastic behavior of Cu is considered. This inelastic behavior has not been taken into consideration in the previous works. The simulated Blech product is found to be consistent with the literature reported values.","PeriodicalId":334987,"journal":{"name":"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122293370","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Functional IC analysis through chip backside with nano scale resolution - E-beam probing in FIB trenches to STI level 用纳米级分辨率通过芯片背面分析功能集成电路-电子束探测FIB沟槽至STI水平
2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 2007-07-11 DOI: 10.1109/IPFA.2007.4378053
R. Schlangen, R. Leihkauf, U. Kerst, C. Boit, B. Kruger
{"title":"Functional IC analysis through chip backside with nano scale resolution - E-beam probing in FIB trenches to STI level","authors":"R. Schlangen, R. Leihkauf, U. Kerst, C. Boit, B. Kruger","doi":"10.1109/IPFA.2007.4378053","DOIUrl":"https://doi.org/10.1109/IPFA.2007.4378053","url":null,"abstract":"Successful measurements, applying the EBP to the backside of thinned circuitry, using test structures and commercial chips have been demonstrated. In addition to the well known CCVC a new contrast mechanism named space charge coupled voltage contrast (SCCVC) was detected, which strongly increased the EBP signal measured directly on the transistor source or drain regions. Therefore, measurements are possible as long as the electron beam can be placed on a transistor well area, which is larger than the lower metal lines by a factor of 3. The voltage signal has been produced correctly with 100mV noise margin on one of the test structures and since the coplanarity of the trench bottom to silicon surface is excellent, the same accuracy can be expected for any DUT when the process is properly calibrated. As a result, the presented method is very promising since the lateral resolution potential of an EBP system is only limited by the low energy E-beam diameter. Improvements in this field have not been used to enhance EBP in recent years but even with the present systems, measurements on sub-50nm technology seem to be possible. Furthermore, optical methods are struggling with their resolution limits and therefore backside EBP can become a very powerful method in the near future.","PeriodicalId":334987,"journal":{"name":"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122052494","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 17
Beyond scaling - teaching the old dog some new tricks [Semiconductor technology] 超越规模——教老狗一些新把戏[半导体技术]
2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 2007-07-11 DOI: 10.1109/IPFA.2007.4378071
S. Iyer
{"title":"Beyond scaling - teaching the old dog some new tricks [Semiconductor technology]","authors":"S. Iyer","doi":"10.1109/IPFA.2007.4378071","DOIUrl":"https://doi.org/10.1109/IPFA.2007.4378071","url":null,"abstract":"While the semiconductor industry has been focused on the challenges of scaling, it has become quite apparent that one must take a broader view of delivering productivity and performance gains in this new regime of non- classical scaling. While transistor level and interconnect performance will continue to make strides through the innovative use of stress engineering, novel materials such as high k dielectrics in the front end and low k dielectrics and high conductivity interconnects in the backend, there is much more to be gained by addressing the issues of memory integration, on- chip decoupling and autonomic chip functions.","PeriodicalId":334987,"journal":{"name":"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"5 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130465226","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Hermeticity Testing and Failure Analysis of MEMS Packages MEMS封装的密封性测试与失效分析
2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 2007-07-11 DOI: 10.1109/IPFA.2007.4378075
D. Wolf, A. Jourdain, P. de Moor, H. Tilmans, L. Marchand
{"title":"Hermeticity Testing and Failure Analysis of MEMS Packages","authors":"D. Wolf, A. Jourdain, P. de Moor, H. Tilmans, L. Marchand","doi":"10.1109/IPFA.2007.4378075","DOIUrl":"https://doi.org/10.1109/IPFA.2007.4378075","url":null,"abstract":"Several microsystem applications require hermetic or semi- hermetic packages. It is for this reason mandatory to be able to check the hermeticity of these packages. The standard tests, using gross leak and fine leak, work very well for large cavities, but might give erroneous results for small cavities as typically used for MEMS. We discussed different alternative test methods.","PeriodicalId":334987,"journal":{"name":"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127466430","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 20
Contact level probing and transistor characterization - a new fault isolation technique - for identifying leakage fails 接触级探测和晶体管表征是一种新的故障隔离技术，用于识别泄漏故障
2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 2007-07-11 DOI: 10.1109/IPFA.2007.4378089
M. A. Rao, Foo Seng Wong, A. Tay
{"title":"Contact level probing and transistor characterization - a new fault isolation technique - for identifying leakage fails","authors":"M. A. Rao, Foo Seng Wong, A. Tay","doi":"10.1109/IPFA.2007.4378089","DOIUrl":"https://doi.org/10.1109/IPFA.2007.4378089","url":null,"abstract":"This paper describes how contact level probing and transistor characterization-a new fault isolation technique-helped to identify subtle defects in very large multifinger n-channel transistors. The defects caused leakage fails (0.5 μA to 3 μA) in 95nm technology DRAM devices. After deprocessing the die to contact level, DC probe pads were placed at the contact level by focused ion beam, which avoids having to use expensive nanoprobing tools, such as atomic force probing, to touch the very small contacts.","PeriodicalId":334987,"journal":{"name":"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129820931","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Salicidation Issue in 65nm Technology Development 65纳米技术开发中的盐化问题
2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 2007-07-11 DOI: 10.1109/IPFA.2007.4378055
H. Tan, P. K. Tan, E. Hendarto, S. Toh, Q.F. Wang, J.L. Cai, Q. Deng, T. H. Ng, Y. W. Goh, Z. Mai, J. Lam
{"title":"Salicidation Issue in 65nm Technology Development","authors":"H. Tan, P. K. Tan, E. Hendarto, S. Toh, Q.F. Wang, J.L. Cai, Q. Deng, T. H. Ng, Y. W. Goh, Z. Mai, J. Lam","doi":"10.1109/IPFA.2007.4378055","DOIUrl":"https://doi.org/10.1109/IPFA.2007.4378055","url":null,"abstract":"NiSi has replaced CoSi2 as the salicide material for 65 nm technology and beyond mainly due to its low salicide resistance for the narrow line width structures. However, it may bring along unwanted salicidation, resulting in failed transistors. This paper highlights how unwanted salicidation, also known as Ni piping, is successfully identified by physical and electrical failure analysis techniques.","PeriodicalId":334987,"journal":{"name":"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"21 6","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113978092","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Simple and Direct Method for Interface Characterization of OFETs 一种简单直接的ofet界面表征方法
2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits Pub Date : 2007-07-01 DOI: 10.1109/IPFA.2007.4378107
P. Srinivas, S. P. Tiwari, H. N. Raval, R. Ramesh, T. Cahyadi, S. Mhaisalkar, V. Rao
{"title":"A Simple and Direct Method for Interface Characterization of OFETs","authors":"P. Srinivas, S. P. Tiwari, H. N. Raval, R. Ramesh, T. Cahyadi, S. Mhaisalkar, V. Rao","doi":"10.1109/IPFA.2007.4378107","DOIUrl":"https://doi.org/10.1109/IPFA.2007.4378107","url":null,"abstract":"Multi-frequency transconductance technique is successfully applied in this work for the first time for interface characterization of OFETs. Standard charge pumping measurements are used on silicon MOSFETs for the validation of MFT technique. The method is implemented on pentacene as well as the P3HT based OFETs with SiO2 as the gate dielectric. Our results show interface state densities in the range of 1012/cm2/eV for both the samples. The P3HT films are also shown to have additional trap centres which respond to frequencies above 100 kHz. Our results therefore clearly indicate that the MFT technique is indeed a highly useful technique for interface characterization of OFETs.","PeriodicalId":334987,"journal":{"name":"2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134642073","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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