Functional IC analysis through chip backside with nano scale resolution - E-beam probing in FIB trenches to STI level

Abstract

Successful measurements, applying the EBP to the backside of thinned circuitry, using test structures and commercial chips have been demonstrated. In addition to the well known CCVC a new contrast mechanism named space charge coupled voltage contrast (SCCVC) was detected, which strongly increased the EBP signal measured directly on the transistor source or drain regions. Therefore, measurements are possible as long as the electron beam can be placed on a transistor well area, which is larger than the lower metal lines by a factor of 3. The voltage signal has been produced correctly with 100mV noise margin on one of the test structures and since the coplanarity of the trench bottom to silicon surface is excellent, the same accuracy can be expected for any DUT when the process is properly calibrated. As a result, the presented method is very promising since the lateral resolution potential of an EBP system is only limited by the low energy E-beam diameter. Improvements in this field have not been used to enhance EBP in recent years but even with the present systems, measurements on sub-50nm technology seem to be possible. Furthermore, optical methods are struggling with their resolution limits and therefore backside EBP can become a very powerful method in the near future.