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Thermal Characterization and Design of AlN/GaN/AlN HEMTs on Foreign Substrates 国外衬底上AlN/GaN/AlN hemt的热特性与设计
IF 4.1 2区 工程技术
IEEE Electron Device Letters Pub Date : 2025-03-06 DOI: 10.1109/LED.2025.3548853
Seokjun Kim;Eungkyun Kim;Husam Walwil;Daniel C. Shoemaker;Jimy Encomendero;Matthew T. DeJarld;Maher B. Tahhan;Eduardo M. Chumbes;Jeffrey R. Laroche;Debdeep Jena;Huili G. Xing;Sukwon Choi
{"title":"Thermal Characterization and Design of AlN/GaN/AlN HEMTs on Foreign Substrates","authors":"Seokjun Kim;Eungkyun Kim;Husam Walwil;Daniel C. Shoemaker;Jimy Encomendero;Matthew T. DeJarld;Maher B. Tahhan;Eduardo M. Chumbes;Jeffrey R. Laroche;Debdeep Jena;Huili G. Xing;Sukwon Choi","doi":"10.1109/LED.2025.3548853","DOIUrl":"https://doi.org/10.1109/LED.2025.3548853","url":null,"abstract":"AlN/GaN/AlN high electron mobility transistors (HEMTs) offer enhanced carrier confinement and higher breakdown voltage than conventional AlGaN/GaN HEMTs. In this work, Raman thermometry was used to characterize the self-heating behavior of a single-finger AlN/GaN/AlN HEMT on 6H-SiC. A 3D finite element analysis model was created to optimize the thermal design of the device structure. Simulation results reveal that the optimal buffer layer thicknesses to minimize the channel temperature rise of AlN/GaN/AlN HEMTs on 6H-SiC and diamond substrates are <inline-formula> <tex-math>$sim 2~mu $ </tex-math></inline-formula>m and <inline-formula> <tex-math>$sim 0.7~mu $ </tex-math></inline-formula>m, respectively. Moreover, diamond substrate integration further enhances the thermal performance, achieving a ~45% and ~53% reduction in the device thermal resistance as compared to those of an AlN/GaN/AlN HEMT on 6H-SiC and an AlGaN/GaN HEMT on 4H-SiC, respectively.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 5","pages":"817-820"},"PeriodicalIF":4.1,"publicationDate":"2025-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143892555","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Bi-Mode Inverse Design of 3D Structures for MEMS Resonators MEMS谐振器三维结构的双模逆设计
IF 4.1 2区 工程技术
IEEE Electron Device Letters Pub Date : 2025-03-06 DOI: 10.1109/LED.2025.3548612
Binzhou Zuo;Zeyu Wu;Junyuan Zhao;Bo Niu;Yumo Lei;Lixin Cao;Yinfang Zhu;Jinling Yang
{"title":"Bi-Mode Inverse Design of 3D Structures for MEMS Resonators","authors":"Binzhou Zuo;Zeyu Wu;Junyuan Zhao;Bo Niu;Yumo Lei;Lixin Cao;Yinfang Zhu;Jinling Yang","doi":"10.1109/LED.2025.3548612","DOIUrl":"https://doi.org/10.1109/LED.2025.3548612","url":null,"abstract":"This work presents an automated algorithm for MEMS resonator structure generation based on inverse design, integrating deep learning and neural networks to predict key physical properties, including resonance frequency (f), quality factor of thermoelastic damping (Q<inline-formula> <tex-math>${}_{textit {TED}}$ </tex-math></inline-formula>), and motional impedance (Rx). Unlike traditional methods relying on finite element analysis (FEA), this approach leverages a database-driven deep learning model, achieving prediction speeds 9,740 times faster than the conventional FEA software with an average accuracy of 97.5%, 96.5%, 96.4 for f, Q<inline-formula> <tex-math>${}_{textit {TED}}$ </tex-math></inline-formula> and Rx,respectively. The algorithm supports flexural and Lamé modes and could generate resonators with a broad frequency range from ~8 to ~63 MHz, significantly surpassing existing methods. By efficiently predicting seed structures, the method guides the inverse design process, generating high Q, and low Rx resonator structures within 10 minutes. The generated devices exhibit deviations of less than 3% from target performance metrics. Simulations and experimental results validate the feasibility and effectiveness of the proposed algorithm, highlighting its potential for accelerating MEMS design with enhanced performance and precision.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 5","pages":"841-844"},"PeriodicalIF":4.1,"publicationDate":"2025-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143892568","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Stabilizing ALD Ultrathin In₂O₃ TFTs Under High Humidity Ambient by an Added IGZO Layer 通过添加IGZO层稳定高湿环境下的ALD超薄In₂O₃TFTs
IF 4.1 2区 工程技术
IEEE Electron Device Letters Pub Date : 2025-03-06 DOI: 10.1109/LED.2025.3548694
Shanshan Ju;Jinxiong Li;Yupu Tang;Wei Qian;Fangxing Zhang;Jianzhang Zhu;Xu Tian;Songjie Yang;Lining Zhang;Lei Lu;Shengdong Zhang;Xinwei Wang
{"title":"Stabilizing ALD Ultrathin In₂O₃ TFTs Under High Humidity Ambient by an Added IGZO Layer","authors":"Shanshan Ju;Jinxiong Li;Yupu Tang;Wei Qian;Fangxing Zhang;Jianzhang Zhu;Xu Tian;Songjie Yang;Lining Zhang;Lei Lu;Shengdong Zhang;Xinwei Wang","doi":"10.1109/LED.2025.3548694","DOIUrl":"https://doi.org/10.1109/LED.2025.3548694","url":null,"abstract":"Atomic-layer-deposited (ALD) ultrathin In2O3 thin-film transistors (TFTs) are highly promising for applications in state-of-the-art displays, flexible electronics, and back-end-of-line (BEOL) integration. However, these TFTs often suffer from pronounced bias-stress instability, which is further magnified under humid ambient. To address this issue, we herein propose a bilayer strategy, where an InGaZnO (IGZO) layer is directly sputtered on the ALD In2O3 channel layer to afford In2O3/IGZO TFTs. The added IGZO layer not only can prevent any direct gas adsorption on the sensitive In2O3 surface, but it also can substantially reduce the surface field strength near S/D to mitigate the risk of water electrolysis from a humid ambient. As a result, the In2O3/IGZO TFTs show one-order-of-magnitude improvement in threshold voltage (<inline-formula> <tex-math>${V}_{textit {th}}$ </tex-math></inline-formula>) shift under both PBS and NBS conditions in high-humidity ambient (85% relative humidity (RH)).","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 5","pages":"773-776"},"PeriodicalIF":4.1,"publicationDate":"2025-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143892475","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Damage-Free Neutral Beam Etching for Gate Recess in E-Mode AlGaN/GaN HEMTs E-Mode AlGaN/GaN hemt中栅极凹槽的无损伤中性束刻蚀
IF 4.1 2区 工程技术
IEEE Electron Device Letters Pub Date : 2025-03-06 DOI: 10.1109/LED.2025.3548676
Yi-Ho Chen;Fu-Chuan Chu;Muhammad Aslam;Yao-Jen Lee;Yiming Li;Seiji Samukawa
{"title":"Damage-Free Neutral Beam Etching for Gate Recess in E-Mode AlGaN/GaN HEMTs","authors":"Yi-Ho Chen;Fu-Chuan Chu;Muhammad Aslam;Yao-Jen Lee;Yiming Li;Seiji Samukawa","doi":"10.1109/LED.2025.3548676","DOIUrl":"https://doi.org/10.1109/LED.2025.3548676","url":null,"abstract":"Recess gate etching is a critical technique for achieving enhancement-mode (E-mode) AlGaN/GaN high-electron mobility transistors (HEMTs) because the interface is susceptible to the etching damage. This study fabricates recess gates using the neutral beam etching (NBE) technique. By adjusting the aperture thickness in the NBE apparatus, we simulate both NB-mode and plasma-mode etching. The electrical characteristics of E-mode HEMTs fabricated using these two modes are analyzed and compared through DC, noise, and pulsed IV measurements. The results demonstrate that NB-recessed HEMTs exhibit superior performance.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 5","pages":"705-708"},"PeriodicalIF":4.1,"publicationDate":"2025-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143892544","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Robust Avalanche (1.5 kV, 2 kA/cm²) in Vertical GaN Diodes on Patterned Sapphire Substrate 在图案蓝宝石衬底上的垂直GaN二极管的稳健雪崩（1.5 kV, 2 kA/cm²）
IF 4.1 2区 工程技术
IEEE Electron Device Letters Pub Date : 2025-03-06 DOI: 10.1109/LED.2025.3548905
Yifan Wang;Ming Xiao;Zineng Yang;Matthew Porter;Kai Cheng;Qihao Song;Ivan Kravchenko;Yuhao Zhang
{"title":"Robust Avalanche (1.5 kV, 2 kA/cm²) in Vertical GaN Diodes on Patterned Sapphire Substrate","authors":"Yifan Wang;Ming Xiao;Zineng Yang;Matthew Porter;Kai Cheng;Qihao Song;Ivan Kravchenko;Yuhao Zhang","doi":"10.1109/LED.2025.3548905","DOIUrl":"https://doi.org/10.1109/LED.2025.3548905","url":null,"abstract":"The lack of avalanche capability is a key limitation of current lateral GaN devices. Despite the report of avalanche in vertical GaN-on-GaN devices, the high wafer cost hinders device commercialization. Here we demonstrate a circuit-level avalanche in vertical GaN diodes on low-cost patterned sapphire substrate (PSS), with the avalanche voltage (1.57 kV) and avalanche current density (>2 kA/cm2) both being the highest reported in GaN devices on foreign substrates. The PSS enables a lower dislocation density than conventional sapphire substrate and is employed in high-voltage GaN devices for the first time. The avalanche voltage in the circuit test reaches 98% of the parallel-plane limit, further affirming that near-ideal avalanche breakdown can be realized on GaN devices on foreign substrates. These results show the promise of the GaN-on-PSS platform for low-cost, robust power devices.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 5","pages":"717-720"},"PeriodicalIF":4.1,"publicationDate":"2025-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143892404","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 4.15 GHz Super High Frequency Quartz Resonator Based on Electron-Beam Lithography 基于电子束光刻技术的4.15 GHz超高频石英谐振器
IF 4.1 2区 工程技术
IEEE Electron Device Letters Pub Date : 2025-03-06 DOI: 10.1109/LED.2025.3548700
Zhichao Yang;Yahui Tian;Qiaozhen Zhang;Lirong Qian
{"title":"A 4.15 GHz Super High Frequency Quartz Resonator Based on Electron-Beam Lithography","authors":"Zhichao Yang;Yahui Tian;Qiaozhen Zhang;Lirong Qian","doi":"10.1109/LED.2025.3548700","DOIUrl":"https://doi.org/10.1109/LED.2025.3548700","url":null,"abstract":"Quartz resonators have been widely used in fields such as communications, electronics, aerospace, and national defense due to their exceptional frequency stability, high-quality factor, and excellent temperature stability. To meet the demand for growing development, higher resonators are needed. This letter utilizes a compound optimization algorithm to design a super high frequency quartz resonator with a center frequency of 4.15GHz and successfully fabricates the device using electron beam lithography. Scanning electron microscopy (SEM) characterization results show that the device remains relatively flat and smooth despite partial loss defects. The minimum finger width of the device is about 207 nm. Measured S-parameter results showed that the Q of this super high-frequency resonator can reach 842.7. The successful super high frequency resonator lays a foundation for its application in the high-frequency field and also provides a reference for future research and development of super high frequency quartz resonators.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 5","pages":"880-883"},"PeriodicalIF":4.1,"publicationDate":"2025-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143892430","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Bit Line Hammering in Si-Based VCT DRAM: A New Security Challenge and Its Mitigation si基VCT DRAM中的位线锤击：一种新的安全挑战及解决方法
IF 4.1 2区 工程技术
IEEE Electron Device Letters Pub Date : 2025-03-05 DOI: 10.1109/LED.2025.3548560
Yong Liu;Da Wang;Pengpeng Ren;Runsheng Wang;Zhigang Ji;Ru Huang
{"title":"Bit Line Hammering in Si-Based VCT DRAM: A New Security Challenge and Its Mitigation","authors":"Yong Liu;Da Wang;Pengpeng Ren;Runsheng Wang;Zhigang Ji;Ru Huang","doi":"10.1109/LED.2025.3548560","DOIUrl":"https://doi.org/10.1109/LED.2025.3548560","url":null,"abstract":"We introduce the Bit Line Hammer (BL hammer) effect, a serious disturbance mechanism in 4F2 DRAM with Si-based Vertical Channel Transistors (VCT). We demonstrate that a specifically designed BL attack pattern, featuring asymmetry and an appropriate toggling frequency, can trigger numerous bit-flips under JEDEC standards, especially at elevated temperatures. This uncovers an unexplored security vulnerability in VCT DRAM cells, with implications for data integrity in advanced memory technologies. Finally, we propose a mitigation strategy to improve cell’s resistance to the BL hammering.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 5","pages":"733-736"},"PeriodicalIF":4.1,"publicationDate":"2025-03-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143892539","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Ultra-Fast 4H-SiC LGAD With Etched Termination and Field Plate 具有蚀刻终端和场极板的超快速4H-SiC LGAD
IF 4.1 2区 工程技术
IEEE Electron Device Letters Pub Date : 2025-03-05 DOI: 10.1109/LED.2025.3548509
Tao Yang;Ben J. Sekely;Yashas Satapathy;Greg Allion;Gil Atar;Philip Barletta;Carl Haber;Steve Holland;John F. Muth;Spyridon Pavlidis;Stefania Stucci;Abraham Tishelman-Charny
{"title":"Ultra-Fast 4H-SiC LGAD With Etched Termination and Field Plate","authors":"Tao Yang;Ben J. Sekely;Yashas Satapathy;Greg Allion;Gil Atar;Philip Barletta;Carl Haber;Steve Holland;John F. Muth;Spyridon Pavlidis;Stefania Stucci;Abraham Tishelman-Charny","doi":"10.1109/LED.2025.3548509","DOIUrl":"https://doi.org/10.1109/LED.2025.3548509","url":null,"abstract":"Silicon carbide Low Gain Avalanche Detectors (4H-SiC LGADs), exhibiting an ultra-fast time response and excellent time resolution, are reported. Via TCAD simulations, the use of field plates is proposed to suppress the high electric field caused by the negative bevel-etched angle. Experimental measurements confirm that the field plate significantly increases the breakdown voltage. Gain and time resolution are measured by using the ultraviolet transient current technique (UV-TCT), showing that 4H-SiC LGADs possess excellent timing performance, with a time resolution better than 35 ps in response to an injected laser signal tuned to represent a single minimum ionizing particle (MIP) at room temperature. Additionally, the gain suppression effect is observed in the 4H-SiC LGAD for the first time.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 5","pages":"845-847"},"PeriodicalIF":4.1,"publicationDate":"2025-03-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143892541","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Single-Layer Nested-Coil On-Chip Transformer for Cost-Effective High-Voltage Digital Isolation 用于经济高效的高压数字隔离的单层嵌套线圈片上变压器
IF 4.1 2区 工程技术
IEEE Electron Device Letters Pub Date : 2025-02-28 DOI: 10.1109/LED.2025.3546922
Jinyu Zhang;Jixiang Chen;Song Xue;Yihao Wang;Rongxiang Wu
{"title":"A Single-Layer Nested-Coil On-Chip Transformer for Cost-Effective High-Voltage Digital Isolation","authors":"Jinyu Zhang;Jixiang Chen;Song Xue;Yihao Wang;Rongxiang Wu","doi":"10.1109/LED.2025.3546922","DOIUrl":"https://doi.org/10.1109/LED.2025.3546922","url":null,"abstract":"In this letter, a single-layer nested-coil on-chip transformer (NCOCT) is proposed and demonstrated for cost-effective high-voltage digital isolation. The two nested planar spiral coils are implemented in a single metal layer for cost-effective fabrication. The metal layer is sandwiched between two isolation layers which block the breakdown paths. The intrinsic distance through isolation (DTI) is determined by the lateral layout distance between the two coils, which makes it easy to achieve high-voltage isolation. The fabricated 0.64-mm2 NCOCT achieved coil inductances of 28/27 nH, as well as a high isolation capability of 12 kV DC and 8 kVrms AC with a DTI of <inline-formula> <tex-math>$37.2~mu $ </tex-math></inline-formula>m. The small coupling factor of 0.3 and the small primary-to-secondary parasitic capacitance of 0.35 pF provides a similar signal-to-common-mode-transient-noise ratio compared with conventional transformer structures.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 5","pages":"809-812"},"PeriodicalIF":4.1,"publicationDate":"2025-02-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143892403","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Bias-Selectable Dual-Band Avalanche Detector Based on Au-WS₂-Ge Heterostructure 基于Au-WS 2 -Ge异质结构的偏置可选双频雪崩探测器
IF 4.1 2区 工程技术
IEEE Electron Device Letters Pub Date : 2025-02-28 DOI: 10.1109/LED.2025.3546631
Yuekai Hao;Ningning Zhang;Yichi Zhang;Zhao Han;Qiancui Zhang;Bu Zhang;Jiting Hu;Tian Miao;Huiyong Hu;Liming Wang;Zhangming Zhu
{"title":"Bias-Selectable Dual-Band Avalanche Detector Based on Au-WS₂-Ge Heterostructure","authors":"Yuekai Hao;Ningning Zhang;Yichi Zhang;Zhao Han;Qiancui Zhang;Bu Zhang;Jiting Hu;Tian Miao;Huiyong Hu;Liming Wang;Zhangming Zhu","doi":"10.1109/LED.2025.3546631","DOIUrl":"https://doi.org/10.1109/LED.2025.3546631","url":null,"abstract":"Here, we report a bias-selectable visible and near-infrared photoresponses due to stacked back-to-back diodes structure in a mixed-dimensional Au-WS2-Ge avalanche photodetector. Controllable switching between Schottky (Au/WS2) and PN (WS2/Ge) junctions can be realized depending on the polarity of the bias voltage. Therefore, this device can provide bias-dependent single-band (visible) and fused-band (visible&near-infrared) avalanche detection modes. When the Schottky junction is reversed, ultra-high responsivity (over 2000 A/W) and gain (349) at 532 nm can be obtained when reaching the avalanche breakdown (single-band mode). Meanwhile, when the PN junction is reversed, the ultra-high gains around 354 and 519 can be realized at both 532 and 1550 nm, respectively (fused-band mode). The simulated I-V features agree well with the experimental results. This device provides a novel direction for the application of integrated dual-band avalanche devices in optoelectronic detection.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 5","pages":"793-796"},"PeriodicalIF":4.1,"publicationDate":"2025-02-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143892536","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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