Renzhen Xiao;Renjie Cheng;Kun Chen;Yanchao Shi;Xianchen Bai;Junqing Wang;Xinhong Cui
{"title":"Concepts of Time-Frequency Structure and Pulse Compression of X-Band Radiation Generated by an Oversized Coaxial Cherenkov Generator","authors":"Renzhen Xiao;Renjie Cheng;Kun Chen;Yanchao Shi;Xianchen Bai;Junqing Wang;Xinhong Cui","doi":"10.1109/LED.2025.3527975","DOIUrl":"https://doi.org/10.1109/LED.2025.3527975","url":null,"abstract":"New concepts to generate extremely high output power with ultrashort pulse duration are developed. At first, an oversized coaxial Cherenkov generator with a profiled and extended slow wave structure is used to generate a time-frequency-modulated pulse with power of several tens of GW and duration of several nanoseconds. Then this time-frequency-modulated pulse can be compressed into a sub-nanosecond pulse with power exceeding 100 GW via a circular waveguide compressor after mode conversion. As an example, particle-in-cell simulation demonstrates that a pulse is obtained with power of 35 GW, duration of 3.0 ns, and frequency sweeping from 8.9 GHz to 11.0 GHz almost linearly. Injecting this pulse into a circular waveguide as TE<inline-formula> <tex-math>$_{mathbf {{01}}}$ </tex-math></inline-formula> mode, it can be compressed into an ultrashort pulse with power of 168 GW and duration of 0.45 ns. Compared with previous method of producing superradiance pulse directly, the beam-wave interaction in the generator is not so highly unstable, and thus the whole system is more reliable and controllable.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 3","pages":"488-491"},"PeriodicalIF":4.1,"publicationDate":"2025-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143496473","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A Novel Insight Into the Mechanism of Bipolar Degradation in 4H-SiC MOSFET","authors":"Yangtao Long;Yuan Chen;Pengkai Wang;Bo Hou;Hu He","doi":"10.1109/LED.2025.3528065","DOIUrl":"https://doi.org/10.1109/LED.2025.3528065","url":null,"abstract":"In converter applications, the body diode SiC MOSFET is often repurposed as freewheeling diode to reduce cost and save space, it potentially leads the device to bipolar degradation. This letter analyzes and compares the bipolar degradation mechanisms of a 1200 V SiC MOSFET under both DC and pulsed current stress conditions. The study reveals that degradation under DC stress occurs at a faster rate than that under pulsed stress, due to the contraction of dislocations in the device during the off-state of pulsed current, the overall degradation becomes slower. At lower DC current densities, the bipolar degradation process exhibits an activation phase before degradation, with longer activation and degradation time observed as current density decreases.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 3","pages":"464-467"},"PeriodicalIF":4.1,"publicationDate":"2025-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143496453","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Integration of Oxidized Silicon- and Hydrogen- Terminated Diamond p-Channels for Normally-Off High-Voltage Diamond Power Devices","authors":"Yu Fu;Zeyang Ren;Kai Su;Jinfeng Zhang;Ruowei Liu;Yijiang Li;Liaoliang Zhu;Jintao Meng;Peng Qian;Dong Wang;Yue Hao;Hiroshi Kawarada;Jincheng Zhang","doi":"10.1109/LED.2025.3528120","DOIUrl":"https://doi.org/10.1109/LED.2025.3528120","url":null,"abstract":"With a dense two-dimensional hole gas (2DHG) p-type conductive layer near the surface, hydrogen- terminated (C-H) diamond metal-oxide-semiconductor field-effect transistors (MOSFETs) have shown typical normally-on operations and high breakdown voltages (<inline-formula> <tex-math>${V}_{text {BR}}$ </tex-math></inline-formula>). Owing to the high MOS interface quality, the oxidized silicon-terminated (C-Si–O) diamond MOSFETs have featured excellent normally-off characteristics, such as high threshold voltage (<inline-formula> <tex-math>${V}_{text {TH}}$ </tex-math></inline-formula>). However, the reported C-Si–O diamond MOSFETs were all exhibited an overlapping-gate structure, and therefore couldn’t withstand high voltages. In this work, we demonstrated a novel C-H diamond MOSFET structure with a partial C-Si–O channel to improve the voltage withstand capability of normally-off C-Si–O diamond MOSFETs. The C-H/C-Si–O/C-H channel structure was achieved by forming an entire C-Si–O channel first, and then selectively replacing the C-Si–O channel to the C-H channel by using a SiO2 mask. As a result, for the fabricated device with a C-Si–O channel length of <inline-formula> <tex-math>$2~mu $ </tex-math></inline-formula>m and a gate-to-drain distance (<inline-formula> <tex-math>${L}_{text {GD}}$ </tex-math></inline-formula>) of <inline-formula> <tex-math>$11~mu $ </tex-math></inline-formula>m, <inline-formula> <tex-math>${V}_{text {TH}} = -8.6$ </tex-math></inline-formula> V and OFF-state <inline-formula> <tex-math>${V}_{text {BR}} = -1376$ </tex-math></inline-formula> V have been obtained. These competitive results reveal that the proposed device structure is promising in pushing the normally-off C-Si–O diamond MOSFETs into the high voltage applications.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 3","pages":"330-333"},"PeriodicalIF":4.1,"publicationDate":"2025-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143496626","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Demonstration of Low-Power Three-Dimensional CMOS Inverters Based on Si p-Tunnel FET and ITO n-FET","authors":"Anyu Tong;Kaifeng Wang;Qianlan Hu;Zhiyu Wang;Xiong Xiong;Shiwei Yan;Shenwu Zhu;Qijun Li;Yongqin Wu;Ye Ren;Weihai Bu;Qianqian Huang;Yanqing Wu;Ru Huang","doi":"10.1109/LED.2025.3528045","DOIUrl":"https://doi.org/10.1109/LED.2025.3528045","url":null,"abstract":"In this work, low-power CMOS inverter and 5-stage ring oscillator (RO) are demonstrated based on heterogeneous 3D integration of vertically stacked FEOL p-type silicon tunnel FET (TFET) and BEOL n-type indium-tin-oxide (ITO) FET. Owing to the low off-state current of both p-type and n-type FET, our ITO/TFET heterogeneous 3D integrated CMOS inverters show a low static power of 4.83 pW at <inline-formula> <tex-math>${text{V}}_{text {dd}}=1$ </tex-math></inline-formula> V and a high voltage gain of 522 V/V at <inline-formula> <tex-math>${text{V}}_{text {dd}}=2.5$ </tex-math></inline-formula> V, among the best values in reported amorphous oxide semiconductors (AOS) CMOS devices. Meanwhile, we also verified the functionality of logic circuits including 4T-SRAM cell and 5-stage RO based on our ITO/TFET heterogeneous 3D integrated CMOS inverters, and our 5-stage RO achieved a low propagation delay of 30 ns/stage, which is also the lowest value among AOS and TFET related CMOS devices.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 3","pages":"512-515"},"PeriodicalIF":4.1,"publicationDate":"2025-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143496564","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Shujiong Hao;Dongli Zhang;Nannan Lv;Huaisheng Wang;Mingxiang Wang
{"title":"Improved Stability of Pr-Doped Amorphous InGaZnO₄ Thin-Film Transistors Under Negative Bias Illumination Stress","authors":"Shujiong Hao;Dongli Zhang;Nannan Lv;Huaisheng Wang;Mingxiang Wang","doi":"10.1109/LED.2025.3528063","DOIUrl":"https://doi.org/10.1109/LED.2025.3528063","url":null,"abstract":"Negative bias illumination stress (NBIS) instability is an important issue to overcome for the application of amorphous InGaZnO4 (a-IGZO) thin-film transistors (TFTs) in flat-panel displays. In this work, TFTs based on praseodymium (Pr)-doped a-IGZO were fabricated, and their NBIS stability at different temperatures was characterized. The transfer curve shifts in the negative gate bias direction under NBIS, and the magnitude of the shift increases significantly at elevated temperatures even with a weak illumination intensity. Benefiting from Pr doping, the oxygen vacancies in the channel a-IGZO can be reduced for TFTs with a metal cover layer after annealing in an oxygen atmosphere. Thus, significantly improved NBIS stability of a-IGZO TFTs at both room temperature and elevated temperatures is demonstrated.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 3","pages":"420-423"},"PeriodicalIF":4.1,"publicationDate":"2025-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143496479","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Mengyao Fu;Zhiqiang Ma;Chenyang Gao;Yongping Ye;Wei Li;Dibo Hou;Yunqi Cao
{"title":"A Multi-Functional VOC Sensor Based on Cascaded Quartz Crystal Resonators","authors":"Mengyao Fu;Zhiqiang Ma;Chenyang Gao;Yongping Ye;Wei Li;Dibo Hou;Yunqi Cao","doi":"10.1109/LED.2025.3528024","DOIUrl":"https://doi.org/10.1109/LED.2025.3528024","url":null,"abstract":"A multi-functional VOC (volatile organic compound) sensor composed of four parallel-connected quartz crystal resonators (QCRs) configured as a cascaded resonator was developed for VOCs identification and quantification. The structure of the cascaded resonator allows the high-resolution output response signals from the four QCRs to be obtained through a single measurement. Multi-parameter responses for each QCR can be calculated to form a hybrid sensor array, combining the advantages of multisensor array (MSA) and virtual sensor array (VSA), significantly enhancing the sensor’s ability to identify both similar and diverse types of VOCs. Results show that the highest sensitivity is 16.14 Hz ppm−1, with the lowest limit of detection is 0.34 ppm, exhibiting excellent sensing performance. Classification accuracy to eight VOCs is 98.68% of the hybrid sensor array. This development is of significant importance for the realization of artificial olfaction.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 3","pages":"476-479"},"PeriodicalIF":4.1,"publicationDate":"2025-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143496510","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"High-Performance MIM/p-GaN Gate HEMTs With a 3-nm Insulator for Power Conversion","authors":"Zhibo Cheng;Xiangdong Li;Jian Ji;Lu Yu;Tao Zhang;Hongyue Wang;Xi Jiang;Song Yuan;Shuzhen You;Jingjing Chang;Yue Hao;Jincheng Zhang","doi":"10.1109/LED.2025.3528003","DOIUrl":"https://doi.org/10.1109/LED.2025.3528003","url":null,"abstract":"Schottky-type p-GaN gate HEMTs with a low forward bias gate breakdown voltage <inline-formula> <tex-math>${V}_{text {G- {BD}}}$ </tex-math></inline-formula> are vulnerable to failures during switching. In this work, high-performance MIM/p-GaN gate HEMTs with a TiN/Al2O3/TiN (30/3/40 nm) MIM structure on top of p-GaN layer are proposed. Compared to the conventional Schottky-type reference, the MIM/p-GaN gate structure successfully promotes the <inline-formula> <tex-math>${V}_{text {G- {BD}}}$ </tex-math></inline-formula> from 11.4 to 14.1 V and the maximum applicable gate voltage <inline-formula> <tex-math>${V}_{text {G- {max}}}$ </tex-math></inline-formula> from 5.1 to 7.0 V corresponding to a lifetime of 10 years at the failure of 1%. Benefiting from the 3-nm ultra-thin Al2O3 layer and the MIM structure, trapping effect is avoided. Neither significant degradation of static nor dynamic characteristics of the proposed devices are observed. The developed MIM/p-GaN gate HEMTs present great potentials for future power conversion applications.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 3","pages":"460-463"},"PeriodicalIF":4.1,"publicationDate":"2025-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10836812","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143496472","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Moderate-Temperature Deposition of 99.9% Semiconducting Carbon Nanotubes for Thin Film Transistors With Good Consistency","authors":"Mingyu Liu;Bo Lai;Lele Wu;Sishun Cui;Wendi Wu;Yuanchun Zhao","doi":"10.1109/LED.2025.3527968","DOIUrl":"https://doi.org/10.1109/LED.2025.3527968","url":null,"abstract":"Carbon nanotube (CNT) networks are considered as promising candidate materials for high-performance thin film transistors. However, the complex network structure usually leads to device-to-device variations among the fabricated CNT field-effect transistors (CNTFETs), and thus impeding their practical applications. In this work, we report the solution-based deposition of CNT networks at a moderate temperature of 60 ° C by using high-purity (99.9%) semiconducting nanotubes, which not only improves the deposition efficiency, but also produces well-controlled network morphology. The resultant CNTFETs exhibit narrow distributions in on/off ratios and subthreshold swings centered at <inline-formula> <tex-math>$10^{{7}}$ </tex-math></inline-formula> and 2 V/dec (with a 300 nm-thick silicon oxide dielectric layer), respectively, with a mobility of ~20 cm2/Vs. The device performance can be further optimized by using a plasma-generated ultra-thin aluminum oxide gate dielectric layer. In particular, this work underlines the importance of controlling the nanotube bundles in high-purity semiconducting CNT networks, by which the trade-off between carrier mobility and on/off ratio of CNTFETs can be well balanced.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 3","pages":"424-427"},"PeriodicalIF":4.1,"publicationDate":"2025-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143496475","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Retina-Inspired Artificial Optoelectronic Neurons With Broad Spectral Response for Visual Image Pre-Processing","authors":"Guocheng Zhang;Jianchuan Tang;Binglin Lai;Hongyu Wang;Zili Zeng;Changqiang Su;Xin Yi;Yujie Yan;Huipeng Chen","doi":"10.1109/LED.2024.3525088","DOIUrl":"https://doi.org/10.1109/LED.2024.3525088","url":null,"abstract":"Inspired by the human retina, the development of neuromorphic vision systems featuring image perception, memory, and processing functions aims to address the limitations of traditional artificial vision systems concerning circuit simplification, device integration, and power consumption. The narrow spectral response of optoelectronic neurons, an important hardware basis for neuromorphic vision systems, limits their application in broad-spectrum artificial visual perception. In this study, we present an artificial optoelectronic neuron that demonstrates broadband sensing capabilities with a response range encompassing ultraviolet, visible, and near-infrared regions. Furthermore, we have designed a <inline-formula> <tex-math>$64times 64$ </tex-math></inline-formula> array of optoelectronic neurons capable of effectively simulating the light perception and image pre-processing functions (enhance image contrast), of the retina. This work is important for improving image processing efficiency and realizing neuromorphic vision systems with broadband perception.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 3","pages":"401-404"},"PeriodicalIF":4.1,"publicationDate":"2025-01-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143496454","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Reduced Dark-Current, Rise-Time, and On-State Delay of Avalanche GaAs Photoconductive Semiconductor Switches by Annealing-Grinding Process","authors":"Yingxiang Yang;Long Hu;Xianghong Yang;Jiahui Fu;Zhangjie Zhu;Mingchao Yang;Xin Li;Li Ni;Yang Zhou;Li Geng","doi":"10.1109/LED.2025.3527980","DOIUrl":"https://doi.org/10.1109/LED.2025.3527980","url":null,"abstract":"In this letter, the performance of avalanche Gallium Arsenide (GaAs) Photoconductive Semiconductor Switch (PCSS) aimed at DC charging and fiber-triggered high-voltage switches (HVS) applications is reported. The optimal annealing condition suitable for the device is shown to be 250 °C for 30 min by studying the effects of different annealing conditions on the dark-state leakage current of the PCSS. Based on this, a novel annealing-grinding (AG) process is proposed to improve the electrical characteristics of GaAs PCSS. With an electrode gap of 10 mm and a bias voltage of 40 kV, the leakage currents of A-GaAs PCSS, G-GaAs PCSS and AG-GaAs PCSS are reduced by 60.6 %, 64 % and 67.8 %, respectively, compared with the literature. Further, the effects of different processes on the electrical pulse output of avalanche GaAs PCSS, such as optoelectronic delay time and rise time, are investigated. The results show that the avalanche GaAs PCSS can operate stably at 50 kV with a rising edge of 1.2 ns and a photoelectric delay time of 23.93 ns.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 3","pages":"373-376"},"PeriodicalIF":4.1,"publicationDate":"2025-01-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143496581","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}