IEEE Electron Device Letters最新文献

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La In Situ Doping-Engineered HZO Capacitors Achieving High- k (~56.2) and Ferroelectricity (2Pr~43.4 μ C/cm2) at 1.5 MV/Cm With 1010 Cycles Endurance La原位掺杂HZO电容器在1.5 MV/Cm下获得高k值(~56.2)和铁电性(2Pr~43.4 μ C/cm2),并具有1010次循环寿命
IF 4.5 2区 工程技术
IEEE Electron Device Letters Pub Date : 2025-07-17 DOI: 10.1109/LED.2025.3587915
Kangli Xu;Lei Wang;Aolin Yuan;Binjie Weng;Yongkai Liu;Yinchi Liu;Jiajie Yu;Bao Zhu;Jialin Meng;Hao Zhu;Qingqing Sun;David Wei Zhang;Tianyu Wang;Lin Chen
{"title":"La In Situ Doping-Engineered HZO Capacitors Achieving High- k (~56.2) and Ferroelectricity (2Pr~43.4 μ C/cm2) at 1.5 MV/Cm With 1010 Cycles Endurance","authors":"Kangli Xu;Lei Wang;Aolin Yuan;Binjie Weng;Yongkai Liu;Yinchi Liu;Jiajie Yu;Bao Zhu;Jialin Meng;Hao Zhu;Qingqing Sun;David Wei Zhang;Tianyu Wang;Lin Chen","doi":"10.1109/LED.2025.3587915","DOIUrl":"https://doi.org/10.1109/LED.2025.3587915","url":null,"abstract":"This study is motivated by the persistent challenge of developing universal dielectric (DE) materials that simultaneously satisfy DRAM-driven high permittivity and FeRAM-required polarization stability. Here, we report La-doping engineered Hf<inline-formula> <tex-math>${}_{{0}.{5}}$ </tex-math></inline-formula>Zr<inline-formula> <tex-math>${}_{{0}.{5}}$ </tex-math></inline-formula>O2 (HZO) capacitors via in-situ atomic layer deposition (ALD) cycle modulation, implementing a phase-engineering strategy to resolve the permittivity-polarization trade-off. Precise La2O3 inserting induces a morphotropic phase boundary (MPB) like configuration in the HZ1L capacitor, achieving an ultrahigh permittivity (<inline-formula> <tex-math>${k}sim ~63.8$ </tex-math></inline-formula>). Post-wake-up operation demonstrates dual-mode functionality featuring robust ferroelectricity (<inline-formula> <tex-math>$2{P}_{text {r}} = 43.4~mu $ </tex-math></inline-formula>C/cm<inline-formula> <tex-math>${}^{{2}}text {)}$ </tex-math></inline-formula>, low FE saturated voltage ~1.05V (1.5 MV/cm), and stable DE performance (k >56.2) with exceptional endurance (<inline-formula> <tex-math>$gt 10^{{10}}$ </tex-math></inline-formula> cycles), attributed to coercive field reduction. This dual-phase synergy establishes a universal framework for scalable high-density memory solutions in advanced logic and memory applications.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 9","pages":"1541-1544"},"PeriodicalIF":4.5,"publicationDate":"2025-07-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144918385","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
4-to-2 Optoelectronic Encoders Utilizing Quantum Well Heterojunction Phototransistors on the Light-Emitting Transistor Platform 基于量子阱异质结光电晶体管的4对2光电编码器
IF 4.5 2区 工程技术
IEEE Electron Device Letters Pub Date : 2025-07-16 DOI: 10.1109/LED.2025.3589891
Mukul Kumar;Shu-Jui Hsu;Yun-Jie Huang;Lucas Yang;Sung-Pu Yang;Natchanon Prechatavanich;Jia-Zhen Cai;Chao-Hsin Wu
{"title":"4-to-2 Optoelectronic Encoders Utilizing Quantum Well Heterojunction Phototransistors on the Light-Emitting Transistor Platform","authors":"Mukul Kumar;Shu-Jui Hsu;Yun-Jie Huang;Lucas Yang;Sung-Pu Yang;Natchanon Prechatavanich;Jia-Zhen Cai;Chao-Hsin Wu","doi":"10.1109/LED.2025.3589891","DOIUrl":"https://doi.org/10.1109/LED.2025.3589891","url":null,"abstract":"This letter presents the design, fabrication, and characterization of a 4-to-2 optoelectronic encoder utilizing the light-emitting transistors (LETs) platform. By employing a GaAs-based heterojunction structure with an InGaAs quantum well (QW), the LET architecture significantly enhances light emitting, enabling efficient optical-to-electrical signal conversion. This marks the first successful demonstration of an LET-based encoder circuit, advancing monolithic integration for optical receiver applications and contributing to the development of high-performance optoelectronic systems. This work highlights the potential of LETs as a versatile platform for scalable and efficient photonic integrated circuits.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 9","pages":"1565-1568"},"PeriodicalIF":4.5,"publicationDate":"2025-07-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144917296","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
High-Power-Handling GaN Terahertz High-Speed On-Chip Modulator Based on Fin-Line Double-Layer Near-Field Coupling 基于鳍线双层近场耦合的高功率处理GaN太赫兹高速片上调制器
IF 4.5 2区 工程技术
IEEE Electron Device Letters Pub Date : 2025-07-16 DOI: 10.1109/LED.2025.3589876
Hui Zhang;Yazhou Dong;Chunyang Bi;Kesen Ding;Tianchi Zhou;Hongji Zhou;Jun Zhou;Yaxin Zhang
{"title":"High-Power-Handling GaN Terahertz High-Speed On-Chip Modulator Based on Fin-Line Double-Layer Near-Field Coupling","authors":"Hui Zhang;Yazhou Dong;Chunyang Bi;Kesen Ding;Tianchi Zhou;Hongji Zhou;Jun Zhou;Yaxin Zhang","doi":"10.1109/LED.2025.3589876","DOIUrl":"https://doi.org/10.1109/LED.2025.3589876","url":null,"abstract":"To address the technical challenges in the coordinated optimization of power handling, modulation rate, and system integration for traditional terahertz modulators, this paper presents a high-power-handling gallium nitride (GaN) terahertz high-speed on-chip modulator operating in the 140 GHz frequency band. The device employs a fin-line double-layer near-field coupling structure and incorporates a resonant unit cell design loaded with GaN Schottky barrier diodes (SBDs). By controlling the switching states of the diodes, dynamic switching between dual-gap resonance mode and closed-ring resonance mode is achieved, realizing a modulation depth of 20 dB and a low insertion loss of 6 dB within the 139.4-149 GHz frequency range. Furthermore, the electric field peak intensity is effectively reduced through the expansion of metal areas on both sides of the resonant unit cell gap. Combined with the high breakdown field strength (3.3 MV/cm) of GaN material, a power capacity breakthrough of 175 mW is achieved. The zero/reverse bias strategy on diodes during the modulator’s off-state suppresses thermal accumulation in conducting diodes, ensuring stable high-power operation. Experimental results demonstrate that the modulator supports 25 Gbps high-speed data transmission, providing an on-chip solution with both high power handling and high transmission rate for terahertz communication systems.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 9","pages":"1521-1524"},"PeriodicalIF":4.5,"publicationDate":"2025-07-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144918386","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Wideband Sandwich Metamaterial Window With Thick BN for W-Band gyro-TWT w波段陀螺行波管宽频带厚BN夹层超材料窗
IF 4.5 2区 工程技术
IEEE Electron Device Letters Pub Date : 2025-07-16 DOI: 10.1109/LED.2025.3589629
Di Guo;YaoYao Cao;Changsheng Shen;Yang Xie;Pan Pan;Xu Zeng;Jinjun Feng;Xiaohan Sun;Ningfeng Bai
{"title":"Wideband Sandwich Metamaterial Window With Thick BN for W-Band gyro-TWT","authors":"Di Guo;YaoYao Cao;Changsheng Shen;Yang Xie;Pan Pan;Xu Zeng;Jinjun Feng;Xiaohan Sun;Ningfeng Bai","doi":"10.1109/LED.2025.3589629","DOIUrl":"https://doi.org/10.1109/LED.2025.3589629","url":null,"abstract":"This letter proposes a sandwich metamaterial window (SMW) for a W-band TE01 mode gyrotron travelling-wave tube (gyro-TWT), which is optimized using machine learning (ML) to achieve high transmissivity and low reflectivity in a wideband range. This SMW has three layers, BN-metal-BN, where the BN has a thickness of 1.05 mm. The metal layer is composed of hexagonal units allowing to improve the cold-test characterization of SMW. The ML optimization makes the SMW have a high simulation performance with S11 less than −20 dB and S21 higher than −0.14 dB within 12.15 GHz. Compared to conventional designs, the proposed SMW provides a thicker one to achieve comparable performance through a simplified fabrication process. Experimental validation confirms alignment with simulation results, demonstrating the feasibility of this approach. This work provides a scalable and cost-efficient methodology for high-frequency metasurface window design.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 9","pages":"1628-1631"},"PeriodicalIF":4.5,"publicationDate":"2025-07-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144918230","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Statistical Study of Large Voltage-Controlled Magnetic Anisotropy in 3X-nm Perpendicular Magnetic Tunnel Junctions 3X-nm垂直磁隧道结中大电压控制磁各向异性的统计研究
IF 4.5 2区 工程技术
IEEE Electron Device Letters Pub Date : 2025-07-16 DOI: 10.1109/LED.2025.3589956
Jordan Athas;Christian Duffee;Thomas Neuner;Noraica Davila Melendez;Jordan A. Katine;Pedram Khalili Amiri
{"title":"Statistical Study of Large Voltage-Controlled Magnetic Anisotropy in 3X-nm Perpendicular Magnetic Tunnel Junctions","authors":"Jordan Athas;Christian Duffee;Thomas Neuner;Noraica Davila Melendez;Jordan A. Katine;Pedram Khalili Amiri","doi":"10.1109/LED.2025.3589956","DOIUrl":"https://doi.org/10.1109/LED.2025.3589956","url":null,"abstract":"Switching of sub-50 nm perpendicular magnetic tunnel junctions (pMTJs) using the voltage-controlled magnetic anisotropy (VCMA) effect has been a persistent challenge in spintronics, especially as devices scale down. This work presents the first comprehensive study of 20 CoFeB/MgO-based 3X-nm voltage-controlled pMTJs with diameters of 30 to 36 nm. The devices consistently demonstrate large VCMA coefficients (mean <inline-formula> <tex-math>$xi ~approx ~106$ </tex-math></inline-formula> fJ/Vm), which allow for achieving sub-nanosecond voltage-induced switching, and a mean tunneling magnetoresistance (TMR) greater than 130%. Endurance measurements show a lower bound of <inline-formula> <tex-math>$2times 10^{{10}}$ </tex-math></inline-formula> reliable write cycles. These results establish a high-VCMA pMTJ material stack for energy-efficient memory, sensing, and computing.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 9","pages":"1549-1552"},"PeriodicalIF":4.5,"publicationDate":"2025-07-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144918212","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Unified Optimization Model for Vertical Power High- k Superjunction With NPT and PT Modes 具有NPT和PT模式的垂直功率高k超结的统一优化模型
IF 4.5 2区 工程技术
IEEE Electron Device Letters Pub Date : 2025-07-14 DOI: 10.1109/LED.2025.3588725
Haimeng Huang;Chenxing Wang;Zhentao Xiao
{"title":"A Unified Optimization Model for Vertical Power High- k Superjunction With NPT and PT Modes","authors":"Haimeng Huang;Chenxing Wang;Zhentao Xiao","doi":"10.1109/LED.2025.3588725","DOIUrl":"https://doi.org/10.1109/LED.2025.3588725","url":null,"abstract":"This letter introduces a simplified electric field model for high-<inline-formula> <tex-math>$boldsymbol {k}$ </tex-math></inline-formula> superjunctions (H<inline-formula> <tex-math>$boldsymbol {k}$ </tex-math></inline-formula>SJs) under the punch-through (PT) mode, and its novel modification for the non-punch-through (NPT) mode, which is further extended to incorporate interface charges (<inline-formula> <tex-math>${Q}_{text {it}}$ </tex-math></inline-formula>) at the heterointerface. A unified optimization framework for PT and NPT modes is developed and compares width-based and aspect ratio (AR)-based strategies, obtaining the minimum specific ON-resistance (<inline-formula> <tex-math>${R}_{text {on,sp}}$ </tex-math></inline-formula>) under the designed breakdown voltage (BV). The analytical results of <inline-formula> <tex-math>${R}_{text {on,sp}}$ </tex-math></inline-formula> are in good agreement with MEDICI simulations and a refined <inline-formula> <tex-math>${R}_{text {on,sp}} propto text { BV}^{text {1.37}}$ </tex-math></inline-formula> is obtained under given Hk-pillar width (b) and permittivity ratio (<inline-formula> <tex-math>${K}_{text {r}}$ </tex-math></inline-formula>). It aslo reveals that H<inline-formula> <tex-math>$boldsymbol {k}$ </tex-math></inline-formula>SJs with the same product of b and <inline-formula> <tex-math>${K}_{text {r}}$ </tex-math></inline-formula> exhibit identical<sc>on</small>-resistance. Furthermore, a theoretical limit of <inline-formula> <tex-math>${R}_{text {on,sp}} propto text { BV}^{text {1.06}}$ </tex-math></inline-formula> and an estimated saturation threshold for dielectric benefits are identified to reduce the need for high-<inline-formula> <tex-math>$boldsymbol {k}$ </tex-math></inline-formula> materials. This work establishes a compact and generalizable framework for modeling and optimizing HkSJs, supported by simulation benchmarks and offering practical guidance for device design.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 9","pages":"1585-1588"},"PeriodicalIF":4.5,"publicationDate":"2025-07-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144918312","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Bulk Feedback Field-Effect Transistor 体反馈场效应晶体管
IF 4.5 2区 工程技术
IEEE Electron Device Letters Pub Date : 2025-07-11 DOI: 10.1109/LED.2025.3588262
Hakin Kim;Doohyeok Lim
{"title":"Bulk Feedback Field-Effect Transistor","authors":"Hakin Kim;Doohyeok Lim","doi":"10.1109/LED.2025.3588262","DOIUrl":"https://doi.org/10.1109/LED.2025.3588262","url":null,"abstract":"A feedback field-effect transistor (FBFET) fabricated on a bulk Si substrate is presented. The bulk FBFET features a dual-well structure with multiple p-n junctions on the substrate. This novel structure prevents body leakage and ensures reliable FBFET operation. The bulk FBFET demonstrates unique electrical characteristics, including drain–source current (<inline-formula> <tex-math>${I}_{text {DS}}text {)}$ </tex-math></inline-formula> latch-up, latch-down, and hysteresis. During <inline-formula> <tex-math>${I}_{text {DS}}$ </tex-math></inline-formula> latch-up and latch-down, the bulk FBFET exhibits an extremely low subthreshold swing of less than 1 mV/dec and a high on/off ratio of <inline-formula> <tex-math>$5.71 times 10^{{5}}$ </tex-math></inline-formula>.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 9","pages":"1457-1460"},"PeriodicalIF":4.5,"publicationDate":"2025-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144918395","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Enhanced Cooling of Multifinger GaN HEMTs via Topside Diamond Integration 通过顶部钻石集成增强多指GaN hemt的冷却
IF 4.5 2区 工程技术
IEEE Electron Device Letters Pub Date : 2025-07-11 DOI: 10.1109/LED.2025.3588202
Daniel C. Shoemaker;Kelly Woo;Yiwen Song;Mohamadali Malakoutian;Bill Zivasatienraj;Puneet Srivastava;Isaac Wildeson;Srabanti Chowdhury;Sukwon Choi
{"title":"Enhanced Cooling of Multifinger GaN HEMTs via Topside Diamond Integration","authors":"Daniel C. Shoemaker;Kelly Woo;Yiwen Song;Mohamadali Malakoutian;Bill Zivasatienraj;Puneet Srivastava;Isaac Wildeson;Srabanti Chowdhury;Sukwon Choi","doi":"10.1109/LED.2025.3588202","DOIUrl":"https://doi.org/10.1109/LED.2025.3588202","url":null,"abstract":"Gallium nitride high electron mobility transistors (HEMTs) are key components for today’s 5G power amplifiers. However, device overheating requires commercial devices to operate under derated power levels. This work reports the cooling effectiveness of a top-side diamond heat spreader for a 16-finger GaN/SiC HEMT using gate resistance thermometry. A <inline-formula> <tex-math>$2~mu $ </tex-math></inline-formula>m thick diamond heat spreader was found to reduce the gate temperature rise by ~20% at 12 W/mm. Simulation results indicate that a diamond thickness greater than <inline-formula> <tex-math>$1.5~mu $ </tex-math></inline-formula>m is required to achieve a 10% reduction in the device thermal resistance (<inline-formula> <tex-math>${mathrm{R}}_{{text {Th}}}$ </tex-math></inline-formula>). To achieve a 10% reduction in the <inline-formula> <tex-math>${mathrm{R}}_{{text {Th}}}$ </tex-math></inline-formula>, the thermal conductivity of a <inline-formula> <tex-math>$2~mu $ </tex-math></inline-formula>m thick diamond layer needs to be greater than 450 W/m<inline-formula> <tex-math>$cdot $ </tex-math></inline-formula> K and the SiN protection layer should be thinner than 75 nm. The incorporation of topside diamond combined with replacing the SiC substrate with diamond was shown to reduce the <inline-formula> <tex-math>${mathrm{R}}_{{text {Th}}}$ </tex-math></inline-formula> by 42.2% compared to a standard GaN/SiC HEMT in simulation.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 9","pages":"1597-1600"},"PeriodicalIF":4.5,"publicationDate":"2025-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144918156","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Transfer Bonding Technology for Advanced 2.5-D Integration With Reduced Warpage and Improved Stacking Flexibility 先进的2.5维集成传输键合技术,减少翘曲和提高堆叠灵活性
IF 4.5 2区 工程技术
IEEE Electron Device Letters Pub Date : 2025-07-10 DOI: 10.1109/LED.2025.3587748
Yu-Lun Liu;Chao-Kai Hsu;Chih-Cheng Hsiao;Chun-Ta Li;Jia-Rui Lin;Kuan-Neng Chen
{"title":"A Transfer Bonding Technology for Advanced 2.5-D Integration With Reduced Warpage and Improved Stacking Flexibility","authors":"Yu-Lun Liu;Chao-Kai Hsu;Chih-Cheng Hsiao;Chun-Ta Li;Jia-Rui Lin;Kuan-Neng Chen","doi":"10.1109/LED.2025.3587748","DOIUrl":"https://doi.org/10.1109/LED.2025.3587748","url":null,"abstract":"A transfer bonding technology for advanced 2.5D integration with reduced warpage and improved stacking flexibility is presented. Molding-based and multi-RDL-layer based layer transfer are demonstrated for multiple stacking, both enabling high-density interposer integration without the need for CMP or complex lithography. Structural and electrical reliability is validated through optical inspection, SAT, SEM, and daisy-chain testing. Warpage measurements confirm a significant reduction across key process steps. The proposed transfer bonding technology provides a scalable and manufacturable solution for next-generation advanced packaging and heterogeneous integration.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 9","pages":"1609-1611"},"PeriodicalIF":4.5,"publicationDate":"2025-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144918411","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Leakage Suppression Across Temperature in Al1-xScxN Thin Film Ferroelectric Capacitors Through Boron Incorporation 硼掺入对Al1-xScxN薄膜铁电电容器跨温泄漏的抑制作用
IF 4.5 2区 工程技术
IEEE Electron Device Letters Pub Date : 2025-07-10 DOI: 10.1109/LED.2025.3587950
Pedram Yousefian;Xiaolei Tong;Jonathan Tan;Dhiren K. Pradhan;Deep Jariwala;Roy H. Olsson
{"title":"Leakage Suppression Across Temperature in Al1-xScxN Thin Film Ferroelectric Capacitors Through Boron Incorporation","authors":"Pedram Yousefian;Xiaolei Tong;Jonathan Tan;Dhiren K. Pradhan;Deep Jariwala;Roy H. Olsson","doi":"10.1109/LED.2025.3587950","DOIUrl":"https://doi.org/10.1109/LED.2025.3587950","url":null,"abstract":"This letter presents high-temperature ferroelectric characterization of 40 nm <inline-formula> <tex-math>${mathrm {Al}}_{text {1-x-y}}$ </tex-math></inline-formula>BxScyN (AlBScN) thin film capacitors grown by co-sputtering Al0.89B0.11 and Sc targets onto Pt(111)/Ti(002)/Si(100) substrates. Structural analysis confirmed a c-axis-oriented wurtzite structure with a low surface roughness of 1.37 nm. Ferroelectric switching, characterized by positive-up-negative-down (PUND) measurements up to 600° C, exhibited a linear decrease in coercive fields from 6.2 MV/cm at room temperature to 4.2 MV/cm at 600°C, while remanent polarization remained stable with temperature. Direct current I–V measurements highlight a significant suppression of leakage currents, over two orders of magnitude lower compared to AlScN capacitors fabricated under similar conditions. These results position AlBScN thin films as strong candidates for ferroelectric applications in extreme environments.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 9","pages":"1545-1548"},"PeriodicalIF":4.5,"publicationDate":"2025-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144918229","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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