{"title":"Modeling of Polarization Dynamics in HfO2-Based Ferroelectrics by Reduced L-K Model","authors":"Bing Chen;Haoran Yu;Wenhao Liu;Shuyu Zhang;Jiayi Zhao;Jifang Cao;Xuecheng Cui;Jiuren Zhou;Xiao Yu;Ran Cheng;Yan Liu;Genquan Han","doi":"10.1109/LED.2026.3697987","DOIUrl":"https://doi.org/10.1109/LED.2026.3697987","url":null,"abstract":"A multi-domain reduced <italic>L-K</i> model based on the physical fundamentals has been developed to mimic the dynamic behaviors of the HfO<sub>2</sub> -based ferroelectric (FE) devices. Based on the model, the calculated polarization-voltage (<italic>P-V</i>) curves coincide well with the experimental data from the fabricated metal-FE oxide-metal (MFM) samples with different Hf<inline-formula> <tex-math>${}_{mathbf {0.5}}$ </tex-math></inline-formula>Zr<inline-formula> <tex-math>${}_{mathbf {0.5}}$ </tex-math></inline-formula>O<inline-formula> <tex-math>${}_{mathbf {2}}$ </tex-math></inline-formula> (HZO) annealing temperature, showing excellent consistency. The readout waveform of the ferroelectric random-access memory (FRAM) is predicted using this model. In addition, this model was used to simulate the negative capacitance effect in the 1FE-Capacitor 1 resistor cell, demonstrating the reduced <italic>L-K</i> model is an efficient tool for ferroelectric circuit design and devices optimization.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"47 8","pages":"1547-1550"},"PeriodicalIF":4.6,"publicationDate":"2026-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148627302","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"MoS2:PVA-Based Flexible Optoelectronic Reconfigurable Memristor for Neuromorphic Computing","authors":"Harsh Ranjan;Parthasarathi Pal;Vivek Pratap Singh;Gulshan Kumar;Sanjay Kumar;Saurabh Kumar Pandey","doi":"10.1109/LED.2026.3699740","DOIUrl":"https://doi.org/10.1109/LED.2026.3699740","url":null,"abstract":"This letter presents a flexible Ag/MoS<sub>2</sub>: PVA/SiO<sub>2</sub>/Pt memristor featuring controllable transition between volatile self-rectifying threshold switching (SRTS) and non-volatile bipolar resistive switching dependent on compliance current (CC) and operating voltage. The device exhibits a high rectification ratio (<inline-formula> <tex-math>$sim {10}^{{3}}$ </tex-math></inline-formula>) and ultrafast relaxation (~170 ns) time in SRTS mode, functioning as an effective selector. In non-volatile mode, it exhibits stable multi-level storage and persistence photoconductivity (PPC) under a red light source, enabling optoelectronic synaptic emulation. Integrated NeurosimV 3.0 hardware simulation reveals weight updates (<inline-formula> <tex-math>$textit {NL}_{{P}/{D}} approx {4}.{21}/-{4}.{86}$ </tex-math></inline-formula>) functionality and achieves 85% MNIST handwritten dataset classification accuracy. These results provide a robust, single-layer optoelectronic memristive hardware platform for integrated sensing, cell selection, and neuromorphic computing in flexible electronics.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"47 8","pages":"1583-1586"},"PeriodicalIF":4.6,"publicationDate":"2026-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148627801","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Zuowei Zhang;Yuanquan Huang;Junshuai Chai;Xiaolei Wang;Zhicheng Wu;Tiancheng Gong;Qing Luo
{"title":"Role of Interlayer and Interfacial Traps in Endurance Degradation of FeFETs","authors":"Zuowei Zhang;Yuanquan Huang;Junshuai Chai;Xiaolei Wang;Zhicheng Wu;Tiancheng Gong;Qing Luo","doi":"10.1109/LED.2026.3706090","DOIUrl":"https://doi.org/10.1109/LED.2026.3706090","url":null,"abstract":"In this work, the impact of interlayer and interface defects on the endurance of ferroelectric field-effect transistors (FeFET) is quantified. First, the sub-millisecond “Multi-Spots” characterization is used to capture the fast trap during cycling test across the wide temperature range (4-300K), which are typically masked under conventional defect probing methods. A quantum mechanically (QM) solved nonradiative multi-phonon (NMP) model is adopted, enabling consistent extraction of the trap band across different temperatures and cycling conditions. We reveal the crucial role of interface defects (Si-Int) on the FeFET endurance at cryogenic temperature, whereas the generation of interlayer defect (IL, <italic>cf.</i> SiO<sub>2</sub>) dominates at 150 and 300K. The observed endurance degradation can be reproduced by increasing the densities of the extracted Si-Int and IL trap, and understood as an enhanced propagation of the degradation from the channel interface into the SiO<sub>2</sub> interlayer with increasing temperature. Cryogenic conditions (4K) effectively “freeze” this progression, confining the degradation to the interface. By accurately modelling the interface and the IL bulk degradation, this work provides a physical basis for understanding and engineering the FeFET reliability across a wide temperature range.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"47 8","pages":"1555-1558"},"PeriodicalIF":4.6,"publicationDate":"2026-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11574645","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148628127","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Changes to the Editorial Board","authors":"Kelin J. Kuhn","doi":"10.1109/LED.2026.3707327","DOIUrl":"https://doi.org/10.1109/LED.2026.3707327","url":null,"abstract":"","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"47 8","pages":"1497-1497"},"PeriodicalIF":4.6,"publicationDate":"2026-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11627136","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148626396","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Modulating Oxygen Vacancy Concentration for High-Performance Undoped HfO2 Ferroelectric Capacitors","authors":"Xuanxi Liu;Yang Yang;Guanlin Li;Zhiquan He;Xiuyi Wang;Boping Wang;Shibo Wang;Xiangli Zhou;Pengfei Jiang;Tiancheng Gong;Wei Wei;Xiao Long;Yuan Wang;Qing Luo","doi":"10.1109/LED.2026.3702735","DOIUrl":"https://doi.org/10.1109/LED.2026.3702735","url":null,"abstract":"Ferroelectric HfO<sub>2</sub> thin film has attracted considerable attention due to its ability to induce ferroelectricity without doping. However, its performance is still far inferior to that of doped HfO<sub>2</sub>-based ferroelectric films, which limits its further development. In this study, the ferroelectric performance of TiN/HfO<sub>2</sub>/TiN devices was significantly enhanced by modulating the oxygen vacancy concentration in undoped HfO<sub>2</sub> films. TEM and EELS analysis demonstrate that the increase in oxygen vacancy concentration within the undoped HfO<sub>2</sub> film promotes the crystallization of the ferroelectric o-phase, accompanied by an increase in dielectric constant, leading to a substantial enhancement in device performance. Ultimately, the TiN/HfO<sub>2</sub>/TiN ferroelectric capacitor achieved a high remanent polarization (2P<inline-formula> <tex-math>${}_{text {r}} sim ~40~mu $ </tex-math></inline-formula>C/cm<inline-formula> <tex-math>${}^{{2}}text {)}$ </tex-math></inline-formula>. Under an electric field of 2.5 MV/cm, the device sustained over <inline-formula> <tex-math>$4times 10^{{9}}$ </tex-math></inline-formula> switching cycles before hard breakdown.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"47 8","pages":"1571-1574"},"PeriodicalIF":4.6,"publicationDate":"2026-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148627677","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Double-Hump Behavior in Multilayer IGZO FETs for 3D DRAM","authors":"Tiantian Wei;Jing Liang;Xuezheng Ai;Jianqi Chen;Chao Zhao","doi":"10.1109/LED.2026.3704544","DOIUrl":"https://doi.org/10.1109/LED.2026.3704544","url":null,"abstract":"Multilayer vertical channel-all-around (CAA) field-effect transistors (FETs) with amorphous indium-gallium-zinc-oxide (IGZO) channels for high-density 3D DRAM were prepared. This innovative architecture enables a cost-effective fabrication process and improves fabrication efficiency, as transistors on all layers share a single lithography and etching step, as well as the subsequent continuous deposition of the channel layer, gate insulator layer, and gate electrode. To analyze the origin of the double-hump phenomenon in the transfer curve, a parasitic-channel model was proposed and TCAD simulations were performed. It can be concluded that the parasitic-channel IGZO grown on oxide has more oxygen vacancies compared to the main-channel IGZO grown on nitride. A higher concentration of donor oxygen vacancies generates more electrons, which causes the parasitic channel to turn on the transistor earlier than the main channel, leading to the double-hump phenomenon. When the parasitic channel is removed, the double-hump effect disappears, which has been verified by both simulation and experimental results.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"47 8","pages":"1559-1562"},"PeriodicalIF":4.6,"publicationDate":"2026-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148628038","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"600 V/1 A Enhancement-Mode β-Ga2O3 MOSFETs With Graded Doping Engineering","authors":"Hongqing Yue;Chenlu Wang;Hong Zhou;Jianghan Zhao;Yue Hao;Jincheng Zhang","doi":"10.1109/LED.2026.3701514","DOIUrl":"https://doi.org/10.1109/LED.2026.3701514","url":null,"abstract":"In this letter, we have demonstrated high performance enhancement-mode (E-mode) <inline-formula> <tex-math>$beta $ </tex-math></inline-formula>-Ga<sub>2</sub>O<sub>3</sub> recessed-gate metal-oxide-semiconductor field-effect- transistors (RG-MOSFETs) with ampere-level drain current (<inline-formula> <tex-math>${I}_{text {D}}text {)}$ </tex-math></inline-formula> and > 600 V breakdown voltage (BV) via graded channel doping engineering. With the n<sup>+</sup>- and n-Ga<sub>2</sub>O<sub>3</sub> layers beneath the gate etched and the unintentional doped- (UID-)Ga<sub>2</sub>O<sub>3</sub> preserved, the threshold voltage (<inline-formula> <tex-math>${V}_{text {TH}}text {)}$ </tex-math></inline-formula> with high uniformity of 9 V, a recorded top-gate E-mode <inline-formula> <tex-math>${I}_{text {D}}$ </tex-math></inline-formula> of 130 mA/mm and low specific on-resistance (<inline-formula> <tex-math>${R}_{text {on, {sp}}}text {)}$ </tex-math></inline-formula> of 19 m<inline-formula> <tex-math>$Omega cdot $ </tex-math></inline-formula>cm<sup>2</sup> are all achieved for small periphery FETs. Combined with source and gate field plates (FP), the small periphery RG-MOSFET with gate-to-drain spacing (<inline-formula> <tex-math>${L}_{text {GD}}text {)}$ </tex-math></inline-formula> of <inline-formula> <tex-math>$10~mu $ </tex-math></inline-formula>m demonstrates a high <italic>BV</i> of <inline-formula> <tex-math>$2.46~{k}$ </tex-math></inline-formula>V, yielding a state-of-the-art power figure of merit (P-FOM) of 318 MW/cm<sup>2</sup>. By scaling the gate width (<inline-formula> <tex-math>${W}_{text {ch}}text {)}$ </tex-math></inline-formula> to 20 mm, Ampere-level <inline-formula> <tex-math>${I}_{text {D}}$ </tex-math></inline-formula> with <italic>BV > 600</i> V was also achieved with <inline-formula> <tex-math>${V}_{text {TH}}$ </tex-math></inline-formula> maintained to be ~9 V, showing a high process variation immunity. Given the significant potential of <inline-formula> <tex-math>$beta $ </tex-math></inline-formula>-Ga<sub>2</sub>O<sub>3</sub> MOSFETs in power devices, such E-mode high-current and high-voltage results verify their great promises for next-generation electronics.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"47 8","pages":"1535-1538"},"PeriodicalIF":4.6,"publicationDate":"2026-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148628103","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"High-Gain Hydrogen-Terminated Diamond Logic Circuits With Low Power-Consumption","authors":"Lei Ge;Siying Gao;Xuemin Zhao;Mingyang Wang;Yaxin Li;Runlei Zhang;Xiaohua Chen;Saibin Han;Yingnan Wang;Yan Peng;Zai-xing Yang;Jisheng Han;Mingsheng Xu;Xiangang Xu","doi":"10.1109/LED.2026.3701759","DOIUrl":"https://doi.org/10.1109/LED.2026.3701759","url":null,"abstract":"Hydrogen-terminated diamond field effect transistors (FETs) are typically depletion-mode devices, which limits their application in low-power-consumption logic circuits. Here, high-performance inverters and ring oscillators have been demonstrated by using normally-off Al/BaF<sub>2</sub>/H-diamond FETs. The adoption of enhancement-mode transistors enables the realization of low-static-power logic circuits by employing diamond FETs with different channel lengths as load and driver devices. The peak gain of the inverter increases from −100 V/V to −460 V/V as the supply voltage ranges from −1 V to −5 V with a static power consumption low to ~1 pW, marking the highest gain reported for diamond-based inverters. Furthermore, a five-stage ring oscillator operates at 58.8 kHz with a stage delay of <inline-formula> <tex-math>$1.7~mu $ </tex-math></inline-formula>s under a supply voltage of −3 V, marking the first successful implementation of a diamond-based ring oscillator. These results highlight the great potential of diamond technology for high-speed power integrated circuit applications.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"47 8","pages":"1655-1658"},"PeriodicalIF":4.6,"publicationDate":"2026-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11560869","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148626760","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"High-Voltage GaN Polarization Superjunction HEMT Resisting Dynamic On-Resistance Degradation Through the 2DHG Shielding of the Surface Charge Trapping","authors":"Dequ Gu;Huaize Liu;Hui Guo;Pengfei Shao;Ruiling Gong;Guang Qiao;Yugang Zhou;Bin Liu;Hai Lu;Rong Zhang;Youdou Zheng;Dunjun Chen","doi":"10.1109/LED.2026.3698956","DOIUrl":"https://doi.org/10.1109/LED.2026.3698956","url":null,"abstract":"In this letter, we report a high-voltage GaN polarization superjunction (PSJ) high-electron-mobility transistor (HEMT) with ultralow dynamic on-resistance (<inline-formula> <tex-math>${R}_{text {ON}}text {)}$ </tex-math></inline-formula> degradation. Compared with the Ref-HEMT (without PSJ structure), the PSJ-HEMT exhibits much higher breakdown voltage, which exceeds 4200 V with a gate-to-drain distance of <inline-formula> <tex-math>$30~mu $ </tex-math></inline-formula>m, corresponding to a breakdown field of 1.4 MV/cm. More importantly, PSJ-HEMT shows outstanding resistance to dynamic <inline-formula> <tex-math>${R}_{text {ON}}$ </tex-math></inline-formula> degradation, maintaining an ultralow dynamictostatic <inline-formula> <tex-math>${R}_{text {ON}}$ </tex-math></inline-formula> ratio of 1.59 after a 10ms, 1500V offstate stress. These improvements are further analyzed by electric-field simulations and temperature-dependent stress measurements, being attributed to the flattening of the lateral electric field and the screening of surface charge trapping by the 2DHG in the PSJ structure. This work demonstrates the strong potential of PSJ-HEMTs for future power applications.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"47 8","pages":"1531-1534"},"PeriodicalIF":4.6,"publicationDate":"2026-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148627682","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Ahmet Camlica;Yagiz Mart;Peter M. Levine;Denny L. Lee;Karim S. Karim
{"title":"Improved Energy Resolution in Amorphous Selenium X-Ray Detectors via Unipolar Charge Sensing","authors":"Ahmet Camlica;Yagiz Mart;Peter M. Levine;Denny L. Lee;Karim S. Karim","doi":"10.1109/LED.2026.3707424","DOIUrl":"https://doi.org/10.1109/LED.2026.3707424","url":null,"abstract":"This letter presents a unipolar charge-sensing amorphous selenium (a-Se) detector architecture addressing spectral limitations of conventional planar designs, where incomplete, depth-dependent electron collection leads to photopeak broadening and low-energy tailing. Detectors with <inline-formula> <tex-math>$20~upmu text {m}$ </tex-math></inline-formula> pixel pitch were fabricated and characterized using pulse-height spectroscopy. Transient measurements indicate that unipolar sensing effectively suppresses the influence of slow electron transport on the detector response, reducing rise time from 0.6–<inline-formula> <tex-math>$22.4~upmu text {s}$ </tex-math></inline-formula> to <inline-formula> <tex-math>$150~pm ~11$ </tex-math></inline-formula> ns. The proposed architecture achieves an energy resolution of 8.3 keV FWHM at 59.5 keV with suppressed spectral tailing, demonstrating a scalable pathway toward high-performance a-Se photon-counting detectors for applications such as spectral mammography.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"47 8","pages":"1635-1638"},"PeriodicalIF":4.6,"publicationDate":"2026-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148627788","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}