{"title":"在图案蓝宝石衬底上的垂直GaN二极管的稳健雪崩(1.5 kV, 2 kA/cm²)","authors":"Yifan Wang;Ming Xiao;Zineng Yang;Matthew Porter;Kai Cheng;Qihao Song;Ivan Kravchenko;Yuhao Zhang","doi":"10.1109/LED.2025.3548905","DOIUrl":null,"url":null,"abstract":"The lack of avalanche capability is a key limitation of current lateral GaN devices. Despite the report of avalanche in vertical GaN-on-GaN devices, the high wafer cost hinders device commercialization. Here we demonstrate a circuit-level avalanche in vertical GaN diodes on low-cost patterned sapphire substrate (PSS), with the avalanche voltage (1.57 kV) and avalanche current density (>2 kA/cm2) both being the highest reported in GaN devices on foreign substrates. The PSS enables a lower dislocation density than conventional sapphire substrate and is employed in high-voltage GaN devices for the first time. The avalanche voltage in the circuit test reaches 98% of the parallel-plane limit, further affirming that near-ideal avalanche breakdown can be realized on GaN devices on foreign substrates. These results show the promise of the GaN-on-PSS platform for low-cost, robust power devices.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 5","pages":"717-720"},"PeriodicalIF":4.1000,"publicationDate":"2025-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Robust Avalanche (1.5 kV, 2 kA/cm²) in Vertical GaN Diodes on Patterned Sapphire Substrate\",\"authors\":\"Yifan Wang;Ming Xiao;Zineng Yang;Matthew Porter;Kai Cheng;Qihao Song;Ivan Kravchenko;Yuhao Zhang\",\"doi\":\"10.1109/LED.2025.3548905\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The lack of avalanche capability is a key limitation of current lateral GaN devices. Despite the report of avalanche in vertical GaN-on-GaN devices, the high wafer cost hinders device commercialization. Here we demonstrate a circuit-level avalanche in vertical GaN diodes on low-cost patterned sapphire substrate (PSS), with the avalanche voltage (1.57 kV) and avalanche current density (>2 kA/cm2) both being the highest reported in GaN devices on foreign substrates. The PSS enables a lower dislocation density than conventional sapphire substrate and is employed in high-voltage GaN devices for the first time. The avalanche voltage in the circuit test reaches 98% of the parallel-plane limit, further affirming that near-ideal avalanche breakdown can be realized on GaN devices on foreign substrates. These results show the promise of the GaN-on-PSS platform for low-cost, robust power devices.\",\"PeriodicalId\":13198,\"journal\":{\"name\":\"IEEE Electron Device Letters\",\"volume\":\"46 5\",\"pages\":\"717-720\"},\"PeriodicalIF\":4.1000,\"publicationDate\":\"2025-03-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Electron Device Letters\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10915640/\",\"RegionNum\":2,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Electron Device Letters","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10915640/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Robust Avalanche (1.5 kV, 2 kA/cm²) in Vertical GaN Diodes on Patterned Sapphire Substrate
The lack of avalanche capability is a key limitation of current lateral GaN devices. Despite the report of avalanche in vertical GaN-on-GaN devices, the high wafer cost hinders device commercialization. Here we demonstrate a circuit-level avalanche in vertical GaN diodes on low-cost patterned sapphire substrate (PSS), with the avalanche voltage (1.57 kV) and avalanche current density (>2 kA/cm2) both being the highest reported in GaN devices on foreign substrates. The PSS enables a lower dislocation density than conventional sapphire substrate and is employed in high-voltage GaN devices for the first time. The avalanche voltage in the circuit test reaches 98% of the parallel-plane limit, further affirming that near-ideal avalanche breakdown can be realized on GaN devices on foreign substrates. These results show the promise of the GaN-on-PSS platform for low-cost, robust power devices.
期刊介绍:
IEEE Electron Device Letters publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors.