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11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)最新文献

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2.5 V-driven Nch 3rd generation trench gate MOSFET 2.5 v驱动Nch第三代沟栅MOSFET
11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312) Pub Date : 1999-05-26 DOI: 10.1109/ISPSD.1999.764099
A. Osawa, Y. Kanemaru, N. Matsuda, T. Yoneda, H. Matsuki, Y. Usui, Y. Baba
{"title":"2.5 V-driven Nch 3rd generation trench gate MOSFET","authors":"A. Osawa, Y. Kanemaru, N. Matsuda, T. Yoneda, H. Matsuki, Y. Usui, Y. Baba","doi":"10.1109/ISPSD.1999.764099","DOIUrl":"https://doi.org/10.1109/ISPSD.1999.764099","url":null,"abstract":"We developed a 3rd generation trench gate MOSFET driven by a gate voltage of 2.5 V. The on-resistance (R/sub on/) of the 3rd generation device has been reduced by 40% compared with the conventional (2nd generation) device, to the value of 12 m/spl Omega/ maximum (at V/sub GS/=2.5 V) by using certain techniques. In order to reduce the R/sub on/ value, it is necessary to thin the epitaxial layer and shrink the chip size. In order to thin the epitaxial layer, it is important to control trench depth exactly to maintain the drain-source breakdown voltage (V/sub DSS/). This is done by using a trench RIE machine with an in-situ monitoring system. For shrinkage of the chip size, a narrow trench formation process and a double trench (additional contact trench) structure are applied to the 3rd generation trench gate MOSFET. Using these new techniques, we succeeded in the development of a 3rd generation trench gate MOSFET with the lowest R/sub on/ value reported to date.","PeriodicalId":352185,"journal":{"name":"11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124472550","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Analysis of the effect of charge imbalance on the static and dynamic characteristics of the super junction MOSFET 电荷不平衡对超级结MOSFET静态和动态特性的影响分析
11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312) Pub Date : 1999-05-26 DOI: 10.1109/ISPSD.1999.764069
P. M. Shenoy, Ateet Bhalla, G. Dolny
{"title":"Analysis of the effect of charge imbalance on the static and dynamic characteristics of the super junction MOSFET","authors":"P. M. Shenoy, Ateet Bhalla, G. Dolny","doi":"10.1109/ISPSD.1999.764069","DOIUrl":"https://doi.org/10.1109/ISPSD.1999.764069","url":null,"abstract":"In this paper, a novel device called the super junction MOSFET is analyzed using analytical modeling and numerical simulations. The effect of charge imbalance between the N and P pillars on the static and dynamic characteristics of the device is studied in detail. Simulations predict that this device is highly sensitive to charge imbalance if designed for optimum on-resistance. The breakdown voltage (BV) and E/sub off/ sensitivity can be reduced considerably by degrading the specific on-resistance R/sub on,sp/. The physics of the static and dynamic behaviour of this device under charge imbalance is explained with the help of numerical simulations.","PeriodicalId":352185,"journal":{"name":"11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127440818","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 147
0.35 /spl mu/m, 43 /spl mu//spl Omega/cm/sup 2/, 6 m/spl Omega/ power MOSFET to power future microprocessor 0.35 /spl mu/m, 43 /spl mu//spl Omega/cm/sup 2/， 6 m/spl Omega/功率MOSFET为未来的微处理器供电
11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312) Pub Date : 1999-05-26 DOI: 10.1109/ISPSD.1999.764058
N. Sun, A.Q. Huang, F.C. Lee
{"title":"0.35 /spl mu/m, 43 /spl mu//spl Omega/cm/sup 2/, 6 m/spl Omega/ power MOSFET to power future microprocessor","authors":"N. Sun, A.Q. Huang, F.C. Lee","doi":"10.1109/ISPSD.1999.764058","DOIUrl":"https://doi.org/10.1109/ISPSD.1999.764058","url":null,"abstract":"In this paper, a lateral power MOSFET using 0.35 /spl mu/m VLSI CMOS technology is demonstrated to have a 6 m/spl Omega/ on-resistance and a gate charge of 2.7 nC. For high frequency, low voltage power switching conversion applications, the deep sub-micron CMOS/BiCMOS based technology is clearly superior to conventional vertical power MOSFET technology.","PeriodicalId":352185,"journal":{"name":"11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)","volume":"150 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125773528","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Industrial relevance of deep junctions produced by rapid thermal processing for power integrated circuits 电力集成电路快速热加工产生的深结的工业相关性
11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312) Pub Date : 1999-05-26 DOI: 10.1109/ISPSD.1999.764107
J. Dilhac, L. Cornibert, B. Morillon, S. Roux, C. Ganibal
{"title":"Industrial relevance of deep junctions produced by rapid thermal processing for power integrated circuits","authors":"J. Dilhac, L. Cornibert, B. Morillon, S. Roux, C. Ganibal","doi":"10.1109/ISPSD.1999.764107","DOIUrl":"https://doi.org/10.1109/ISPSD.1999.764107","url":null,"abstract":"An alternative method for creating total vertical junction insulation for power devices is presented. It involves the thermomigration of molten Al/Si. First, the method is theoretically detailed. A full description of the equipment required for this task is then given with special emphasis on the specific characteristics needed. Physical and electrical results are briefly discussed, showing the efficiency of the method in terms of surface consumption and voltage handling capability. Finally, application of thermomigration to a manufacturing environment is considered.","PeriodicalId":352185,"journal":{"name":"11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128946518","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
High performance wide trench IGBTs for motor control applications 用于电机控制应用的高性能宽沟igbt
11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312) Pub Date : 1999-05-26 DOI: 10.1109/ISPSD.1999.764039
A. Bhalla, J. Gladish, A. Polny, P. Sargeant, G. Dolny
{"title":"High performance wide trench IGBTs for motor control applications","authors":"A. Bhalla, J. Gladish, A. Polny, P. Sargeant, G. Dolny","doi":"10.1109/ISPSD.1999.764039","DOIUrl":"https://doi.org/10.1109/ISPSD.1999.764039","url":null,"abstract":"IGBTs with wide trench widths offer the possibility of an improved trade-off between conduction and switching loss due to the injection enhancement effect, while preserving the devices' short-circuit withstand capability. This makes them promising candidates for motor control applications. 600 V IGBTs with trench widths of 8-12 /spl mu/m have been successfully fabricated with excellent electrical characteristics. The critical trench shaping process is accomplished by the use of a long LOCOS-like oxidation after the deep and wide trench has been etched. They offer low on-state voltage drops, low turn-off losses, square RBSOA and good short-circuit capability.","PeriodicalId":352185,"journal":{"name":"11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117098692","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Electro-thermal instability in low voltage power MOS: Experimental characterization 低压功率MOS的电热不稳定性:实验表征
11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312) Pub Date : 1999-05-26 DOI: 10.1109/ISPSD.1999.764106
G. Breglio, F. Frisina, A. Magri, P. Spirito
{"title":"Electro-thermal instability in low voltage power MOS: Experimental characterization","authors":"G. Breglio, F. Frisina, A. Magri, P. Spirito","doi":"10.1109/ISPSD.1999.764106","DOIUrl":"https://doi.org/10.1109/ISPSD.1999.764106","url":null,"abstract":"In this paper, we present experimental results of dynamic thermal mapping on a new class of low voltage high current power MOSFETs. The reported results underline that, as in the case of power BJTs, the hot-spot phenomenon also occurs in this class of devices. Moreover, we give a theoretical interpretation of this phenomenon and propose a novel approach to understand the causes that can determine the temperature instabilities in such MOS devices.","PeriodicalId":352185,"journal":{"name":"11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)","volume":"74 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126831067","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 25
Self-aligned and shielded-RESURF LDMOS for dense 20 V power IC's 用于高密度20v功率集成电路的自对准和屏蔽复用LDMOS
11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312) Pub Date : 1999-05-26 DOI: 10.1109/ISPSD.1999.764060
A. Ludikhuize
{"title":"Self-aligned and shielded-RESURF LDMOS for dense 20 V power IC's","authors":"A. Ludikhuize","doi":"10.1109/ISPSD.1999.764060","DOIUrl":"https://doi.org/10.1109/ISPSD.1999.764060","url":null,"abstract":"A self-aligned 20 V logic-level n-channel LDMOS has been integrated in a 0.6 /spl mu/m BiCMOS process, using a LATID (large angle tilted implementation drain) boron backgate implantation combined with co-implanted arsenic as a low-ohmic link under the spacer. In addition, a shielded RESURF LDMOS is reported for use as a low-side transistor in power converters, suited for 20 V in VLSI with a single thin gate oxide. This transistor suppresses parasitic injection in the substrate and uses a buried p on buried n/sup +/ layer.","PeriodicalId":352185,"journal":{"name":"11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)","volume":"15 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130495628","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
A comparative study of high voltage (4 kV) power rectifiers PiN/MPS/SSD/SPEED 高压(4kv)功率整流器PiN/MPS/SSD/SPEED的比较研究
11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312) Pub Date : 1999-05-26 DOI: 10.1109/ISPSD.1999.764085
S. Sawant, B. J. Baliga
{"title":"A comparative study of high voltage (4 kV) power rectifiers PiN/MPS/SSD/SPEED","authors":"S. Sawant, B. J. Baliga","doi":"10.1109/ISPSD.1999.764085","DOIUrl":"https://doi.org/10.1109/ISPSD.1999.764085","url":null,"abstract":"This paper provides for the first time a comparative experimental study of different high voltage power rectifier structures designed based on the anode injection efficiency control concept. Trade-off curves of peak reverse current density, reverse recovery charge extracted and reverse dJ/dt versus forward voltage drop showed the merged PiN-Schottky (MPS), self-adapting P-emitter diode (SPEED), and static shielding diode (SSD) rectifiers to have far superior switching characteristics when compared to conventional PiN diodes. The uniform carrier distribution observed in the MPS/SPEED/SSD rectifiers leads to a universal trade-off curve in anode injection efficiency control diodes that is inherently superior to that obtained through lifetime control techniques. The SPEED rectifier is most attractive for high voltage applications due to its low reverse leakage current, while the MPS rectifier provides an excellent alternative to the high voltage PiN diode due to the identical fabrication process and its superior switching characteristics.","PeriodicalId":352185,"journal":{"name":"11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129892185","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 19
Comparison of RF performance of vertical and lateral DMOSFET 垂直和横向DMOSFET射频性能的比较
11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312) Pub Date : 1999-05-26 DOI: 10.1109/ISPSD.1999.764109
M. Trivedi, K. Shenai
{"title":"Comparison of RF performance of vertical and lateral DMOSFET","authors":"M. Trivedi, K. Shenai","doi":"10.1109/ISPSD.1999.764109","DOIUrl":"https://doi.org/10.1109/ISPSD.1999.764109","url":null,"abstract":"Despite the increasing popularity of Si MOSFETs in RF applications, detailed physical understanding has yet to be developed with regard to the relative RF performance of VDMOSFETs and LDMOSFETs. In this paper, a critical comparison is made between the performance of VDMOSFETs and LDMOSFETs developed for RF power applications. Device performance is investigated using experimental characterization and numerical simulation. It is shown that LDMOSFETs have better RF performance than VDMOS due to structural differences between the two devices.","PeriodicalId":352185,"journal":{"name":"11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134107986","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
A 4H-SiC trench MOS barrier Schottky (TMBS) rectifier 一种4H-SiC沟槽MOS势垒肖特基整流器
11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312) Pub Date : 1999-05-26 DOI: 10.1109/ISPSD.1999.764088
V. Khemka, V. Ananthan, T. Chow
{"title":"A 4H-SiC trench MOS barrier Schottky (TMBS) rectifier","authors":"V. Khemka, V. Ananthan, T. Chow","doi":"10.1109/ISPSD.1999.764088","DOIUrl":"https://doi.org/10.1109/ISPSD.1999.764088","url":null,"abstract":"We present the first experimental demonstration of a 4H-SiC trench MOS barrier Schottky (TMBS) rectifier. The forward and reverse characteristics of the TMBS devices are studied as a function of various design parameters and compared with those of planar Schottky and planar PiN rectifiers. More than two orders of magnitude improvement in the leakage current has been obtained over a Ni/4H-SiC Schottky rectifier. Dynamic switching measurements on the device indicated negligible reverse recovery current.","PeriodicalId":352185,"journal":{"name":"11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130134876","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
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