2.5 V-driven Nch 3rd generation trench gate MOSFET

A. Osawa, Y. Kanemaru, N. Matsuda, T. Yoneda, H. Matsuki, Y. Usui, Y. Baba
{"title":"2.5 V-driven Nch 3rd generation trench gate MOSFET","authors":"A. Osawa, Y. Kanemaru, N. Matsuda, T. Yoneda, H. Matsuki, Y. Usui, Y. Baba","doi":"10.1109/ISPSD.1999.764099","DOIUrl":null,"url":null,"abstract":"We developed a 3rd generation trench gate MOSFET driven by a gate voltage of 2.5 V. The on-resistance (R/sub on/) of the 3rd generation device has been reduced by 40% compared with the conventional (2nd generation) device, to the value of 12 m/spl Omega/ maximum (at V/sub GS/=2.5 V) by using certain techniques. In order to reduce the R/sub on/ value, it is necessary to thin the epitaxial layer and shrink the chip size. In order to thin the epitaxial layer, it is important to control trench depth exactly to maintain the drain-source breakdown voltage (V/sub DSS/). This is done by using a trench RIE machine with an in-situ monitoring system. For shrinkage of the chip size, a narrow trench formation process and a double trench (additional contact trench) structure are applied to the 3rd generation trench gate MOSFET. Using these new techniques, we succeeded in the development of a 3rd generation trench gate MOSFET with the lowest R/sub on/ value reported to date.","PeriodicalId":352185,"journal":{"name":"11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.1999.764099","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6

Abstract

We developed a 3rd generation trench gate MOSFET driven by a gate voltage of 2.5 V. The on-resistance (R/sub on/) of the 3rd generation device has been reduced by 40% compared with the conventional (2nd generation) device, to the value of 12 m/spl Omega/ maximum (at V/sub GS/=2.5 V) by using certain techniques. In order to reduce the R/sub on/ value, it is necessary to thin the epitaxial layer and shrink the chip size. In order to thin the epitaxial layer, it is important to control trench depth exactly to maintain the drain-source breakdown voltage (V/sub DSS/). This is done by using a trench RIE machine with an in-situ monitoring system. For shrinkage of the chip size, a narrow trench formation process and a double trench (additional contact trench) structure are applied to the 3rd generation trench gate MOSFET. Using these new techniques, we succeeded in the development of a 3rd generation trench gate MOSFET with the lowest R/sub on/ value reported to date.
2.5 v驱动Nch第三代沟栅MOSFET
我们开发了由2.5 V栅极电压驱动的第三代沟槽栅极MOSFET。与传统(第二代)器件相比,第三代器件的导通电阻(R/sub on/)通过某些技术降低了40%,达到12 m/spl ω /最大值(在V/sub GS/=2.5 V时)。为了降低R/sub /值,必须对外延层进行薄化和缩小芯片尺寸。为了使外延层变薄,必须精确控制沟槽深度以保持漏源击穿电压(V/sub DSS/)。这是通过使用带有现场监测系统的沟槽RIE机器完成的。为了缩小芯片尺寸,第三代沟槽栅极MOSFET采用窄沟槽形成工艺和双沟槽(附加接触沟槽)结构。利用这些新技术,我们成功地开发了第三代沟栅MOSFET,具有迄今为止报道的最低R/sub on/值。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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