H. J. Bruggers, R. Rongen, C.P. Meeuwsen, A. Ludikhuize
{"title":"Reliability problems due to ionic conductivity of IC encapsulation materials under high voltage conditions","authors":"H. J. Bruggers, R. Rongen, C.P. Meeuwsen, A. Ludikhuize","doi":"10.1109/ISPSD.1999.764096","DOIUrl":"https://doi.org/10.1109/ISPSD.1999.764096","url":null,"abstract":"In high voltage integrated circuits operating at high temperatures, the strong electric field spreading out from the high voltage bond pad via the encapsulation material is responsible for charge accumulation at the interface towards the nitride passivation layer. In low-voltage circuit blocks, this might lead to parasitic leakage currents. The physical background on the dynamics of the charge redistribution within the encapsulation material is discussed. With a proposed model, we show that the ionic conductivity is the root cause of the problem. Therefore, malfunction of the low voltage circuit blocks can be suppressed to a large extent by using very pure encapsulation materials.","PeriodicalId":352185,"journal":{"name":"11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131209132","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
K. Yoshikawa, T. Koga, T. Fujii, T. Katoh, Y. Takahashi, Y. Seki
{"title":"A novel IGBT chip design concept of high turn-off current capability and high short circuit capability for 2.5 kV power pack IGBT","authors":"K. Yoshikawa, T. Koga, T. Fujii, T. Katoh, Y. Takahashi, Y. Seki","doi":"10.1109/ISPSD.1999.764091","DOIUrl":"https://doi.org/10.1109/ISPSD.1999.764091","url":null,"abstract":"A novel concept for achieving high electrical withstand capability on a high power IGBT is discussed in this paper. It should be noted that high turn-off capability of 6600 amperes (at peak collector voltage=2500 V, T/sub j/=125/spl deg/C) and the short circuit capability of over 50 /spl mu/s (at V/sub CC/=1600 V, T/sub j/=125/spl deg/C) are successfully attained by a newly developed power pack IGBT. In this paper, simulation results based upon the novel design concept are presented. Furthermore, experimental results are demonstrated to corroborate the simulation results.","PeriodicalId":352185,"journal":{"name":"11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130933010","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
R. Saito, Y. Koike, A. Tanaka, T. Kushima, H. Shimizu, S. Nonoyama
{"title":"Advanced high current, high reliable IGBT module with improved multi-chip structure","authors":"R. Saito, Y. Koike, A. Tanaka, T. Kushima, H. Shimizu, S. Nonoyama","doi":"10.1109/ISPSD.1999.764074","DOIUrl":"https://doi.org/10.1109/ISPSD.1999.764074","url":null,"abstract":"Advanced IGBT module technology to realize high reliability and high current capability was presented. The 60,000 cycles long term power cycle capability of the low thermal expansion base module was demonstrated. A stress release tall mounting structure and a ceramic metal pull back structure were shown to be essential for high thermal cycle capability. A multi-end main terminal with multichip substrate and high resistivity sense emitter terminal technology was applied to realize high current capability and uniformity in the large high power module.","PeriodicalId":352185,"journal":{"name":"11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128169917","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Power semiconductor device modelling dedicated to circuit simulation","authors":"P. Leturcq","doi":"10.1109/ISPSD.1999.764034","DOIUrl":"https://doi.org/10.1109/ISPSD.1999.764034","url":null,"abstract":"The aim of this paper is to recall the problematics of circuit simulation in the field of power electronics and to critically review recent approaches to semiconductor device modelling for that purpose. In particular, as far as hardware problems are concerned, the discussion puts forward the need for physics-based models taking into account the distributed nature of charge carrier transport.","PeriodicalId":352185,"journal":{"name":"11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)","volume":"185 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123253132","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"MOS bipolar gate IGBT operation","authors":"M.D. Bobde, T. Minato, N. Thapar, B. J. Baliga","doi":"10.1109/ISPSD.1999.764092","DOIUrl":"https://doi.org/10.1109/ISPSD.1999.764092","url":null,"abstract":"A new IGBT with a P/sup +/ diverter which is connected to the gate through a series resistance, is proposed in this paper. It was observed from simulations that providing a small current through the diverter resulted in a significant decrease in the device on-state voltage drop. Measurements on fabricated 4 kV IGBTs showed a forward voltage drop of 2.78 V (at collector current density of 100 A/cm/sup 2/) for diverter current of 10 mA (7.38 A/cm/sup 2/), as compared to 3.09 V of the conventional IGBT (without a diverter). After electron irradiation, the devices had a forward voltage drop of 5.02 V (at collector current density of 50 A/cm/sup 2/) for the same diverter current, as compared to 6.48 V for the conventional IGBTs. Furthermore, both the devices had nearly identical turn off time, and excellent latch-up current density.","PeriodicalId":352185,"journal":{"name":"11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132386785","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Ultra-low R/sub dson/ 12 V P-channel trench MOSFET","authors":"D. Kinzer, D. Asselanis, R. Carta","doi":"10.1109/ISPSD.1999.764122","DOIUrl":"https://doi.org/10.1109/ISPSD.1999.764122","url":null,"abstract":"This paper describes a high density trench P-channel MOSFET for portable applications. These FETs are required to have extremely low R/sub dson/ with gate drives limited by single cell Li-ion battery voltage as low as 2.5 V. This 12 V FET in an SO8 package measures only 5 m/spl Omega/ at 4.5 V/sub gs/, and 7 m/spl Omega/ at 2.5 V/sub gs/. Eliminating package and top metal resistance, this corresponds to a specific R/sub dson/ of 21.6 and 37.0 m/spl Omega/-mm/sup 2/, respectively. Typical applications for these devices include battery charging and load switching in cell phones and laptops.","PeriodicalId":352185,"journal":{"name":"11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130381640","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
V. Khemka, R. Patel, N. Ramungul, T. Chow, R. Gutmann
{"title":"Static and dynamic characteristics of a 1100 V, double-implanted, planar, 4H-SiC PiN rectifier","authors":"V. Khemka, R. Patel, N. Ramungul, T. Chow, R. Gutmann","doi":"10.1109/ISPSD.1999.764081","DOIUrl":"https://doi.org/10.1109/ISPSD.1999.764081","url":null,"abstract":"Implanted, high-voltage, planar junction rectifiers in 4H-SiC are fabricated using a deep boron implanted junction along with a shallow heavily doped layer created by co-implantation of aluminum and carbon. The fabricated junctions can block up to about 1100 V with low forward drop and low leakage current. The static and dynamic characteristics of these rectifiers have been investigated at both room temperature and high temperature.","PeriodicalId":352185,"journal":{"name":"11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122512967","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"The recessed-gate IGBT structure","authors":"M. Nemoto, B. J. Baliga","doi":"10.1109/ISPSD.1999.764084","DOIUrl":"https://doi.org/10.1109/ISPSD.1999.764084","url":null,"abstract":"A recessed gate (RG) structure is presented for the IGBT and its characteristics are compared with DMOS and UMOS-IGBT for the first time. For the fabrication of the RG structure, it is not necessary to perform the difficult polysilicon planarization step required for the UMOS-IGBT. The breakdown voltage of the RG-IGBT is close to that of the DMOS-IGBT, even though it has a trench structure. The RG-IGBT has a lower on-state voltage drop when compared with the DMOS-IGBT because there is no JFET resistance. The parasitic thyristor latch-up current density of the RG-IGBT is higher than that of the DMOS-IGBT. In addition, the RG-IGBT has a wide forward bias SOA (FBSOA). The saturation current density of the RG-IGBT is lower than that of the UMOS-IGBT, leading to a superior short circuit SOA (SC-SOA).","PeriodicalId":352185,"journal":{"name":"11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125751513","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Zitouni, F. Morancho, P. Rossel, H. Tranduc, J. Buxo, I. Pagès
{"title":"A new concept for the lateral DMOS transistor for smart power IC's","authors":"M. Zitouni, F. Morancho, P. Rossel, H. Tranduc, J. Buxo, I. Pagès","doi":"10.1109/ISPSD.1999.764055","DOIUrl":"https://doi.org/10.1109/ISPSD.1999.764055","url":null,"abstract":"In this paper, a new concept of lateral DMOSFET for smart power integrated circuits is proposed, in which a vertical trench is used under the gate end in the drift region.","PeriodicalId":352185,"journal":{"name":"11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)","volume":"202 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131546679","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M.R. Lee, O. Kwon, S. Lee, I. Lee, I. Yang, J. H. Paek, L. Hwang, J. I. Ju, B. Lee, Chang-jae Lee
{"title":"SOI high voltage integrated circuit technology for plasma display panel drivers","authors":"M.R. Lee, O. Kwon, S. Lee, I. Lee, I. Yang, J. H. Paek, L. Hwang, J. I. Ju, B. Lee, Chang-jae Lee","doi":"10.1109/ISPSD.1999.764118","DOIUrl":"https://doi.org/10.1109/ISPSD.1999.764118","url":null,"abstract":"We have developed 150 V and 250 V high voltage integrated circuit technologies using high performance extended drain MOSFET (EDMOSFET) and dielectric isolation (DI) technology for data and scan driving LSIs of color AC plasma display panel systems for an application of HDTV. The EDMOSFETs have invariant channel length despite process variation because of a self-aligned structure. This results in smaller chip area for the developed driver LSIs than that of conventional driver LSIs using LDMOSFETs. The data driver LSI with maximum driving current of 50 mA and 60 output channels can be applied to PDP systems with a fast addressing time of 0.7 /spl mu/s. The scan driver LSI for large-size AC PDPs has a maximum driving current of 500 mA for both the source and the sink.","PeriodicalId":352185,"journal":{"name":"11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123377242","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}