11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)最新文献_第7页

Improvement in lateral IGBT design for 500 V 3 A one chip inverter ICs 500v 3a单片逆变电路横向IGBT设计的改进

11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312) Pub Date : 1999-05-26 DOI: 10.1109/ISPSD.1999.764125

A. Nakagawa, H. Funaki, Y. Yamaguchi, F. Suzuki

引用次数: 58

High voltage high frequency silicon bipolar transistors 高压高频硅双极晶体管

11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312) Pub Date : 1999-05-26 DOI: 10.1109/ISPSD.1999.764120

D. Grădinaru, W. Ng, C. Salama

引用次数: 0

Dynamic characteristics of high voltage 4H-SiC vertical JFETs 高压4H-SiC垂直场效应管的动态特性

11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312) Pub Date : 1999-05-26 DOI: 10.1109/ISPSD.1999.764129

H. Mitlehner, W. Bartsch, K. Dohnke, P. Friedrichs, R. Kaltschmidt, U. Weinert, B. Weis, D. Stephani

引用次数: 46

Electrical performance of triple implanted vertical silicon carbide MOSFETs with low on-resistance 低导通电阻三重植入垂直碳化硅mosfet的电学性能

11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312) Pub Date : 1999-05-26 DOI: 10.1109/ISPSD.1999.764071

D. Peters, P. Friedrichs, R. Schorner, H. Mitlehner, B. Weis, D. Stephani

{"title":"Electrical performance of triple implanted vertical silicon carbide MOSFETs with low on-resistance","authors":"D. Peters, P. Friedrichs, R. Schorner, H. Mitlehner, B. Weis, D. Stephani","doi":"10.1109/ISPSD.1999.764071","DOIUrl":"https://doi.org/10.1109/ISPSD.1999.764071","url":null,"abstract":"This paper describes results of 6H silicon carbide vertical power MOSFETs designed for different blocking capabilities: 600 V and 1600 V. The fabrication is based on a triple implantation technique with a lateral inversion channel. The MOSFETs are normally off and exhibit specific on-resistances of 22 and 40 m/spl Omega/cm/sup 2/, respectively. A chip area of 1 mm/sup 2/ has emerged as a suitable value in order to achieve an acceptable yield with respect to the blocking capability. A SiC MOSFET of this size can be driven up to 1 A in continuous operation. As expected for a unipolar device, short turn-on and turn-off delay times have been measured. In particular, due to a very small accumulation zone, the Miller capacitance is small in comparison to Si MOSFETs. The switching speed can be influenced by the gate driving circuit in a wide range. The SiC MOSFET is controllable in all switching states and stable up to 125/spl deg/C case temperature. The switching behaviour tested under conditions typical for motor drives is robust against short cuts and short time overloading.","PeriodicalId":352185,"journal":{"name":"11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116319058","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 11

Energy capability of power devices with Cu layer integration 铜层集成电源器件的能量性能

11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312) Pub Date : 1999-05-26 DOI: 10.1109/ISPSD.1999.764051

Y.S. Chung, T. Willett, V. Macary, S. Merchant, B. Baird

引用次数: 16

20 V LDMOS optimized for high drain current condition. Which is better, n-epi or p-epi? 针对高漏极电流条件优化的20v LDMOS。n-epi和p-epi哪个更好?

11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312) Pub Date : 1999-05-26 DOI: 10.1109/ISPSD.1999.764049

K. Kinoshita, Y. Kawaguchi, T. Sano, A. Nakagawa

引用次数: 10

Transient thermal simulation of power devices with Cu layer 含铜层功率器件的瞬态热模拟

11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312) Pub Date : 1999-05-26 DOI: 10.1109/ISPSD.1999.764112

Y.S. Chung

引用次数: 4

Characterization of silicon direct bonding methodology for high performance IGBT 高性能IGBT硅直接键合方法的表征

11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312) Pub Date : 1999-05-26 DOI: 10.1109/ISPSD.1999.764093

Tae Hoon Kim, C. Yun, Soo-Seong Kim, H. Jang

引用次数: 4

The maximum controllable current of improved base resistance controlled thyristor employing a self-aligned corrugated p-base 采用自对准p型波纹基极的改进基极电阻控制晶闸管的最大可控电流

11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312) Pub Date : 1999-05-26 DOI: 10.1109/ISPSD.1999.764105

D. Byeon, You-Sang Lee, Won-Oh Lee, M. Han, Yearn-Ik Choi

引用次数: 2

COOLMOS/sup TM/-a new milestone in high voltage power MOS COOLMOS/sup TM -高压电源MOS的新里程碑

11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312) Pub Date : 1999-05-26 DOI: 10.1109/ISPSD.1999.764028

L. Lorenz, G. Deboy, A. Knapp, M. Mârz

{"title":"COOLMOS/sup TM/-a new milestone in high voltage power MOS","authors":"L. Lorenz, G. Deboy, A. Knapp, M. Mârz","doi":"10.1109/ISPSD.1999.764028","DOIUrl":"https://doi.org/10.1109/ISPSD.1999.764028","url":null,"abstract":"Recently, a new technology for high voltage power MOSFETs has been introduced: the CoolMOS/sup TM/. Based on the new device concept of charge compensation, the R/sub DS(on)/ area product for e.g. 600 V transistors has been reduced by a factor of 5. The devices show no bipolar current contribution like the well known tail current observed during the turn-off phase of IGBTs. CoolMOS/sup TM/ virtually combines the low switching losses of a MOSFET with the on-state losses of an IGBT. Furthermore, the dependence of R/sub DS(on)/ on the breakdown voltage has been redefined. The more than square-law dependence in the case of standard MOSFET has been broken and a linear voltage dependence achieved. This opens the way to new fields of application even without avalanche operation. System miniaturization, higher switching frequencies, lower circuit parasitics, higher efficiency, and reduced system costs are pointing the way towards future developments. Not only has the new technology achieved breakthrough at reduced R/sub DS(on)/ values, but new benchmarks have also been set for the device capacitances. Due to chip shrinkage and a novel internal structure, the technology shows both a very small input capacitance and a strongly nonlinear output capacitance. The drastically lower gate charge facilitates and reduces the cost of controllability, and the smaller feedback capacitance reduces the dynamic losses. With this new technology, the minimum R/sub DS(on)/ values in all packages are being redefined in the important 600-1000 V categories.","PeriodicalId":352185,"journal":{"name":"11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312)","volume":"182 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123999841","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 218