{"title":"Two-dimensional numerical simulation of the channel electron in an In/sub 0.52/Al/sub 0.48/As/In/sub 0.53/Ga/sub 0.47/As HEMT","authors":"X.H. Zhang, Y.F. Yang, Z.G. Wang","doi":"10.1109/HKEDM.1997.642345","DOIUrl":"https://doi.org/10.1109/HKEDM.1997.642345","url":null,"abstract":"A two-dimensional quantum model based on the solution of the Schrodinger and Poisson equations is first presented for an In/sub 0.52/Al/sub 0.48/As/In/sub 0.53/Ga/sub 0.47/As/InP HEMT. According to the model, the two-dimensional distributions of electron density and transverse electric field in the channel of the InAlAs/InGaAs HEMT are discussed.","PeriodicalId":262767,"journal":{"name":"1997 IEEE Hong Kong Proceedings Electron Devices Meeting","volume":"170 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134461858","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
S. Fleischer, C. Surya, Y.F. Hu, C. Beling, S. Fung, M. Missous
{"title":"Positron studies of arsenic precipitation in low-temperature GaAs grown by molecular beam epitaxy","authors":"S. Fleischer, C. Surya, Y.F. Hu, C. Beling, S. Fung, M. Missous","doi":"10.1109/HKEDM.1997.642348","DOIUrl":"https://doi.org/10.1109/HKEDM.1997.642348","url":null,"abstract":"Gallium arsenide grown at low substrate temperature by molecular beam epitaxy has been studied using a variable energy slow positron beam. As-grown LT-GaAs was found to have a higher concentration of vacancy-related defects (/spl sim/10/sup 17/ cm/sup -3/) than the semi-insulating substrate. After annealing at 600/spl deg/C, the positron S parameter results suggest the formation of clusters which we associate with arsenic precipitation. The lowering of the S parameter at the surface was thought to be due to oxygen and this was confirmed by XPS measurements. For the first time, we have examined aluminium delta-layers using a positron beam and found that the Al-layers can be resolved to depths of at least 1700 /spl Aring/ by this method. The lowering of the S parameter after annealing would suggest that the Al forms Al/sub x/Ga/sub 1-x/As, and that the presence of the Al layers may inhibit the diffusion of arsenic, thereby reducing the formation of vacancy-defects.","PeriodicalId":262767,"journal":{"name":"1997 IEEE Hong Kong Proceedings Electron Devices Meeting","volume":"298 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132584006","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Transport of charge and electronic structure of traps in SONOS structures","authors":"V. Gritsenko, Yu. N. Novikov, Y. Morokov, H. Wong","doi":"10.1109/HKEDM.1997.642335","DOIUrl":"https://doi.org/10.1109/HKEDM.1997.642335","url":null,"abstract":"In this experiment, we found that the barrier height is 2.0 eV for tunneling electron injecting from Al/Si/sub 3/N/sub 4/ and 1.5 eV for hole injecting from Au/Si/sub 3/N/sub 4/ interface. The last value is more precise than those obtained from photoemission measurement. A more precise energy band diagram for MNOS structure is then determined. Numerical simulation using MINDO/3 was also performed and results show that the Si-Si bond in Si/sub 3/N/sub 4/ can traps both electrons and holes.","PeriodicalId":262767,"journal":{"name":"1997 IEEE Hong Kong Proceedings Electron Devices Meeting","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125905808","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"PNP bipolar structure design for low voltage 0.6 /spl mu/m complementary BiCMOS technology","authors":"M. Belaroussi, B. Djezzar, S. Mekhaldi","doi":"10.1109/HKEDM.1997.642323","DOIUrl":"https://doi.org/10.1109/HKEDM.1997.642323","url":null,"abstract":"This paper describes simulation results of a vertical PNP bipolar structure design suitable for low voltage application which can be fabricated in BiCMOS technology. This study is carried out using a mixed two dimensional numerical device/circuit simulation program called CODECS. The simulations show that adding a medium performance PNP transistor, the performance of the complementary BiCMOS over conventional BiCMOS and CMOS were greatly improved as the supply voltage is lowered and the design rules is scaled down to 0.6 /spl mu/m.","PeriodicalId":262767,"journal":{"name":"1997 IEEE Hong Kong Proceedings Electron Devices Meeting","volume":"C-23 9","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121004489","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Early voltage of SiGe heterojunction bipolar transistors","authors":"J. Yuan, J. Song","doi":"10.1109/HKEDM.1997.642342","DOIUrl":"https://doi.org/10.1109/HKEDM.1997.642342","url":null,"abstract":"An analytical equation of the Early voltage, including the neutral-base recombination effect, is evaluated. The general analytical equation is valid for SiGe bipolar transistors with a flat, trapezoid, linear, or stepped Ge profile in the base. The present model predictions are compared with other published results and experimental data. The agreement between this work and experimental data is excellent. The analytical predictions without taking into account neutral-base recombination are overestimated. The model predictions, taking into account 100% neutral-base recombination, however, gives a fixed normalized Early voltage of 0.5, independent of Ge grading.","PeriodicalId":262767,"journal":{"name":"1997 IEEE Hong Kong Proceedings Electron Devices Meeting","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115432981","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Huang, P. Lai, J. Xu, S. Zeng, G.Q. Li, Y. Cheng
{"title":"Suppression of hot-electron-induced interface degradation in metal-oxide-semiconductor devices by backsurface argon bombardment","authors":"M. Huang, P. Lai, J. Xu, S. Zeng, G.Q. Li, Y. Cheng","doi":"10.1109/HKEDM.1997.642339","DOIUrl":"https://doi.org/10.1109/HKEDM.1997.642339","url":null,"abstract":"A low-energy (550 eV) argon-ion beam was used to bombard directly the backsurface of polysilicon-gate metal-oxide-semiconductor (MOS) capacitors after the completion of all conventional processing steps. The effects of this extra step on the interface characteristics of the MOS capacitors before and after hot-electron injection were investigated. After the backsurface argon-ion bombardment, the MOS capacitors showed improved interface hardness against hot-electron-induced degradation. A turn-around behaviour was observed, indicating an optimal bombardment time should be used. The physical mechanism involved could possibly be stress compensation at the Si-SiO/sub 2/ interface induced by the backsurface bombardment.","PeriodicalId":262767,"journal":{"name":"1997 IEEE Hong Kong Proceedings Electron Devices Meeting","volume":"135 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115472109","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Breakdown of reoxidized nitrided oxide (ONO) in flash memory devices upon current stressing","authors":"C. Cha, E. Chor, H. Gong, A. Q. Zhang, L. Chan","doi":"10.1109/HKEDM.1997.642337","DOIUrl":"https://doi.org/10.1109/HKEDM.1997.642337","url":null,"abstract":"The characteristic of reoxidized nitrided SiO/sub 2/ (ONO) breakdown in flash memory devices, upon current stressing is being investigated. Results indicate that current stressing on the ONO layer is very detrimental to the performance of the flash device, and this situation is inevitable during the device fabrication. It is found that with a constant current of 5 /spl mu/A passing through an ONO layer of 200 /spl Aring/ thickness (with an area of 50,000 /spl mu/m/sup 2/), it takes just only a mere 20 seconds to destroy the device. The situation worsens when the polarity is reversed (a negative current of the same magnitude passing through the ONO layer) and the device almost immediately breaks down. It was reported that the dielectric breakdown was triggered by accumulated holes, but we believe that for our situation, several other causes are possible for the short breakdown time of the ONO layer, especially during the negative-current flow. These include the imperfect interface at the bottom oxide and nitride, the trapped charges in the oxide, and the band-bending at the interfaces of polysilicon and oxide.","PeriodicalId":262767,"journal":{"name":"1997 IEEE Hong Kong Proceedings Electron Devices Meeting","volume":"16 9","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120822598","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Chua Chee Tee, G. Sarkar, S.C.Y. Meng, D. Yu, L. Chan
{"title":"In-plane and out-of-plane dielectric constant measurement techniques for sub-micron MOS devices","authors":"Chua Chee Tee, G. Sarkar, S.C.Y. Meng, D. Yu, L. Chan","doi":"10.1109/HKEDM.1997.642338","DOIUrl":"https://doi.org/10.1109/HKEDM.1997.642338","url":null,"abstract":"This paper focuses on the techniques adopted to carefully characterize the dielectric constant of low k SOG (spin-on-glass), both for in-plane and out-of-plane measurements. In the case of out-of-plane dielectric constant measurement, the capacitance-voltage (C-V) sweep is utilised to measure the SOG capacitance. For in-plane dielectric constant measurement, intra capacitors are required and a novel technique of extracting coupling capacitance is presented.","PeriodicalId":262767,"journal":{"name":"1997 IEEE Hong Kong Proceedings Electron Devices Meeting","volume":"89 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115049022","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
L.K. Chew, L. Chen, Gan Chock Hing, Q. Gang, L. Y. Meng, L. Chan
{"title":"Comparison of latchup immunity for silicided source/drain at different n+ implant energy","authors":"L.K. Chew, L. Chen, Gan Chock Hing, Q. Gang, L. Y. Meng, L. Chan","doi":"10.1109/HKEDM.1997.642310","DOIUrl":"https://doi.org/10.1109/HKEDM.1997.642310","url":null,"abstract":"N-channel MOSFET devices with excellent latchup immunity for 0.25 /spl mu/m technology are fabricated with 50 /spl Aring/ gate oxide, retrograde N-Well, shallow junction (30 keV), and titanium silicided source/drain (S/D). The current gain (/spl beta/) of the npn parasitic bipolar transistor was reduced from about 5 to less than 1 and the latchup trigger current (I/sub trig/ was increased from 13 mA to more than 15 mA). All these improvements are observed when comparing silicided and non-silicided S/D at 30 keV n+ implant energy. In addition, between silicided wafers, those with lower n+ implant energy (30 keV) are more latchup immune than those with higher n+ implant energy (40 keV).","PeriodicalId":262767,"journal":{"name":"1997 IEEE Hong Kong Proceedings Electron Devices Meeting","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122453852","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Physical model and numerical results of dissociation kinetics of hydrogen-passivated Si/SiO/sub 2/ interface defects","authors":"G. Gadiyak","doi":"10.1109/HKEDM.1997.642328","DOIUrl":"https://doi.org/10.1109/HKEDM.1997.642328","url":null,"abstract":"A simple model of thermal dissociation of hydrogen from silicon dangling bonds (P/sub b/ centers) and their hydrogen passivation with vacuum annealing is suggested. It takes into account the reactions occurring for hydrogen with defect states at the interface of the Si/SiO/sub 2/ structure as well as the diffusion process for atomic and molecular hydrogen. The reaction kinetic coefficients were calculated in diffusion approximation. Excellent agreement of calculations with experimental data was obtained in the temperature range (480-700/spl deg/C), and oxide thickness of (200-1024 /spl Aring/) for the (111) and (100) interfaces.","PeriodicalId":262767,"journal":{"name":"1997 IEEE Hong Kong Proceedings Electron Devices Meeting","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122349989","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}