Comparison of latchup immunity for silicided source/drain at different n+ implant energy

N-channel MOSFET devices with excellent latchup immunity for 0.25 /spl mu/m technology are fabricated with 50 /spl Aring/ gate oxide, retrograde N-Well, shallow junction (30 keV), and titanium silicided source/drain (S/D). The current gain (/spl beta/) of the npn parasitic bipolar transistor was reduced from about 5 to less than 1 and the latchup trigger current (I/sub trig/ was increased from 13 mA to more than 15 mA). All these improvements are observed when comparing silicided and non-silicided S/D at 30 keV n+ implant energy. In addition, between silicided wafers, those with lower n+ implant energy (30 keV) are more latchup immune than those with higher n+ implant energy (40 keV).