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2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)最新文献

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A 108-GHz Retimer Based on 1.8V QUASI-ECL MOS-HBT SiGe BiCMOS Logic 基于1.8V准ecl MOS-HBT SiGe BiCMOS逻辑的108 ghz定时器
2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2013-11-11 DOI: 10.1109/CSICS.2013.6659185
Yingying Fu, S. Voinigescu
{"title":"A 108-GHz Retimer Based on 1.8V QUASI-ECL MOS-HBT SiGe BiCMOS Logic","authors":"Yingying Fu, S. Voinigescu","doi":"10.1109/CSICS.2013.6659185","DOIUrl":"https://doi.org/10.1109/CSICS.2013.6659185","url":null,"abstract":"This paper describes the first full-rate retimer operating with clock frequencies above 100- GHz. The circuit includes a digitally-controlled equalizer with over 30 dB of peaking control at 55- 60GHz, a 108-GHz flip-flop, and a DC- to-108 GHz clock amplifier. It consumes 540 mW from a 1.8V supply corresponding to an energy efficiency of 5pJ/bit. Equalization was demonstrated over 6m of coaxial cable at 40 Gb/s and 36 Gb/s with full-rate, 2x, and 3x oversampling clocks at 80 GHz and 108 GHz, respectively, and at 75 Gb/s with 75-GHz clock between two probe stations using wafer probes and a 3-m long coaxial cable.","PeriodicalId":257256,"journal":{"name":"2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130218789","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A 2-5GHz 100W CW MMIC Limiter Using a Novel Input Topology 基于新型输入拓扑的2-5GHz 100W连续波MMIC限制器
2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2013-11-11 DOI: 10.1109/CSICS.2013.6659191
Joseph J. Bouchez, Tuong Nguyen, V. Zomorrodian, E. Reese, D. Sturzebecher
{"title":"A 2-5GHz 100W CW MMIC Limiter Using a Novel Input Topology","authors":"Joseph J. Bouchez, Tuong Nguyen, V. Zomorrodian, E. Reese, D. Sturzebecher","doi":"10.1109/CSICS.2013.6659191","DOIUrl":"https://doi.org/10.1109/CSICS.2013.6659191","url":null,"abstract":"A CW 100W MMIC limiter covering 2-5GHz band is presented using TriQuint's 2MI GaAs VPIN process. The new architecture uses a binary power splitter topology to distribute the input power equally to all the input anti-parallel diodes, resulting in higher input power handling capability. The limiter is able to withstand more than 100W of input power with flat leakage less than 16 dBm. The insertion loss is less than 0.5 dB. The input and output return loss is greater than 15 dB. Performance degradation was negligible after a 1 hour test with 100W CW input power.","PeriodicalId":257256,"journal":{"name":"2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131656526","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
A 7.3 THz Cut-Off Frequency, Inline, Chalcogenide Phase-Change RF Switch Using an Independent Resistive Heater for Thermal Actuation 7.3太赫兹截止频率，在线，硫族相变射频开关使用一个独立的电阻加热器热致动
2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2013-11-11 DOI: 10.1109/CSICS.2013.6659195
N. El-Hinnawy, P. Borodulin, B. Wagner, M. King, J. Mason, E. B. Jones, V. Veliadis, R. Howell, R. Young, Michael J. Lee
{"title":"A 7.3 THz Cut-Off Frequency, Inline, Chalcogenide Phase-Change RF Switch Using an Independent Resistive Heater for Thermal Actuation","authors":"N. El-Hinnawy, P. Borodulin, B. Wagner, M. King, J. Mason, E. B. Jones, V. Veliadis, R. Howell, R. Young, Michael J. Lee","doi":"10.1109/CSICS.2013.6659195","DOIUrl":"https://doi.org/10.1109/CSICS.2013.6659195","url":null,"abstract":"An inline chalcogenide phase change RF switch utilizing germanium telluride (GeTe) and driven by an integrated, electrically isolated thin film heater for thermal actuation has been fabricated. A voltage or current pulse applied to the heater terminals was used to transition the phase change material between the crystalline and amorphous states. An on-state resistance of 1.2 Ω (0.036 Ω-mm), with an off-state capacitance and resistance of 18.1 fF and 112 kΩ respectively were measured. This results in an RF switch cut-off frequency (Fco) of 7.3 THz, and an off/on DC resistance ratio of 9 × 104. The heater pulse power required to switch the GeTe between the two states was as low as 0.5W, with zero power consumption during steady state operation, making it a non-volatile RF switch. To the authors' knowledge, this is the first reported implementation of an RF phase change switch in a 4-terminal, inline configuration.","PeriodicalId":257256,"journal":{"name":"2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130704939","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 31
A DC-100 GHz Bandwidth and 20.5 dB Gain Limiting Amplifier in 0.25µm InP DHBT Technology 基于0.25µm InP DHBT技术的DC-100 GHz带宽和20.5 dB增益限制放大器
2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2013-11-11 DOI: 10.1109/CSICS.2013.6659197
S. Daneshgar, Z. Griffith, M. Rodwell
{"title":"A DC-100 GHz Bandwidth and 20.5 dB Gain Limiting Amplifier in 0.25µm InP DHBT Technology","authors":"S. Daneshgar, Z. Griffith, M. Rodwell","doi":"10.1109/CSICS.2013.6659197","DOIUrl":"https://doi.org/10.1109/CSICS.2013.6659197","url":null,"abstract":"A DC-100 GHz limiting amplifier is designed and fabricated in a 0.25μm InP DHBT technology. The amplifier is designed in two stages using a modified Cherry-Hooper architecture proceeding an emitter-follower at each stage. Consuming 145 mW of power from a -2.5 V supply, it achieves 20.5 dB differential S21 gain with less than 1 dB gain ripple and better than 20 dB and 15 dB input and output return losses, respectively. The group delay of S21 is 9 psec with a variation less than ±5.5 psec around that. Time domain large signal measurements verifies a single-ended output swing of 260 mV.","PeriodicalId":257256,"journal":{"name":"2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133106367","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 15
A 16-24 GHz CMOS SOI LNA with 2.2 dB Mean Noise Figure 一种平均噪声系数2.2 dB的16-24 GHz CMOS SOI LNA
2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2013-11-11 DOI: 10.1109/CSICS.2013.6659186
T. Kanar, Gabriel M. Rebeiz
{"title":"A 16-24 GHz CMOS SOI LNA with 2.2 dB Mean Noise Figure","authors":"T. Kanar, Gabriel M. Rebeiz","doi":"10.1109/CSICS.2013.6659186","DOIUrl":"https://doi.org/10.1109/CSICS.2013.6659186","url":null,"abstract":"This paper presents a K-band low-noise amplifier (LNA) with a measured mean noise figure of 2.2 dB at 16-24 GHz. The LNA is fabricated in 45 nm Semiconductor-on-Insulator (SOI) CMOS process. The measured S-parameters result a peak gain of 19.5 dB at 20 GHz and S11 <; -10 dB at 16-24 GHz. The design shows that CMOS SOI process can provide a comparable noise performance with GaAs and SiGe devices. To the best of authors' knowledge, this LNA achieves the lowest noise figure at K-band in any CMOS process.","PeriodicalId":257256,"journal":{"name":"2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133171690","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 20
A X-Band 28 dBm Fully Integrated Power Amplifier with 23 dB Gain 具有23db增益的x波段28dbm全集成功率放大器
2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2013-11-11 DOI: 10.1109/CSICS.2013.6659209
Jiankang Li, Y. Xiong, Yihu Li, Wen Wu
{"title":"A X-Band 28 dBm Fully Integrated Power Amplifier with 23 dB Gain","authors":"Jiankang Li, Y. Xiong, Yihu Li, Wen Wu","doi":"10.1109/CSICS.2013.6659209","DOIUrl":"https://doi.org/10.1109/CSICS.2013.6659209","url":null,"abstract":"A 8-12 GHz fully monolithic transformer-coupled cascode power amplifier (PA) with the chip size of 2 × 2 mm2 fabricated using the 0.25-μm SiGe:BiCMOS technology is presented in this paper. Through circuit/layout co-design, the distributed capacitor structure which is connected to the base of cascode transistor is proposed to reduce the base connection inductance for solving circuit instability and improving the gain in the design. Moreover, the PA features a three-stage cascode architecture that includes both high-speed (low breakdown voltage) and high breakdown voltage (low-speed) SiGe transistors. The proposed PA attained a measured small signal gain of 27.6-29.6 dB from 7.7 to 12 GHz with a 5.0 V dc supply. A 28 dBm maximum output power with an 18.5% power-added efficiency at 10 GHz have also been achieved.","PeriodicalId":257256,"journal":{"name":"2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132690350","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A 1.4 GHz MMIC Active Cold Noise Source 1.4 GHz MMIC有源冷噪声源
2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2013-11-11 DOI: 10.1109/CSICS.2013.6659183
Robert Scheeler, Z. Popovic
{"title":"A 1.4 GHz MMIC Active Cold Noise Source","authors":"Robert Scheeler, Z. Popovic","doi":"10.1109/CSICS.2013.6659183","DOIUrl":"https://doi.org/10.1109/CSICS.2013.6659183","url":null,"abstract":"A GaAs MMIC active cold load for a wearable microwave radiometer is presented. A design procedure capable of achieving a minimum noise temperature at a specific bias point is described. A measured equivalent noise temperature of less than 90 K from 1.3 GHz to 1.5 GHz while maintaining an input return loss greater than 28 dB is demonstrated.","PeriodicalId":257256,"journal":{"name":"2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114576358","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Analog Linearization Techniques Suitable for RF Power Amplifiers Used in Integrated Transmitters 适用于集成发射机射频功率放大器的模拟线性化技术
2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2013-11-11 DOI: 10.1109/CSICS.2013.6659217
R. Braithwaite
{"title":"Analog Linearization Techniques Suitable for RF Power Amplifiers Used in Integrated Transmitters","authors":"R. Braithwaite","doi":"10.1109/CSICS.2013.6659217","DOIUrl":"https://doi.org/10.1109/CSICS.2013.6659217","url":null,"abstract":"Analog techniques for linearizing RF power amplifiers that are suitable for use in integrated transmitters are discussed. The techniques include feedforward compensation, RF error feedback, and adaptive analog predistortion. It is shown that these methods can be combined to improve distortion cancellation performance.","PeriodicalId":257256,"journal":{"name":"2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"2018 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114617483","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
An Efficiency and Size Optimized 2GHz 25W Cascaded Doherty RF Power Amplifiers Using GAN HEMTs 基于GAN hemt的2GHz 25W级联Doherty射频功率放大器的效率和尺寸优化
2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2013-11-11 DOI: 10.1109/CSICS.2013.6659215
Yoji Murao, K. Ohgami, T. Kaneko
{"title":"An Efficiency and Size Optimized 2GHz 25W Cascaded Doherty RF Power Amplifiers Using GAN HEMTs","authors":"Yoji Murao, K. Ohgami, T. Kaneko","doi":"10.1109/CSICS.2013.6659215","DOIUrl":"https://doi.org/10.1109/CSICS.2013.6659215","url":null,"abstract":"NEC has developed a 2.1GHz band very compact and high efficiency power amplifier module based on GaN HEMT cascaded Doherty circuitry. Implemented modules exhibits the amplifier chain power added efficiency of 45% and the final stage drain efficiency of 58% at 25W output level with associated gain of 44dB. The module works well with DPD to achieve -51dBc ACLR using an LTE E-TM1.1 signal with the peak-to-average-power-ratio of 7.1dB. The module occupies only 99cm2. Compact driver stage Doherty circuitry implemented on the multi-layer composite materials PCB contributes both to efficiency enhancement and shrunk foot print.","PeriodicalId":257256,"journal":{"name":"2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115068548","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A 180mW InP HBT Power Amplifier MMIC at 214 GHz 214ghz下180mW InP HBT功率放大器MMIC
2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2013-11-11 DOI: 10.1109/CSICS.2013.6659187
T. Reed, Z. Griffith, P. Rowell, M. Field, M. Rodwell
{"title":"A 180mW InP HBT Power Amplifier MMIC at 214 GHz","authors":"T. Reed, Z. Griffith, P. Rowell, M. Field, M. Rodwell","doi":"10.1109/CSICS.2013.6659187","DOIUrl":"https://doi.org/10.1109/CSICS.2013.6659187","url":null,"abstract":"A solid state power amplifier MMIC is demonstrated with 180mW of saturated output power at 214GHz, from an unthinned die, and a small signal S21 gain of 22.0dB. 3-dB bandwidth extends from below 210GHz to 230GHz. PDC is 12.9W. PA Cell design uses a 250nm InP HBT process and a novel three-port tuning network. Three levels of on-wafer power combining in 5μm BCB microstrip are used to combine 16 PA cells in a power amplifier MMIC. The result is a 4x increase in output periphery versus the previous state-of-the-art for InP HBT power amplifier MMICs designed for 220GHz.","PeriodicalId":257256,"journal":{"name":"2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124785142","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 41
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