{"title":"具有23db增益的x波段28dbm全集成功率放大器","authors":"Jiankang Li, Y. Xiong, Yihu Li, Wen Wu","doi":"10.1109/CSICS.2013.6659209","DOIUrl":null,"url":null,"abstract":"A 8-12 GHz fully monolithic transformer-coupled cascode power amplifier (PA) with the chip size of 2 × 2 mm2 fabricated using the 0.25-μm SiGe:BiCMOS technology is presented in this paper. Through circuit/layout co-design, the distributed capacitor structure which is connected to the base of cascode transistor is proposed to reduce the base connection inductance for solving circuit instability and improving the gain in the design. Moreover, the PA features a three-stage cascode architecture that includes both high-speed (low breakdown voltage) and high breakdown voltage (low-speed) SiGe transistors. The proposed PA attained a measured small signal gain of 27.6-29.6 dB from 7.7 to 12 GHz with a 5.0 V dc supply. A 28 dBm maximum output power with an 18.5% power-added efficiency at 10 GHz have also been achieved.","PeriodicalId":257256,"journal":{"name":"2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"A X-Band 28 dBm Fully Integrated Power Amplifier with 23 dB Gain\",\"authors\":\"Jiankang Li, Y. Xiong, Yihu Li, Wen Wu\",\"doi\":\"10.1109/CSICS.2013.6659209\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 8-12 GHz fully monolithic transformer-coupled cascode power amplifier (PA) with the chip size of 2 × 2 mm2 fabricated using the 0.25-μm SiGe:BiCMOS technology is presented in this paper. Through circuit/layout co-design, the distributed capacitor structure which is connected to the base of cascode transistor is proposed to reduce the base connection inductance for solving circuit instability and improving the gain in the design. Moreover, the PA features a three-stage cascode architecture that includes both high-speed (low breakdown voltage) and high breakdown voltage (low-speed) SiGe transistors. The proposed PA attained a measured small signal gain of 27.6-29.6 dB from 7.7 to 12 GHz with a 5.0 V dc supply. A 28 dBm maximum output power with an 18.5% power-added efficiency at 10 GHz have also been achieved.\",\"PeriodicalId\":257256,\"journal\":{\"name\":\"2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)\",\"volume\":\"48 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-11-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CSICS.2013.6659209\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSICS.2013.6659209","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A X-Band 28 dBm Fully Integrated Power Amplifier with 23 dB Gain
A 8-12 GHz fully monolithic transformer-coupled cascode power amplifier (PA) with the chip size of 2 × 2 mm2 fabricated using the 0.25-μm SiGe:BiCMOS technology is presented in this paper. Through circuit/layout co-design, the distributed capacitor structure which is connected to the base of cascode transistor is proposed to reduce the base connection inductance for solving circuit instability and improving the gain in the design. Moreover, the PA features a three-stage cascode architecture that includes both high-speed (low breakdown voltage) and high breakdown voltage (low-speed) SiGe transistors. The proposed PA attained a measured small signal gain of 27.6-29.6 dB from 7.7 to 12 GHz with a 5.0 V dc supply. A 28 dBm maximum output power with an 18.5% power-added efficiency at 10 GHz have also been achieved.