2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)最新文献

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A Novel Even & Odd-Mode Symmetric Circuit Decomposition Method 一种新的奇偶模对称电路分解方法
2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2013-11-11 DOI: 10.1109/CSICS.2013.6659204
M. Roberg, C. Campbell
{"title":"A Novel Even & Odd-Mode Symmetric Circuit Decomposition Method","authors":"M. Roberg, C. Campbell","doi":"10.1109/CSICS.2013.6659204","DOIUrl":"https://doi.org/10.1109/CSICS.2013.6659204","url":null,"abstract":"This paper presents a novel method using the principles of even-odd mode analysis to derive the scattering parameters of the even-mode and odd-mode circuit decompositions of a symmetric circuit solely from its known scattering parameters. This eliminates the need for the microwave designer to perform additional simulations to obtain the even-mode and odd-mode circuits once the full circuit S-parameters are known. The technique is especially attractive in the case of Monolithic Microwave Integrated Circuit (MMIC) design where the additional simulations typically require a EM (3D) simulator. The utility of the method is highlighted by analyzing the odd-mode circuit of a MMIC PA power combiner.","PeriodicalId":257256,"journal":{"name":"2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128646623","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
Miniaturized Optical DP-QPSK Modulator Module with 3.2-W Power Dissipation Using InP-Based Modulator and Driver ICs 采用基于inp的调制器和驱动ic的3.2 w功耗小型化光DP-QPSK调制器模块
2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2013-11-11 DOI: 10.1109/CSICS.2013.6659238
N. Kono, H. Yagi, Naoki Itabashi, H. Shoji
{"title":"Miniaturized Optical DP-QPSK Modulator Module with 3.2-W Power Dissipation Using InP-Based Modulator and Driver ICs","authors":"N. Kono, H. Yagi, Naoki Itabashi, H. Shoji","doi":"10.1109/CSICS.2013.6659238","DOIUrl":"https://doi.org/10.1109/CSICS.2013.6659238","url":null,"abstract":"We have fabricated a compact and low-power dual-polarization quadrature phase-shift keying (DP-QPSK) modulator module for optical coherent transceivers. This module includes an InP-based electro-optic modulator, four driver ICs, and polarization multiplexing micro-optics. The package size is 16.5 mm × 34.0 mm × 6.0 mm. We demonstrate 128 Gbit/s DP-QPSK operation capability with a very low power dissipation of 3.2 W. This low power dissipation was achieved by using a low-power two-stage limiting driver IC with 3.3-V and 5.2-V power supplies in combination with an InP-based low-Vπ modulator and 1.4Vπ driving.","PeriodicalId":257256,"journal":{"name":"2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"106 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116964149","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Improved GaN-on-SiC Transistor Thermal Resistance by Systematic Nucleation Layer Growth Optimization 通过系统的成核层生长优化提高GaN-on-SiC晶体管热阻
2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2013-11-08 DOI: 10.1109/CSICS.2013.6659233
J. Pomeroy, N. Rorsman, Jr-Tai Chen, U. Forsberg, E. Janzén, Martin Kuball
{"title":"Improved GaN-on-SiC Transistor Thermal Resistance by Systematic Nucleation Layer Growth Optimization","authors":"J. Pomeroy, N. Rorsman, Jr-Tai Chen, U. Forsberg, E. Janzén, Martin Kuball","doi":"10.1109/CSICS.2013.6659233","DOIUrl":"https://doi.org/10.1109/CSICS.2013.6659233","url":null,"abstract":"Impressive power densities have been demonstrated for GaN-on-SiC based high-power high-frequency transistors, although further gains can be achieved by further minimizing the device thermal resistance. A significant 10-30% contribution to the total device thermal resistance originates from the high defect density AlN nucleation layer at the GaN/SiC interface. This thermal resistance contribution was successfully reduced by performing systematic growth optimization, investigating growth parameters including: Substrate pretreatment temperature, growth temperature and deposition time. Interfacial thermal resistance, characterized by time resolved Raman thermography measurements AlGaN/GaN HEMT structures, were minimized by using a substrate pretreatment and growth temperature of 1200°C. Reducing the AlN thickness from 105 nm (3.3×10-8 W/m2K) to 35 nm (3.3×10-8 W/m2K), led to a ~2.5× interfacial thermal resistance reduction and the lowest value reported for a standard AlGaN/GaN HEMT structure.","PeriodicalId":257256,"journal":{"name":"2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-11-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125242777","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Benchmarking of Large-Area GaN-on-Si HFET Power Devices for Highly-Efficient, Fast-Switching Converter Applications 用于高效、快速开关转换器应用的大面积GaN-on-Si HFET功率器件的基准测试
2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2013-10-01 DOI: 10.1109/CSICS.2013.6659219
R. Reiner, P. Waltereit, F. Benkhelifa, S. Muller, M. Wespel, R. Quay, M. Schlechtweg, M. Mikulla, O. Ambacher
{"title":"Benchmarking of Large-Area GaN-on-Si HFET Power Devices for Highly-Efficient, Fast-Switching Converter Applications","authors":"R. Reiner, P. Waltereit, F. Benkhelifa, S. Muller, M. Wespel, R. Quay, M. Schlechtweg, M. Mikulla, O. Ambacher","doi":"10.1109/CSICS.2013.6659219","DOIUrl":"https://doi.org/10.1109/CSICS.2013.6659219","url":null,"abstract":"This work reports the development and fabrication of large area AlGaN/GaN-on-Si HFETs for the use in highly-efficient fast-switching power converters. High performance is demonstrated by full characterization of static- and dynamic-parameters and a direct comparison to two commercial state-of-the-art silicon power devices. Compared to their silicon counterparts the GaN-device achieves by a factor of 3 lower static area specific on-state resistance RON×A, and by a factor of 3 lower static on-state resistance times gate charge product RON×Q. In switching tests the device achieves a low dynamic dispersion and low switching losses. Furthermore in this work a sophisticated measurement setup for characterization of dynamic parameters is developed and demonstrated. Characterization and test conditions are adapted for the use in fast-switching power converter applications.","PeriodicalId":257256,"journal":{"name":"2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133608551","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 17
Thermal Modeling of High Power GaN-on-Diamond HEMTs Fabricated by Low-Temperature Device Transfer Process 低温器件转移制备高功率gan -on-金刚石hemt的热建模
2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2013-10-01 DOI: 10.1109/CSICS.2013.6659246
K. Chu, T. Yurovchak, P. Chao, C. Creamer
{"title":"Thermal Modeling of High Power GaN-on-Diamond HEMTs Fabricated by Low-Temperature Device Transfer Process","authors":"K. Chu, T. Yurovchak, P. Chao, C. Creamer","doi":"10.1109/CSICS.2013.6659246","DOIUrl":"https://doi.org/10.1109/CSICS.2013.6659246","url":null,"abstract":"We report on a novel fabrication process of GaN-on-Diamond high electron mobility transistors (HEMTs) and its resulting thermal performance enhancement over conventional GaN-on-SiC technology. In this process, GaN devices are first fabricated on their epitaxial substrate (e.g. sapphire or SiC) before being removed from the original substrate and bonded onto a high-thermal-conductivity diamond substrate at low temperature. Process flow and technology progress is described. Finite-element thermal analysis is performed to quantify the thermal performance improvement of our GaN-on-Diamond design over conventional GaN-on-SiC technology together with the impact of thermal boundary resistance at the GaN/diamond bonding interface.","PeriodicalId":257256,"journal":{"name":"2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"40 5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134576844","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 19
Efficient Powering of RF PAs Using DC-DC Power Supplies 使用DC-DC电源的RF PAs高效供电
2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2013-10-01 DOI: 10.1109/CSICS.2013.6659224
A. Fayed
{"title":"Efficient Powering of RF PAs Using DC-DC Power Supplies","authors":"A. Fayed","doi":"10.1109/CSICS.2013.6659224","DOIUrl":"https://doi.org/10.1109/CSICS.2013.6659224","url":null,"abstract":"Energy-efficient DC-DC power supplies are becoming essential for battery life enhancement in portable devices with power-hungry circuits, such as RF PAs. However, the switching noise produced by such power supplies tends to degrade the performance of RF circuits, either directly or indirectly. This paper investigates the most common switching noise mitigation techniques in DC-DC power supplies and discusses their advantages and shortcomings. The paper then discusses a new technique that achieves completely spur-free switching noise performance at every node in DC-DC power supplies within a short number of switching cycles while maintaining minimal random noise floor peaking as well as low cost and design complexity. The technique can be adopted within preexisting power supplies operating with PWM or PFM control, both at high and light load conditions to power spur-sensitive RF PAs.","PeriodicalId":257256,"journal":{"name":"2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121420237","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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