Solid-state Electronics最新文献

{"title":"Evolution of threshold voltage in 1.2-kV planar SiC MOSFETs during repetitive UIS stressing","authors":"Chaobiao Lin ,&nbsp;Ling Hong ,&nbsp;Ding Wu ,&nbsp;Na Ren ,&nbsp;Kuang Sheng","doi":"10.1016/j.sse.2025.109125","DOIUrl":"10.1016/j.sse.2025.109125","url":null,"abstract":"<div><div>In this paper, repetitive unclamped inductive switching (UIS) stressing was conducted on 1.2-kV planar silicon carbide (SiC) MOSFETs. Different off-state gate voltage biases (<em>V_gs-off</em> = 0 V/−5 V/−10 V) were applied. The evolution of on-resistance (<em>R_on</em>) and threshold voltage (<em>V_th</em>) in different conditions has been observed. It was found that <em>R_on</em> was increased and <em>V_th</em> was negatively shifted for −5 V and −10 V <em>V_gs-off</em> conditions. Failure analysis was conducted to investigate the <em>R_on</em> degradation mechanism. Aluminum (Al) melting on chip upper surface occurred during UIS stressing, which was verified by scanned-electron-beam observation. Regarding <em>V_th</em> shift, the repetitive UIS stressing applied on the devices was analyzed as a combination of high-temperature reverse bias (HTRB) stress and high-temperature gate bias (HTGB) stress. To aid the mechanism analysis, TCAD simulations of the UIS avalanche process were conducted. When negative <em>V_gs-off</em> was applied, the channel region entered an accumulated state, and the electric field was directed toward the gate oxide. This facilitated hot hole injection into the gate oxide, leading to a significant increase in positive oxide charge density. As the magnitude of the negative <em>V_gs-off</em> bias increased, the electric field stress in the gate oxide and hole density in the channel region were aggravated, resulting in a more pronounced <em>V_th</em> shift.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"227 ","pages":"Article 109125"},"PeriodicalIF":1.4,"publicationDate":"2025-04-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143847941","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"The impact of drift region length on total ionizing dose effects on LDMOSFET","authors":"Shun Li,&nbsp;Hongliang Lu,&nbsp;Jing Qiao,&nbsp;Ruxue Yao,&nbsp;Yutao Zhang,&nbsp;Yuming Zhang","doi":"10.1016/j.sse.2025.109126","DOIUrl":"10.1016/j.sse.2025.109126","url":null,"abstract":"<div><div>The adjustment of drift region length increases the design flexibility of laterally diffused metal oxide semiconductor field effect transistor (LDMOSFET) characteristics, such as breakdown voltage and on-resistance. However, its impact on the total ionizing dose (TID) effects on the device cannot be ignored. The changes in threshold voltage (<span><math><mrow><msub><mi>V</mi><mrow><mi>th</mi></mrow></msub></mrow></math></span>), transconductance (<em>g</em>_m), drain current (<span><math><mrow><msub><mi>I</mi><mi>d</mi></msub></mrow></math></span>), and on-resistance (<em>R</em>_on) of N-channel LDMOSFET (NLDMOSFET) with two different drift region lengths after TID irradiation were studied in this article. We found that the shift of <span><math><mrow><msub><mi>V</mi><mrow><mi>th</mi></mrow></msub></mrow></math></span> and <em>g</em>_m after irradiation was almost identical for both devices, whereas there was a noticeable difference in the shift of <span><math><mrow><msub><mi>I</mi><mi>d</mi></msub></mrow></math></span> and <em>R</em>_on. The influences of traps and interface states in gate oxide and field oxide on device characteristics were discussed through technology computer-aided design (TCAD). Ultimately, we discovered that the degradation of <span><math><mrow><msub><mi>V</mi><mrow><mi>th</mi></mrow></msub></mrow></math></span> after irradiation was primarily related to the gate oxide, while the degradation of drain current in linear region (<span><math><mrow><msub><mi>I</mi><mrow><mi>dlin</mi></mrow></msub></mrow></math></span>) after irradiation was mainly related to the drift region. The degradation of <em>g</em>_m and <em>R</em>_on were related to the degradation of <span><math><mrow><msub><mi>V</mi><mrow><mi>th</mi></mrow></msub></mrow></math></span> and <span><math><mrow><msub><mi>I</mi><mi>d</mi></msub></mrow></math></span>. Although the long drift region is beneficial to the breakdown and power characteristics of LDMOS devices, it causes a significant deterioration in the TID effect, which is worth considering in the design of devices and circuits applied in radiation environment.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"227 ","pages":"Article 109126"},"PeriodicalIF":1.4,"publicationDate":"2025-04-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143839176","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Electron mobility in silicon under high uniaxial strain","authors":"Nicolas Roisin,&nbsp;Loïc Lahaye,&nbsp;Jean-Pierre Raskin,&nbsp;Denis Flandre","doi":"10.1016/j.sse.2025.109118","DOIUrl":"10.1016/j.sse.2025.109118","url":null,"abstract":"<div><div>In the pursuit of improving the performance of semiconductor devices, the manipulation of material properties through strain engineering has emerged as a promising avenue. In this work, the enhancement of the electron mobility in silicon has been experimentally investigated for uniaxial strain up to almost 1% along the [100] crystal direction. The experimental data have been obtained from n-doped silicon beams strained using four-point bending scheme. To complement the experimental measurements that present a mobility enhancement of about 65%, first-principles calculations have been conducted to determine the splitting of the conduction bands and the changes in the effective masses induced by the strain. A semi-empirical model is finally used to predict the undoped behavior, which forecast a mobility increase close to 1000 cm<span><math><msup><mrow></mrow><mrow><mn>2</mn></mrow></msup></math></span>V⁻¹s⁻¹ for a strain of about 1%.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"227 ","pages":"Article 109118"},"PeriodicalIF":1.4,"publicationDate":"2025-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143844661","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Investigating random discrete dopant-induced variability in cryogenic gate-all-around nanosheet FETs: A quantum transport simulation study","authors":"Jaehyun Lee","doi":"10.1016/j.sse.2025.109113","DOIUrl":"10.1016/j.sse.2025.109113","url":null,"abstract":"<div><div>This study investigates the variability induced by random discrete dopants (RDDs) in the source and drain extension (SDE) regions in cryogenic <span><math><mi>n</mi></math></span>-type gate-all-around nanosheet field-effect transistors using the extensive quantum transport simulations. RDDs in the SDE regions effectively alter the channel length, necessitating a detailed analysis of the temperature dependence of short channel effects across a range from cryogenic (77 K) to room temperature (300 K). The results clearly demonstrate that cryogenic devices are more susceptible to random dopant fluctuation (RDF), exhibiting greater variability in threshold voltage, ON-state current, and drain-induced barrier lowering compared to devices operating at 300 K, even when the intrinsic channel device is considered. These findings emphasize the importance of rigorously addressing local variability, such as RDF, alongside process-induced variability in the design and optimization of cryogenic devices and associated circuits.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"227 ","pages":"Article 109113"},"PeriodicalIF":1.4,"publicationDate":"2025-04-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143824036","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Machine learning augmented TCAD assessment of corner radii in nanosheet FET","authors":"Jyoti Patel ,&nbsp;Bathula Satwik ,&nbsp;Navjeet Bagga ,&nbsp;Ishani Bais ,&nbsp;Chirag Arora ,&nbsp;Vivek Kumar ,&nbsp;Ankit Dixit ,&nbsp;Naveen Kumar ,&nbsp;Vihar Georgiev ,&nbsp;S. Dasgupta","doi":"10.1016/j.sse.2025.109114","DOIUrl":"10.1016/j.sse.2025.109114","url":null,"abstract":"<div><div>In this paper, we proposed a machine learning approach to assist the TCAD results in realizing a local cost and time-effective simulator for analyzing the performance metric of the vertically stacked Nanosheet FET (NSFET). The corners are responsible for field crowding inside the sheets, which significantly affects the parasitic capacitance and thereby reduces the I_ON/C_gg ratio. Thus, a detailed insight into corner radii optimization is worth needed. We used Sentaurus TCAD to obtain the results and further realized a local simulator using an XGBoost model to analyze process variations and the role of uneven radii corners in NSFET. In addition, a data augmentation strategy is proposed that leverages the powers of stacked autoencoders (SAE) and InfoGANs to enhance data generalization, improving model robustness and predictive reliability.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"227 ","pages":"Article 109114"},"PeriodicalIF":1.4,"publicationDate":"2025-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143792185","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Exploring TEG parameters for optimal body heat harvesting in wearable devices","authors":"Tabrez Qureshi ,&nbsp;Khursheed Ahmad Sheikh ,&nbsp;Mohammad Mohsin Khan ,&nbsp;Harveer Singh Pali ,&nbsp;Md Tasnim","doi":"10.1016/j.sse.2025.109122","DOIUrl":"10.1016/j.sse.2025.109122","url":null,"abstract":"<div><div>Thermoelectric generators harness human body heat to power wearable electronic devices and are crucial for developing self-sustaining wearable systems for health and environmental monitoring. This research focuses on optimizing the power output of body heat-driven wearable thermoelectric generators, while ensuring user comfort. It emphasizes minimizing heat loss, maintaining a significant temperature differential across the thermoelectric material, and designing compact generators. Investigations explored temperature-regulated hot surfaces at various body sites including the wrist, upper arm, and chest. Power levels were recorded during activities such as running and walking. Findings indicate that power generation was most effective at the upper arm, peaking at 71.2 millivolts with a thermoelectric generator equipped with a heat sink silver spreader and silicon insulator during summer conditions. The study also evaluated the feasibility of using upper arm thermoelectric generators to power wearable electrocardiogram sensors. In comparison, while thermoelectric generators at the wrist benefited from airflow in winter, achieving up to 29.3 millivolts, those at the chest showed superior power output. This research underscores the potential of strategically placed thermoelectric generators in enhancing the functionality of wearable technologies.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"227 ","pages":"Article 109122"},"PeriodicalIF":1.4,"publicationDate":"2025-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143799918","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"One-step variation included compact modeling with conditional variational autoencoder","authors":"Shuhan Wang ,&nbsp;Zheng Zhou ,&nbsp;Zili Tang ,&nbsp;Jinghan Xu ,&nbsp;Xiaoyan Liu ,&nbsp;Xing Zhang","doi":"10.1016/j.sse.2025.109119","DOIUrl":"10.1016/j.sse.2025.109119","url":null,"abstract":"<div><div>Efficient and accurate variation modeling serves as a critical part in circuit evaluation, which can reproduce actual electrical behavior of semiconductor devices. Conventional variation modeling usually consists of two steps: compact modeling the basic electrical properties and sub-modeling the variation sources introduced in MOSFET manufacturing process, mostly structural and doping parameters. This lengthy process results in a gap between device production and rapid circuit analysis. In order to improve modeling efficiency, in this work, we propose a one-step variation-included compact modeling approach leveraging machine learning. Utilizing conditional variational autoencoder (cVAE), currents with variation are directly constructed without the sub-modeling step, as variation sources of the cVAE model are automatically extracted. Benchmark against prior distribution of dataset generated by Monte Carlo simulation of BSIM-CMG, normalized variation in figure of merits (FoMs) of cVAE generated I-V curves are all above 0.9. After implementing the model in SPICE, high accuracy in circuit-level variation modeling also indicates the potential of the proposed model.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"227 ","pages":"Article 109119"},"PeriodicalIF":1.4,"publicationDate":"2025-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143777167","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Maximum, effective, and average thermal resistance for GaN-based HEMTs on SiC, Si and sapphire substrates","authors":"Kaushik Shivanand Powar ,&nbsp;Venkata Komalesh Tadepalli ,&nbsp;Vaidehi Vijay Painter ,&nbsp;Raphael Sommet ,&nbsp;Anjan Chakravorty ,&nbsp;P. Vigneshwara Raja","doi":"10.1016/j.sse.2025.109121","DOIUrl":"10.1016/j.sse.2025.109121","url":null,"abstract":"<div><div>The maximum, effective, and average thermal resistance (<em>R_TH</em>) of AlGaN/GaN and InAlN/GaN high-electron mobility transistors (HEMTs) on silicon carbide (SiC), silicon (Si), and sapphire substrates are reported using TCAD simulation. After validating simulated I-V properties, <em>R_TH</em> is deduced from self-heating (SH)-induced rise in channel temperature (Δ<em>T</em>) versus dissipated power (<em>P_D</em>) plot. The maximum thermal resistance (<em>R_THmax</em>) determines HEMT reliability at higher power dissipation; so, peak channel temperature (<em>T_max</em>) is extracted. The simulated Δ<em>T_max</em><strong>-</strong><em>P_D</em> plots are compared with the literature results for each HEMT structure. The estimated <em>R_THmax</em> is consistent with the reported experimental values, verifying the TCAD model and confirming the validity of reported <em>R_TH</em> values. The effective thermal resistance (<em>R_THeff</em>) is needed to simulate the electrical properties using the compact model. For this purpose, isothermal <em>I_DS</em>-<em>V_DS</em> simulations are carried out at different temperatures without SH effects. Then, the cross-over temperature points (Δ<em>T_eff</em>) are identified by evaluating the isothermal data with the actual output properties at a particular <em>P_D</em>. The average thermal resistance (<em>R_THavg</em>) of the HEMT is computed by averaging the lattice temperature profile along the channel (mean channel temperature), and <em>R_THavg</em> is compared with <em>R_THeff</em>.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"227 ","pages":"Article 109121"},"PeriodicalIF":1.4,"publicationDate":"2025-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143777168","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Stress management in freestanding membranes obtained by ion implantation induced delamination","authors":"L. Benichou ,&nbsp;F. Mazen ,&nbsp;T. Salvetat ,&nbsp;F. Madeira ,&nbsp;F. Rieutord","doi":"10.1016/j.sse.2025.109120","DOIUrl":"10.1016/j.sse.2025.109120","url":null,"abstract":"<div><div>Stress management in freestanding silicon thin films obtained through ion implantation-induced delamination is investigated. Residual stress is measured through curvature of the rolled film. With a proper thermal annealing process, we can effectively relax this stress, facilitating the film manipulation and transfer. The measurements reveal a slight stress discrepancy between freestanding films and donor wafers which is discussed. The delamination of freestanding membranes opens up new possibilities for Smart-Cut™ technology on various applications.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"227 ","pages":"Article 109120"},"PeriodicalIF":1.4,"publicationDate":"2025-04-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143792186","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"TLM-based numerical extraction for CMOS-compatible N+-InGaAs ohmic contacts on 200mm Si substrates","authors":"A. Lombrez ,&nbsp;A. Divay ,&nbsp;H. Boutry ,&nbsp;L. Colas ,&nbsp;N. Coudurier ,&nbsp;S. Altazin ,&nbsp;T. Baron","doi":"10.1016/j.sse.2025.109112","DOIUrl":"10.1016/j.sse.2025.109112","url":null,"abstract":"<div><div>We report the results of a TLM-based numerical extraction methodology applied on CMOS-compatible N⁺-InGaAs ohmic contacts integrated with dielectrics on 200mm Si substrates. The methodology is first described and calibrated using contacts on SOI. Then, we applied this method on W/TiN/Ti on N⁺-InGaAs contacts to obtain state-of-the-art level ρ_c = 7,5.10^-8 Ω.cm² for 0.35x0.35µm contact dimension, which is close to relevant contact size of the targeted application (THz HBT for 6G).</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"227 ","pages":"Article 109112"},"PeriodicalIF":1.4,"publicationDate":"2025-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143817080","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}