Solid-state Electronics最新文献_第10页

Quantum information processing in electrically defined Silicon triple quantum dot systems 电定义硅三量子点系统中的量子信息处理

IF 1.7 4区物理与天体物理

Solid-state Electronics Pub Date : 2024-01-15 DOI: 10.1016/j.sse.2024.108863

Ji-Hoon Kang, Hoon Ryu

{"title":"Quantum information processing in electrically defined Silicon triple quantum dot systems","authors":"Ji-Hoon Kang, Hoon Ryu","doi":"10.1016/j.sse.2024.108863","DOIUrl":"10.1016/j.sse.2024.108863","url":null,"abstract":"<div>Quantum bits (qubits) operations in electrically defined Silicon (Si) triple quantum dots (TQDs) are computationally investigated to elevate the potential of TQD structure as a platform for quantum information processing. Employing a realistic Si<math><mo>/</mo></math>Si-germanium heterostructure as a target model, device simulations are conducted to secure an initialized qubit state. Basic programmability is verified through implementation of individual qubit operations and 2-qubit entangling operations between neighboring QDs. Constructing a gate sequence composed of 1-qubit and 2-qubit blocks, then, we not only generate three-qubit Greenberger–Horne–Zeilinger state, but also quantify the degradation of state fidelity under the inevitable inaccuracy which are incorporated in the dominant factors of spin-qubit Hamiltonian. Presenting engineering details that are hard to be carried by simulations based on the first principle theory, this work can be served as a practical guideline for designs of scalable quantum processors with electron spin-qubits in Si QD platforms.</div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":null,"pages":null},"PeriodicalIF":1.7,"publicationDate":"2024-01-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139470083","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Voltage ramp stress based lifetime-prediction model of advanced Al-doped HfO2 dielectric for 2.5D MIMCAPs 基于电压斜坡应力的 2.5d mimcaps 高级掺铝 hfo2 介电寿命预测模型

IF 1.7 4区物理与天体物理

Solid-state Electronics Pub Date : 2024-01-15 DOI: 10.1016/j.sse.2024.108864

Corinna Fohn , Emmanuel Chery , Kristof Croes , Michele Stucchi , Valeri Afanas’ev

引用次数: 0

Deep spiking neural networks with integrate and fire neuron using steep switching device 利用陡峭开关设备整合和发射神经元的深度尖峰神经网络

IF 1.7 4区物理与天体物理

Solid-state Electronics Pub Date : 2024-01-12 DOI: 10.1016/j.sse.2024.108860

Sung Yun Woo , Sangyeon Pak , Sung-Tae Lee

{"title":"Deep spiking neural networks with integrate and fire neuron using steep switching device","authors":"Sung Yun Woo , Sangyeon Pak , Sung-Tae Lee","doi":"10.1016/j.sse.2024.108860","DOIUrl":"10.1016/j.sse.2024.108860","url":null,"abstract":"<div>Deep learning has shown impressive capabilities in tasks like speech recognition and image classification. However, modern deep neural networks often demand a significant number of weights and extensive computational resources, creating efficiency challenges for applications on edge devices. To address these issues, researchers have introduced deep spiking neural networks (DSNNs) that leverage specialized hardware for synapses and neurons. DSNNs offer a potential solution by improving efficiency in edge-device applications. In this paper, the hardware based DSNN with integrate and fire neuron using steep switching device was investigated. We propose integrate and fire neuron using steep switching device to implement rate coding as input encoding method. Because the steep switching device has double-gate, the threshold voltage of the neuron circuits can be adaptively controlled, which changes the rates of input pulse. Hence, the adjustment of the threshold of neuron can be employed to mitigate the accuracy deterioration resulting from the transformation from deep neural networks (DNNs) to DSNNs. In addition, the off-current of proposed integrate and fire neuron circuit decreases significantly as the steep switching device has steep subthreshold swing. A system simulation of a hardware based DSNN shows that the adjustable threshold of the neuron circuit can achieve a high inference accuracy of 98.36 % which is comparable to that obtained with software based DNN.</div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":null,"pages":null},"PeriodicalIF":1.7,"publicationDate":"2024-01-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139470081","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Performance potential of transistors based on tellurium nanowire arrays: A quantum transport study 基于碲纳米线阵列的晶体管的性能潜力：量子传输研究

IF 1.7 4区物理与天体物理

Solid-state Electronics Pub Date : 2024-01-09 DOI: 10.1016/j.sse.2024.108859

Ning Yang, Jing Guo

{"title":"Performance potential of transistors based on tellurium nanowire arrays: A quantum transport study","authors":"Ning Yang, Jing Guo","doi":"10.1016/j.sse.2024.108859","DOIUrl":"10.1016/j.sse.2024.108859","url":null,"abstract":"<div>Low-dimensional nanomaterials provide promising material platforms for aggressively scaled transistor technologies. We assess the performance potential of transistors based on an array of Tellurium nanowires (TNWs), by parameterizing a machine-learning (ML) tight-binding model with quantum transport device simulations. It has been shown that a transistor based on a parallel array of carbon nanotubes (CNTs) can have excellent on-state performance, but the small bandgap limits the transistor scalability and off-state performance. Our results indicate that compared to the CNT array FETs, the TNW array FETs have significantly suppressed ambipolar transport and improved subthreshold characteristics. The TNW array FET has the potential to achieve a near-ideal subthreshold swing (SS) close to 60 mV/dec, a very large on–off ratio (>109), and low source-drain leakage current at a 10 nm-scale channel length, due to its excellent gate electrostatics with a gate-all-around (GAA) structure, larger band gap and reduced quantum–mechanical tunneling. The TNW array FET also shows excellent scalability with a SS below 100 mV/dec when the channel length is further scaled down to 5 nm. Its larger bandgap and heavier effective mass significantly reduce quantum tunneling. This mechanism contributes to improved subthreshold and lower leakage but also highlights the need to develop low Schottky barrier contacts for TNWs.</div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":null,"pages":null},"PeriodicalIF":1.7,"publicationDate":"2024-01-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139421211","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Silicon nitride resistance switching MIS cells doped with silicon atoms 掺杂硅原子的氮化硅电阻开关 MIS 电池

IF 1.7 4区物理与天体物理

Solid-state Electronics Pub Date : 2024-01-03 DOI: 10.1016/j.sse.2023.108851

A. Mavropoulis , N. Vasileiadis , C. Bonafos , P. Normand , V. Ioannou-Sougleridis , G. Ch. Sirakoulis , P. Dimitrakis

引用次数: 0

Bismuth tungstate nanosheets sensors based on Temkin adsorption model for triethylamine detection 基于 Temkin 吸附模型的钨酸铋纳米片传感器用于检测三乙胺

IF 1.7 4区物理与天体物理

Solid-state Electronics Pub Date : 2023-12-28 DOI: 10.1016/j.sse.2023.108850

Zhongyuan Wu , Fengyu Luo , Xiaohong Zheng , Jin Liu

{"title":"Bismuth tungstate nanosheets sensors based on Temkin adsorption model for triethylamine detection","authors":"Zhongyuan Wu , Fengyu Luo , Xiaohong Zheng , Jin Liu","doi":"10.1016/j.sse.2023.108850","DOIUrl":"10.1016/j.sse.2023.108850","url":null,"abstract":"<div>Nanostructured Bi2WO6 and Bi2W2O9 were synthesized using a hydrothermal method. The crystal structure, morphology, and specific surface area were analyzed via X-ray diffraction, scanning electron microscopy, Brunauer–Emmett–Teller and X-ray photoelectron spectroscopy (XPS) analysis, respectively. The characterization results show that Bi2WO6 has a higher specific surface area and a larger pore size than Bi2W2O9, which promote oxygen adsorption and surface reactions. Gas-sensitive tests show that both sensors have a lower detection limit of 2.5 ppm as well as short response and recovery times for detecting triethylamine (TEA). They also have excellent cycling and long-term stability at 180 °C and exhibit excellent gas-sensing performance. The Bi2WO6 sensor has a higher response and sensitivity, as well as better selectivity, than the Bi2W2O9 sensor, which is related to the uniformly layered structure of the former material. We have analyzed the mechanism that enables these sensors to detect TEA and have used the Temkin adsorption model to explain the linear relationship. We find that this model provides an excellent theoretical foundation for fitting the working curve of these semiconductor sensors.</div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":null,"pages":null},"PeriodicalIF":1.7,"publicationDate":"2023-12-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139065426","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A unified core model of double-gate and surrounding-gate MOSFETs for circuit simulation 用于电路仿真的双栅极和环绕栅极 MOSFET 统一核心模型

IF 1.7 4区物理与天体物理

Solid-state Electronics Pub Date : 2023-12-21 DOI: 10.1016/j.sse.2023.108849

Luigi Colalongo , Simone Comensoli , Anna Richelli

引用次数: 0

A novel dual-directional DTSCR in twin-well process for ultra-low-voltage ESD protection 用于超低压静电放电保护的双孔工艺新型双向 DTSCR

IF 1.7 4区物理与天体物理

Solid-state Electronics Pub Date : 2023-12-20 DOI: 10.1016/j.sse.2023.108847

Xiaofeng Gu , Jian Xu , Hailian Liang , Junliang Liu , Dong Wang , Shurong Dong , Wen Lei , Juin J. Liou

{"title":"A novel dual-directional DTSCR in twin-well process for ultra-low-voltage ESD protection","authors":"Xiaofeng Gu , Jian Xu , Hailian Liang , Junliang Liu , Dong Wang , Shurong Dong , Wen Lei , Juin J. Liou","doi":"10.1016/j.sse.2023.108847","DOIUrl":"10.1016/j.sse.2023.108847","url":null,"abstract":"<div>By embedding additional NPN- and PNP- type bipolar junction transistors into a diode-triggered silicon-controlled rectifier (DTSCR) with single-directional ESD protection, we propose and implement a novel dual-directional DTSCR (DDTSCR) by using the twin-well process in a 0.18-µm CMOS process that provides highly efficient ultra-low-voltage ESD protection. Compared to conventional DTSCRs, the failure current of the proposed DDTSCR increases from 4.5 A to 5.6 A, successfully passing the ESD level tests of human body model at 8 kV and machine model at 650 V. Owing to its unique structural design and metal routing, the ESD protection efficiency of the DDTSCR is twice that of the DTSCR. By adopting a new E-shaped layout (DDTSCR-E), the failure current under positive stress can increase further to 6.6 A. In order to verify the ESD protection performance stabilization with different processes, the DDTSCR-E is fabricated in the 0.18-µm BCD, 0.18-µm and 21-nm CMOS processes, respectively. The trigger voltage of DDTSCR-E is found more stable than other ESD characteristics during the process migration. The high efficiency, the strong ESD robustness and the stable process migration make the proposed DDTSCR a promising ESD protection device for ultra-low-voltage integrated circuits.</div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":null,"pages":null},"PeriodicalIF":1.7,"publicationDate":"2023-12-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139024833","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A novel dual-directional DTSCR in twin-well process for ultra-low-voltage ESD protection 用于超低压静电放电保护的双孔工艺新型双向 DTSCR

IF 1.7 4区物理与天体物理

Solid-state Electronics Pub Date : 2023-12-20 DOI: 10.1016/j.sse.2023.108847

Xiaofeng Gu, Jian Xu, Hailian Liang, Junliang Liu, Dong Wang, Shurong Dong, Wen Lei, Juin J. Liou

{"title":"A novel dual-directional DTSCR in twin-well process for ultra-low-voltage ESD protection","authors":"Xiaofeng Gu, Jian Xu, Hailian Liang, Junliang Liu, Dong Wang, Shurong Dong, Wen Lei, Juin J. Liou","doi":"10.1016/j.sse.2023.108847","DOIUrl":"https://doi.org/10.1016/j.sse.2023.108847","url":null,"abstract":"By embedding additional NPN- and PNP- type bipolar junction transistors into a diode-triggered silicon-controlled rectifier (DTSCR) with single-directional ESD protection, we propose and implement a novel dual-directional DTSCR (DDTSCR) by using the twin-well process in a 0.18-µm CMOS process that provides highly efficient ultra-low-voltage ESD protection. Compared to conventional DTSCRs, the failure current of the proposed DDTSCR increases from 4.5 A to 5.6 A, successfully passing the ESD level tests of human body model at 8 kV and machine model at 650 V. Owing to its unique structural design and metal routing, the ESD protection efficiency of the DDTSCR is twice that of the DTSCR. By adopting a new E-shaped layout (DDTSCR-E), the failure current under positive stress can increase further to 6.6 A. In order to verify the ESD protection performance stabilization with different processes, the DDTSCR-E is fabricated in the 0.18-µm BCD, 0.18-µm and 21-nm CMOS processes, respectively. The trigger voltage of DDTSCR-E is found more stable than other ESD characteristics during the process migration. The high efficiency, the strong ESD robustness and the stable process migration make the proposed DDTSCR a promising ESD protection device for ultra-low-voltage integrated circuits.","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":null,"pages":null},"PeriodicalIF":1.7,"publicationDate":"2023-12-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139028131","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

SPICE model of MoS2/p-Si photodiode MoS2/p-Si 光电二极管的 SPICE 模型

IF 1.7 4区物理与天体物理

Solid-state Electronics Pub Date : 2023-12-14 DOI: 10.1016/j.sse.2023.108848

Feng Li, Shubin Zhang, Yanfeng Jiang

{"title":"SPICE model of MoS2/p-Si photodiode","authors":"Feng Li, Shubin Zhang, Yanfeng Jiang","doi":"10.1016/j.sse.2023.108848","DOIUrl":"10.1016/j.sse.2023.108848","url":null,"abstract":"<div>Molybdenum disulfide (MoS2) 2D-material is considered as one of potential candidates for next generation optoelectronic devices due to its tunable bandgap, relatively high carrier mobility, and good light absorption, etc. From the perspective of circuit simulation and system verification, an equivalent circuit model of MoS2/p-Si photodiode is required. In the paper, the optical response and the carrier transmission process of MoS2/p-Si photodiode are analyzed theoretically. A SPICE (Simulation Program with Integrated Circuit Emphasis) equivalent circuit model of MoS2/p-Si photodiode is proposed, which can be used to simulate the photoelectric characteristics of the 2D device. Based on the established SPICE model of MoS2/p-Si photodiode, the simulation results are consistent with the experimental results of MoS2/p-Si photodiode devices. The trans-impedance amplifier (TIA) is designed for MoS2/p-Si photodiode, and the set-up SPICE model is used to verify the designed TIA circuit. It shows that the SPICE model has potential application for the simulation of the opto-electrical system including the cutting-edge 2-D photo diode.</div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":null,"pages":null},"PeriodicalIF":1.7,"publicationDate":"2023-12-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"138684387","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0