Solid-state Electronics最新文献

{"title":"A single neural network global I-V and C-V parameter extractor for BSIM-CMG compact model","authors":"Jen-Hao Chen ,&nbsp;Fredo Chavez ,&nbsp;Chien-Ting Tung ,&nbsp;Sourabh Khandelwal ,&nbsp;Chenming Hu","doi":"10.1016/j.sse.2024.108898","DOIUrl":"https://doi.org/10.1016/j.sse.2024.108898","url":null,"abstract":"<div><p>A global I-V and C-V BSIM-CMG parameter extraction methodology based on deep learning is proposed. 100 k training datasets were generated through Monte Carlo simulation varying 28 IV and CV model parameters in the industry-standard BSIM-CMG FinFET model. For each of the 100 k Monte Carlo-selected BSIM-CMG parameter dataset, the I_D-V_G and C_GG-V_G characteristics of seven Monte Carlo-selected gate lengths ranging from 14 nm to 110 nm were generated as the input to train the parameter extraction neural network. The neural network outputs for training are the 28 model parameters’ values. The neural network's capability to extract BSIM-CMG model parameters that accurately fit TCAD-generated I_D-V_G and C_GG-V_G data over a range of gate lengths was demonstrated. This marks the first time a deep learning compact model parameter extraction flow, employing a single neural network for both I-V and C-V parameters and for a range of gate length, is presented.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"216 ","pages":"Article 108898"},"PeriodicalIF":1.7,"publicationDate":"2024-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140188281","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Methodology for parameters extraction with undoped junctionless EZ-FETs","authors":"N. Zerhouni Abdou ,&nbsp;S. Reboh ,&nbsp;L. Brunet ,&nbsp;M. Alepidis ,&nbsp;P. Acosta Alba ,&nbsp;S. Cristoloveanu ,&nbsp;I. Ionica","doi":"10.1016/j.sse.2024.108897","DOIUrl":"10.1016/j.sse.2024.108897","url":null,"abstract":"<div><p>The junctionless EZ-FET is a simple FDSOI-like device that requires only two lithography levels and standard processing steps. With its simplified architecture and fabrication flow, and using undoped source and drain terminals, the device allows for a fast electrical evaluation of semiconductor films on insulators (SOI) and gate stacks. This paper describes an electrical model that reproduces the peculiar transfer characteristics of a junctionless EZ-FET. The model is then simplified to develop a pragmatic parameter extraction methodology. This methodology is experimentally validated and provides the electrical properties of SOI films (mobility, threshold voltage) for both electrons and holes.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"217 ","pages":"Article 108897"},"PeriodicalIF":1.7,"publicationDate":"2024-03-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140282136","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Unveiling the reliability of negative capacitance FinFET with confrontation of different HfO2-ferroelectric dopants","authors":"Rajeewa Kumar Jaisawal ,&nbsp;Sunil Rathore ,&nbsp;P.N. Kondekar ,&nbsp;Navjeet Bagga","doi":"10.1016/j.sse.2024.108896","DOIUrl":"10.1016/j.sse.2024.108896","url":null,"abstract":"<div><p>The CMOS compatibility of Negative Capacitance (NC) FETs has been enhanced tremendously after introducing a thin film-doped HfO₂ as a ferroelectric (FE) layer. For a given FE layer, the NC property is governed by specific HfO₂ dopants (e.g., La, Zr, Al, Sr, Gd, Y, and Si). Thus, the TCAD simulation considerably depends on the dopant-specific Landau parameters (<span><math><mrow><msub><mi>α</mi><mi>x</mi></msub><mo>,</mo><msub><mi>β</mi><mi>x</mi></msub><mo>,</mo><msub><mi>γ</mi><mi>x</mi></msub><mo>,</mo><msub><mi>ρ</mi><mi>x</mi></msub><mo>,</mo><msub><mi>g</mi><mi>x</mi></msub></mrow></math></span>), and its solidity needs proper attention. Further, the <em>reliability</em> of the NC devices is severely affected by process variations, i.e., interface trap charges, work function variation, random dopant fluctuation, and ambient temperature (external), which modulates the device threshold voltage (V_th); in turn, the device aging. In this paper, using well-calibrated TCAD models, we investigated reliability for the different dopant-specific NC-FinFET, in terms of V_th, ON current (I_ON), and OFF current (I_OFF) modulation induced by: (<em>i</em>) the interface trap variability (ITV) considering the different trap concentration and energy location; (<em>ii</em>) the work function variability (WFV) considering different metal grain sizes (G_r); (<em>iii</em>) the random dopant fluctuations (RDF); and (iv) the ambient temperature. In this way, the device aging is calculated by inspecting V_th shift by <span><math><mrow><mo>±</mo><mn>50</mn><mi>m</mi><mi>V</mi></mrow></math></span>. These investigations pave the path for realizing a reliable NC-FinFET design.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"215 ","pages":"Article 108896"},"PeriodicalIF":1.7,"publicationDate":"2024-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140089329","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"SPICE simulation of the time-dependent clustering model for dielectric breakdown","authors":"E. Salvador,&nbsp;R. Rodriguez,&nbsp;E. Miranda","doi":"10.1016/j.sse.2024.108895","DOIUrl":"https://doi.org/10.1016/j.sse.2024.108895","url":null,"abstract":"<div><p>In this letter, a method for dealing with the time-dependent dielectric breakdown (TDDB) of oxide layers in MOS and MIM structures in the framework of SPICE simulations is reported. In particular, we focus the attention on the clustering model (Burr’s XII distribution) for dielectric breakdown which can be considered an extension of the well known Weibull model. The oxide time-to-breakdown for both models is calculated using the inversion method for the cumulative distribution function. For the sake of completeness, the proposed approach includes uncorrelated variability both in the initial and final resistance states. For illustrative purposes, it is also shown how voltage acceleration, progressive breakdown or any other correlation factor can be introduced in the simulation parameters. As an application example, the proposed method is used to simulate the simplest case of a gate-to-drain dielectric breakdown of a NMOS-based inverter circuit.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"215 ","pages":"Article 108895"},"PeriodicalIF":1.7,"publicationDate":"2024-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140103315","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Investigation of low to high-dose gamma-ray (γ-ray) radiation effects on indium-zinc-oxide (IZO) thin film transistor (TFT)","authors":"Do-Kywn Kim ,&nbsp;Dong-Seok Kim ,&nbsp;Tae-Eon Kim ,&nbsp;Min-Ju Kim ,&nbsp;Seung Heon Shin","doi":"10.1016/j.sse.2024.108884","DOIUrl":"10.1016/j.sse.2024.108884","url":null,"abstract":"<div><p>This paper investigates the impact of gamma-ray (γ-ray) radiation at doses of 100 krads and 1,000 krads on amorphous indium-zinc-oxide (IZO) thin-film transistors (TFTs). The IZO channel's properties are analyzed using X-ray photoelectron spectroscopy (XPS) before and after radiation. Following 100 krads exposure, the oxygen vacancy (V_O) peak in the IZO channel increases from 41.8 % to 59.4 % due to the generation of electron-hole pairs. Additionally, the threshold voltage of the IZO TFT negatively shifts from 10.1 V to 5.5 V due to positive charges in the gate oxide layer. Following exposure to 1,000 krads gamma-ray radiation, the threshold voltage of 8.8 V is similar to that of 9.8 V for the non-irradiated TFT. Remarkably, the subthreshold swing (SS) remains unchanged, while the maximum transconductance (g_m,max) is improved by 10.0 % and effective mobility (µ_FE) by 6.1 %. These enhancements result from the diffusion of indium, zinc, and oxygen into the gate oxide layer thanks to the self-heating effect at a dose of 1,000 krads. Based on the results, our findings indicate the IZO TFT shows a significant potential for a radiation-hardness electronic device in harsh environments.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"215 ","pages":"Article 108884"},"PeriodicalIF":1.7,"publicationDate":"2024-02-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140009120","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Bias stress stabilities of PMMA-passivated indium-gallium-zinc-oxide thin-film transistors after 100 °C steam exposure","authors":"Yuyun Chen ,&nbsp;Guodong Xu ,&nbsp;Yunpeng Yu ,&nbsp;Yi Shen","doi":"10.1016/j.sse.2024.108893","DOIUrl":"10.1016/j.sse.2024.108893","url":null,"abstract":"<div><p>Bias stress stabilities of the polymethyl methacrylate (PMMA)-passivated IGZO thin-film transistors (TFTs) after being exposed in a normal and harsh (100 °C steam) environment were studied, in order to comprehensively evaluate protection effects of PMMA. In a normal environment, the PMMA-passivated TFTs exhibited normal switching characteristics and electrical stabilities. However, the switching characteristics and bias stress stabilities were changed after being exposed on 100 °C steam. There were negative V_th shifts on the transfer curves of the steam-exposed IGZO TFTs. Our XPS analysis revealed that the negative ΔV_th was related to the steam-induced H₂O molecules throughout the IGZO films, which acted as electron donors to introduce more electrons in the front channel. Under PBS, the steam-exposed IGZO TFTs showed an abnormal negative V_th shift while the un-exposed IGZO TFTs showed negligible V_th shift. This abnormality was ascribed to the electrons released from steam-induced H₂O molecules, which render the conductive path more easily opened. Under NBS, the steam-exposed IGZO TFT presented larger negative V_th shift than the un-exposed TFT. This result was interpreted in terms of the steam-induced donor states (H₂O molecules) near or at channel/insulator interface. Under PBTS and NBTS, the changes in V_th for steam-exposed TFTs were similar to those for un-exposed TFTs. Such a similarity indicates that steam exposure had no effects on NBTS and PBTS stabilities. It was understood in terms that the steam-induced H₂O⁺ recombined with the electrons released from the steam-induced H₂O molecules under bias stress, forming H₂O to compensate the thermally-induced H₂O adsorption. Our results suggest that one-micron-thick PMMA passivation layer enabled to protect IGZO TFTs from H₂O in a normal environment, but it provided inadequate protection in a harsh environment. Therefore, a thicker PMMA passivation layer should be considered.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"215 ","pages":"Article 108893"},"PeriodicalIF":1.7,"publicationDate":"2024-02-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140018081","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Improvement of power consumption and linearity of integrate/fire characteristics using diffusive memristors with defective graphene for artificial neuron application","authors":"Moonkyu Song,&nbsp;Sangheon Lee,&nbsp;S.S. Teja Nibhanupudi,&nbsp;Siyu Wu,&nbsp;Sanjay K. Banerjee","doi":"10.1016/j.sse.2024.108892","DOIUrl":"https://doi.org/10.1016/j.sse.2024.108892","url":null,"abstract":"<div><p>Diffusive memristors made with conductive metal bridge random access memories (RAMs) have been studied for low power consumption and linearity of integrate/fire characteristics of artificial neurons by using a defective graphene interlayer. Utilizing this approach, a volatile artificial neuron incorporating Ag demonstrates sustained low-power characteristics inherent to Ag-based devices, accompanied by linearity in spike occurrence through precise control of on/off-current ratio and conductive filament dissolution time. This approach enables the precise tuning of the neuron's behavior and offers potential applications in neuromorphic computing and artificial intelligence.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"215 ","pages":"Article 108892"},"PeriodicalIF":1.7,"publicationDate":"2024-02-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139975866","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Fabrication of garnet solid electrolytes via sputtering for solid-state batteries","authors":"Shu-Yi Tsai ,&nbsp;Kuan-Zong Fung","doi":"10.1016/j.sse.2024.108894","DOIUrl":"10.1016/j.sse.2024.108894","url":null,"abstract":"<div><p>In this study, the deposition of Li₇La₃Zr₂O₁₂ (LLZO) thin films onto MgO substrates was successfully achieved using the radio frequency magnetron sputtering technique. The deposition process was carried out at various substrate temperatures to investigate their influence on the film properties The as-deposited films were initially amorphous; however, they could be crystallized into the cubic phase by increasing the deposition temperature above 100 °C. Upon raising the deposition temperature to 200 °C, the peaks in the X-ray diffraction pattern became sharper and more intense, indicating an increase in the volume fraction and crystallite size of LLZO.<!--> <!-->At 200 °C, the film consisted predominantly of the conductive crystalline LLZO phase, resulting in a remarkably high ionic conductivity of about 10⁻⁴ <!-->S cm⁻¹. The film deposited at 300 °C exhibited the second phase, i.e., the La₂Zr₂O₇ phase, which resulted from excessive lithium losses. These findings highlight the importance of controlling the deposition temperature to achieve the desired crystalline phase and optimize the electrical properties of LLZO thin films.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"215 ","pages":"Article 108894"},"PeriodicalIF":1.7,"publicationDate":"2024-02-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140018077","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Analysis and 3D TCAD simulations of single-qubit control in an industrially-compatible FD-SOI device","authors":"Pericles Philippopoulos ,&nbsp;Félix Beaudoin ,&nbsp;Philippe Galy","doi":"10.1016/j.sse.2024.108883","DOIUrl":"https://doi.org/10.1016/j.sse.2024.108883","url":null,"abstract":"<div><p>In this study, 3D simulations are introduced to analyze electric-dipole spin resonance (EDSR) for a spin qubit defined in a <span><math><mrow><mn>28</mn><mspace></mspace><mi>nm</mi></mrow></math></span>-node Ultra-Thin Body and Buried oxide (UTBB) Fully-Depleted Silicon-On-Insulator (FD-SOI) device operated at cryogenic temperatures. The device under consideration is designed to be compatible with STMicroelectronics’ standard fabrication techniques. The simulations predict the experimental and device parameters (e.g. drive amplitude, leakage, and Rabi frequency) required to make EDSR a viable means of qubit control before the device is fabricated. This work highlights how 3D TCAD tools which can simulate quantum-mechanical effects can help steer the design of quantum devices.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"215 ","pages":"Article 108883"},"PeriodicalIF":1.7,"publicationDate":"2024-02-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139992928","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Process optimization of titanium self-aligned silicide formation through evaluation of sheet resistance by design of experiment methodology","authors":"In-Chi Gau ,&nbsp;Yao-Wen Chang ,&nbsp;Giin-Shan Chen ,&nbsp;Yi-Lung Cheng ,&nbsp;Jau-Shiung Fang","doi":"10.1016/j.sse.2024.108879","DOIUrl":"10.1016/j.sse.2024.108879","url":null,"abstract":"<div><p>A low-resistivity titanium silicide (TiSi₂) is crucial as a gate and source/drain material in microelectronic device fabrication, offering notable properties to enhance device performance. This study aims to experimentally determine the optimum process parameters, including arsenic doping dosage, titanium thickness, and two-step rapid thermal process (RTP) temperature, for the sheet resistance of titanium self-aligned silicide process using a design of experiment methodology. The results demonstrate that both the thickness of the titanium and the temperature of the RTP play crucial roles in determining the sheet resistance of TiSi₂. Statistical analysis reveals that increasing the titanium thickness or the temperature of the first-step RTP (RTP-1) could reduce the sheet resistance. Additionally, an optimal second-step RTP (RTP-2) temperature is critical to yield low-resistivity TiSi₂ by completely converting C49- to C54-phase. The optimum process conditions for obtaining low sheet resistance are a titanium thickness of 32–35 nm, RTP-1 temperature of 720–750 °C for 75 s, and RTP-2 temperature of 860 °C for 20 s. Moreover, surface amorphization of the polysilicon by arsenic ion implantation before the deposition of Ti/TiN films also plays a crucial role in the formation of C54-TiSi₂. The lowest sheet resistance achieved was 3.91 Ω/sq with an arsenic dosage of 1 × 10¹⁴ cm⁻². The optimum condition was adopted for forming a submicron polysilicon gate, providing a promising approach for designing the process parameters for titanium self-aligned silicide formation to achieve low resistance in nanoscale electronic devices.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"215 ","pages":"Article 108879"},"PeriodicalIF":1.7,"publicationDate":"2024-02-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139922999","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}