Solid-state Electronics最新文献

{"title":"Analysis of Mechanical Stress on Fowler-Nordheim Tunneling for Program Operation in 3D NAND Flash Memory","authors":"Donghyun Kim ,&nbsp;Kihoon Nam ,&nbsp;Chanyang Park ,&nbsp;Hyunseo You ,&nbsp;Min Sang Park ,&nbsp;Yunsu Kim ,&nbsp;Seongjo Park ,&nbsp;Rock-Hyun Baek","doi":"10.1016/j.sse.2024.108927","DOIUrl":"https://doi.org/10.1016/j.sse.2024.108927","url":null,"abstract":"<div><p>This study investigated the relationship between mechanical stress and program efficiency in three-dimensional (3D) NAND flash memory devices. A stacked memory array transistor (SMArT) 3D NAND flash structure was modeled using a technology computer-aided design (TCAD) simulation. The mechanical stress distribution in the device depended on the deposition temperature (T_D) of the constituent material. In particular, the T_D of tungsten (T_D,W) dominated the mechanical stress. The tensile stress on the polycrystalline silicon (poly-Si) channel increased as the T_D,W decreased, and the compressive stress on the tunneling oxide (T_ox) decreased. Consequently, the barrier height between T_ox and poly-Si, and the effective electron mass decreased as the electric field in the T_ox increased. These changes significantly increased the Fowler-Nordheim (FN) tunneling process and program efficiency, indicating the crucial performance of 3D NAND flash. Moreover, the mechanical stress caused by the differences in T_D,W improved the program efficiency at a lower program voltage (V_PGM). Therefore, a change in the mechanical stress based on decreasing T_D,W improved the program efficiency through a higher FN tunneling process.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"216 ","pages":"Article 108927"},"PeriodicalIF":1.7,"publicationDate":"2024-03-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140338915","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Pinning voltage model of vertical pinned photodiode for Dual-Pixel image sensor","authors":"Hyeon Soo Ahn ,&nbsp;Donguk Kim ,&nbsp;Jan Genoe ,&nbsp;Jiwon Lee","doi":"10.1016/j.sse.2024.108919","DOIUrl":"https://doi.org/10.1016/j.sse.2024.108919","url":null,"abstract":"<div><p>This paper presents a simple solution for the pinning voltage of vertical pinned photodiode used in a dual-pixel configuration for phase-detection autofocus applications. Analytic solution of the conventional square deep photodiode has been presented elsewhere. However, this model cannot be adopted to dual pixel where a square pixel contains two rectangular photodiodes. Therefore, we propose a simple analytical model for the rectangular deep photodiode for dual pixels and validate its accuracy by TCAD simulations. The presented model accurately predicts the pinning voltage and potential inside the deep photodiode for dual pixels, thereby confirming its usefulness in the ab-initio design of the pixel as well as in the analysis of the photodiode design.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"216 ","pages":"Article 108919"},"PeriodicalIF":1.7,"publicationDate":"2024-03-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140351182","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Unveiling the mechanism behind the negative capacitance effect in Hf0.5Zr0.5O2-Based ferroelectric gate stacks and introducing a Circuit-Compatible hybrid compact model for Leakage-Aware NCFETs","authors":"Khoirom Johnson Singh,&nbsp;Lomash Chandra Acharya,&nbsp;Anand Bulusu,&nbsp;Sudeb Dasgupta","doi":"10.1016/j.sse.2024.108932","DOIUrl":"https://doi.org/10.1016/j.sse.2024.108932","url":null,"abstract":"<div><p>This paper addresses the lack of understanding of the origin of negative capacitance (NC) effect in the hafnium zirconium oxide (HZO) ferroelectric (FE) gate stack and proposes a new circuit-compatible hybrid compact model for NC field-effect transistors (NCFETs). The model supports Landau and Preisach FE models, encompassing multiple FE domains, FE leakage, and FE damping. The proposed model is experimentally validated, and the intrinsic switching speed of HZO is predicted. It is revealed that the NC effect in HZO stems from a mismatch in free charge and polarization switching rates. Performance evaluation of the model reveals that HZO-NCFET achieves ∼1.18x and ∼9.17x higher amplification at low and high frequencies compared to its PZT-NCFET counterpart. Our study demonstrates the superior ON-current (2.74 mA/µm) of the Engineered Leaky-HZO NCFET, surpassing FinFET and Germanium-source L-shaped TFET by ∼7.89x and ∼4.81x, respectively. This study briefly examines the direct causes of the negative drain-induced barrier lowering effect and negative differential resistance effect in Landau NCFETs. Furthermore, we emphasize the crucial role of FE thickness in determining the magnitude of the NC effect, offering valuable insights for the design and optimization of NC-based devices and circuits. Analysis of the Miller effect in NCFET-based inverters demonstrates significant improvements owing to high ON-current and voltage amplification, making them suitable for high-speed NCFET-based circuitry. Landau and Preisach NCFET-based inverters exhibit (50.70%, 51.34%) lower overshoots and (28.45%, 28.61%) reduced propagation delay compared to the NC nanowire FET-based inverter. Moreover, NCFET-based 2:1 fork circuits significantly reduce (46.69%, 51.37%) critical clock skew compared to CMOS FET-based circuits, showcasing the potential of NCFET technology in addressing timing violations in random logic paths. Furthermore, the Landau and Preisach NCFET-based ring oscillators (ROs) achieve (39.97%, 49.38%) and (52.65%, 62.92%) higher oscillation frequencies (f_OSC) compared to state-of-the-art graphene FET-RO and CMOS-RO, respectively. The 15-stage Leaky-HZO and Engineered Leaky-HZO NCFET-ROs outperform the double gate-FET-RO by ∼2.19x and ∼16.69x in terms of f_OSC, highlighting their superior performance in frequency-domain metrics. These findings demonstrate the potential of NCFET-based digital and mixed-signal circuits for high-performance integrated circuit designs.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"216 ","pages":"Article 108932"},"PeriodicalIF":1.7,"publicationDate":"2024-03-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140549928","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"NO2 gas response improvement method by adopting oxygen vacancy controlled In2O3 double sensing layers","authors":"Kangwook Choi,&nbsp;Gyuweon Jung,&nbsp;Wonjun Shin,&nbsp;Jinwoo Park,&nbsp;Chayoung Lee,&nbsp;Donghee Kim,&nbsp;Hunhee Shin,&nbsp;Woo Young Choi,&nbsp;Jong-Ho Lee","doi":"10.1016/j.sse.2024.108926","DOIUrl":"https://doi.org/10.1016/j.sse.2024.108926","url":null,"abstract":"<div><p>Recent studies have shown that the sensing capabilities of NO₂ gas sensors can be enhanced by controlling the amount of oxygen vacancy (V_O) in the sensing layer. The sensing layer of the resistor-type sensor can be divided into two regions close to the surface and substrate interface. To control the amount of oxygen vacancy in the sensing layer, oxygen gas flow rate during sputtering is regulated. We fabricate the In₂O₃ gas sensor by vertically adjusting the oxygen vacancy. We place an oxygen vacancy-poor layer on the lower sensing layer and an oxygen vacancy-rich layer on the upper sensing layer. The resistance characteristics of the fabricated sensor are measured through the transmission line method. The NO₂ gas sensing performance of the double sensing layer sensor and the single sensing layer sensor is measured. The best response and fastest response time are observed in the sensor with oxygen vacancy controlled double sensing layer.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"216 ","pages":"Article 108926"},"PeriodicalIF":1.7,"publicationDate":"2024-03-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140341721","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Impact of work function metal stacks on the performance and reliability of multi-Vth RMG CMOS technology","authors":"J. Franco,&nbsp;H. Arimura,&nbsp;S. Brus,&nbsp;E. Dentoni Litta,&nbsp;K. Croes,&nbsp;N. Horiguchi,&nbsp;B. Kaczer","doi":"10.1016/j.sse.2024.108929","DOIUrl":"https://doi.org/10.1016/j.sse.2024.108929","url":null,"abstract":"<div><p>Multi-<em>V_th</em> CMOS device technologies have become standard for System-on-Chip designs. In Replacement Gate technologies, distinct device <em>V_th</em>’s are achieved by deploying different work function metal stacks, and thus concerns exist about the possible chemical interaction of different gate metals with the underlying dielectrics potentially affecting the device performance and reliability. We present a comprehensive study, comprising both electrical measurements and simulations, carried out on a planar transistor platform with state-of-the-art gate stacks. Two different metal stacks are deployed to fabricate low-<em>V_th</em> and ultra-high <em>V_th</em> pMOS and nMOS device flavors. The study provides fundamental insights on the impact of TiAl-based gate metal on EOT, gate leakage, interface quality, carrier mobility, short channel performance, PBTI and NBTI reliability.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"216 ","pages":"Article 108929"},"PeriodicalIF":1.7,"publicationDate":"2024-03-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140341722","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Influence of RF power in the sputter deposition of amorphous InGaZnO film on the transient drain current of amorphous InGaZnO thin-film transistors","authors":"Da Yeon Lee ,&nbsp;Jingyu Park ,&nbsp;Sangwon Lee,&nbsp;Seung Joo Myoung,&nbsp;Hyunkyu Lee,&nbsp;Jong-Ho Bae,&nbsp;Sung-Jin Choi,&nbsp;Dong Myong Kim,&nbsp;Changwook Kim,&nbsp;Dae Hwan Kim","doi":"10.1016/j.sse.2024.108921","DOIUrl":"https://doi.org/10.1016/j.sse.2024.108921","url":null,"abstract":"<div><p>The device electrical and transient current characteristics of the amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs) are comprehensively investigated according to the radio-frequency (RF) power during the sputter-deposition of IGZO active film. The RF power dependencies of the oxygen vacancy (V_O) concentration in IGZO and the surface morphology of IGZO film are analyzed through X-ray photoelectron spectroscopy (XPS) and atomic force microscope (AFM). According to the RF power change in the range of 100 ∼ 250 W, the optimal point in terms of threshold voltage (V_T), ON current (I_on), field-effect mobility in the linear region (μ_{FE_lin}), hysteresis voltage (V_Hys), and the V_T shift under current stress (ΔV_T) is found to be 200 W. The existence of the optimal power condition originates from the RF-power dependencies of the electron carrier concentration, the density of electron traps in gate insulator (GI), and the interface trap density related to surface roughness.</p><p>Furthermore, compared to the direct current (DC) current stress (CS) condition, it is found that when V_GS rises rapidly, a total transient current ΔI_D can be decomposed into three components, i.e., ΔI_OS, ΔI_BOOST, ΔI_DEG. While ΔI_OS is attributed to the non-quasi static Fermi-level rising, ΔI_BOOST and ΔI_DEG result from the donor creation in IGZO and the electron trapping into GI and interface. Noticeably, the occurrence level of each component changes sensitively according to RF power.</p><p>Our result suggests that the 200 W device has the least overshoot of transient current and shows the best reliability in terms of deterioration due to transient current characteristics.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"216 ","pages":"Article 108921"},"PeriodicalIF":1.7,"publicationDate":"2024-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140338911","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"An ultra low power spiking neural encoder of microwave signals","authors":"Christophe Loyez,&nbsp;François Danneville","doi":"10.1016/j.sse.2024.108910","DOIUrl":"https://doi.org/10.1016/j.sse.2024.108910","url":null,"abstract":"<div><p>In this paper, an original concept is presented in order to perform the spike-based encoding of a Continuous Wave (CW) microwave signal. It relies upon the use of the so-called Morris-Lecar Artificial Neuron (ML AN). It is demonstrated that, when applying the CW microwave signal to the ML AN through a transconductance, spike encoding (with low spike frequency) occurs. It is shown that: (i) the output spike frequency varies as function of the CW microwave voltage signal magnitude, (ii) spike encoding of the microwave signal is observed up to a RF frequency as high as 16 GHz. Thanks to the use of the ML AN to perform this microwave signal encoding, an outstanding ultra low power consumption – less than 100 pW – is achieved.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"216 ","pages":"Article 108910"},"PeriodicalIF":1.7,"publicationDate":"2024-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140341719","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Top-gate thin-film transistors with amorphous ZnSnO channel layers prepared by pulsed plasma deposition","authors":"Yue Lan ,&nbsp;Meng Fanxin","doi":"10.1016/j.sse.2024.108931","DOIUrl":"https://doi.org/10.1016/j.sse.2024.108931","url":null,"abstract":"<div><p>In this study, an inorganic–organic hybrid thin-film transistor (TFT) with a top-gate structure is prepared using an inorganic ZnSnO film prepared via pulse plasma deposition as the channel layer and an organic polymethyl methacrylate film prepared by the solution method as the dielectric layer. The effect of oxygen pressure during the preparation of the ZnSnO channel layer and channel-layer structure on ZnSnO TFT performance was studied. The results show that increasing the oxygen pressure during the preparation process can effectively inhibit the formation of oxygen vacancies in ZnSnO and reduce the concentration of electron carriers in ZnSnO, resulting in a reduced off current and a positive shift of the threshold voltage (<em>V</em>_th) in the single-channel layer ZnSnO TFT. In addition, a high-resistivity ZnSnO layer (Lt; with a lower electron-carrier concentration) is embedded between the low-resistivity ZnSnO layer (Lb; with a higher electron-carrier concentration) and the dielectric layer to form a high-/low-resistivity double-channel-layer structure (Lt/Lb). By changing the thickness combination of Lt/Lb, the resistance of the channel layer and the number of carriers modulated by gate voltage in the channel layer can be optimized, thereby adjusting the device’s on current (affecting device mobility) and key energy consumption parameters (i.e., <em>V</em>_th and off current) to achieve independent control. Thus, the fabricated double-channel-layer ZnSnO TFT exhibits excellent performance: high mobility (3.28 cm²/Vs), positive <em>V</em>_th close to 0 V (0.48 V), and on-to-off current ratio of &gt; 10⁵.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"216 ","pages":"Article 108931"},"PeriodicalIF":1.7,"publicationDate":"2024-03-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140341723","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Impact of JFET width on conduction characteristic for p-channel SiC IGBT","authors":"Kunhui Xu ,&nbsp;Xiaoli Tian ,&nbsp;Wei Wei ,&nbsp;Xinhua Wang ,&nbsp;Yun Bai ,&nbsp;Chengyue Yang ,&nbsp;Yidan Tang ,&nbsp;Chengzhan Li ,&nbsp;Xinyu Liu ,&nbsp;Hong Chen","doi":"10.1016/j.sse.2024.108907","DOIUrl":"https://doi.org/10.1016/j.sse.2024.108907","url":null,"abstract":"<div><p>In this article, the mechanism analysis of the impact of the <em>L</em>_JFET on the conduction characteristic of SiC IGBT is verified through simulation results and actual tests. Planar p-channel SiC IGBTs with different <em>L</em>_JFET including 3.2 μm, 10 μm, and 12 μm are fabricated and tested for trend verification, and test results are fit with simulation. Under the same conditions, when the <em>L</em>_JFET increases from 3 μm to 10 μm, the conduction characteristic is relatively improved. Moreover, the forward voltage drop degenerates when the <em>L</em>_JFET increases from 10 μm to 12 μm. When the gate voltage is −20 V, the forward voltage drop of the p-channel SiC IGBT at the current density of 100 A/cm² is −10.20 V. At the same time, the breakdown voltage reaches 10 kV.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"216 ","pages":"Article 108907"},"PeriodicalIF":1.7,"publicationDate":"2024-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140321465","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Tailoring the optoelectronic properties of PZT through the modulation of the thin film","authors":"Z. Li,&nbsp;K. Yao,&nbsp;M. Ashtar,&nbsp;Y. Yang,&nbsp;D. Cao","doi":"10.1016/j.sse.2024.108906","DOIUrl":"10.1016/j.sse.2024.108906","url":null,"abstract":"<div><p>Ferroelectric materials have great promise for use in photodetectors due to their built-in electric field-assisted carrier separation and switchable polarization properties. Carrier separation efficiency is a decisive factor in evaluating photodetector performance. The photodetector optoelectronic performance can be enhanced further by optimizing the thickness of the ferroelectric film to take full advantage of the switchable polarization properties of the ferroelectric material, and by enhancing the built-in electric field to drive carrier separation. In this work, we optimize the performance of PbZr_0.52Ti_0.48O₃ (PZT) photodetectors by modulating the thickness of the film. It is observed that thicker ferroelectric films have lower coercivity fields, which are more favorable for ferroelectric domain switching. On this basis, the ferroelectric properties of ferroelectric PZT films were optimized by thickness tuning, and the photodetection performance of PZT-based self-powered photodetectors was explored. It is found that the polarization enhances the internal electric field, driving photogenerated carrier separation and improving the self-powered current, while also selectively enhancing photodetectivity for devices of different thicknesses. Additionally, both film thickness and ferroelectric polarization significantly impact the response time.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"217 ","pages":"Article 108906"},"PeriodicalIF":1.7,"publicationDate":"2024-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140403008","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}