{"title":"用于先进GAAFET技术的多级神经网络I-V和C-V BSIM-CMG模型全局参数提取器","authors":"Jen-Hao Chen , Fredo Chavez , Chien-Ting Tung , Sourabh Khandelwal , Chenming Hu","doi":"10.1016/j.sse.2025.109081","DOIUrl":null,"url":null,"abstract":"<div><div>A I-V and C-V parameter extraction methodology with various gate lengths utilizing a multi-stage neural network is proposed. This multi-stage neural network contains four networks focusing on extracting parameters from four different regions in transistor’s characteristics, enabling a machine to emulate human’s parameter extraction strategy. This methodology begins with the generation of a training dataset through Monte Carlo simulation, varying 53 selected IV and CV BSIM-CMG model parameters. With each Monte Carlo-selected parameter set, the I-V, transconductance, output conductance and C-V characteristics of seven different GAAFETs with different gate lengths ranging from 9 nm to 389 nm are generated. This multi-stage neural network is trained with the GAAFETs’ characteristics as the input and the 53 model parameters as the output. After training, TCAD-generated GAAFET I-V, conductance and C-V data with various gate lengths are used to test this neural network parameter extractor’s ability of extracting BSIM-CMG model parameters that generate data accurately fitting the TCAD IV and CV data. It is demonstrated that this parameter extraction neural network can extract BSIM-CMG model parameters’ value for GAAFETs within few seconds.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"226 ","pages":"Article 109081"},"PeriodicalIF":1.4000,"publicationDate":"2025-02-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A multi-stage neural network I-V and C-V BSIM-CMG model global parameter extractor for advanced GAAFET technologies\",\"authors\":\"Jen-Hao Chen , Fredo Chavez , Chien-Ting Tung , Sourabh Khandelwal , Chenming Hu\",\"doi\":\"10.1016/j.sse.2025.109081\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><div>A I-V and C-V parameter extraction methodology with various gate lengths utilizing a multi-stage neural network is proposed. This multi-stage neural network contains four networks focusing on extracting parameters from four different regions in transistor’s characteristics, enabling a machine to emulate human’s parameter extraction strategy. This methodology begins with the generation of a training dataset through Monte Carlo simulation, varying 53 selected IV and CV BSIM-CMG model parameters. With each Monte Carlo-selected parameter set, the I-V, transconductance, output conductance and C-V characteristics of seven different GAAFETs with different gate lengths ranging from 9 nm to 389 nm are generated. This multi-stage neural network is trained with the GAAFETs’ characteristics as the input and the 53 model parameters as the output. After training, TCAD-generated GAAFET I-V, conductance and C-V data with various gate lengths are used to test this neural network parameter extractor’s ability of extracting BSIM-CMG model parameters that generate data accurately fitting the TCAD IV and CV data. It is demonstrated that this parameter extraction neural network can extract BSIM-CMG model parameters’ value for GAAFETs within few seconds.</div></div>\",\"PeriodicalId\":21909,\"journal\":{\"name\":\"Solid-state Electronics\",\"volume\":\"226 \",\"pages\":\"Article 109081\"},\"PeriodicalIF\":1.4000,\"publicationDate\":\"2025-02-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Solid-state Electronics\",\"FirstCategoryId\":\"101\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S0038110125000267\",\"RegionNum\":4,\"RegionCategory\":\"物理与天体物理\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Solid-state Electronics","FirstCategoryId":"101","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0038110125000267","RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
A multi-stage neural network I-V and C-V BSIM-CMG model global parameter extractor for advanced GAAFET technologies
A I-V and C-V parameter extraction methodology with various gate lengths utilizing a multi-stage neural network is proposed. This multi-stage neural network contains four networks focusing on extracting parameters from four different regions in transistor’s characteristics, enabling a machine to emulate human’s parameter extraction strategy. This methodology begins with the generation of a training dataset through Monte Carlo simulation, varying 53 selected IV and CV BSIM-CMG model parameters. With each Monte Carlo-selected parameter set, the I-V, transconductance, output conductance and C-V characteristics of seven different GAAFETs with different gate lengths ranging from 9 nm to 389 nm are generated. This multi-stage neural network is trained with the GAAFETs’ characteristics as the input and the 53 model parameters as the output. After training, TCAD-generated GAAFET I-V, conductance and C-V data with various gate lengths are used to test this neural network parameter extractor’s ability of extracting BSIM-CMG model parameters that generate data accurately fitting the TCAD IV and CV data. It is demonstrated that this parameter extraction neural network can extract BSIM-CMG model parameters’ value for GAAFETs within few seconds.
期刊介绍:
It is the aim of this journal to bring together in one publication outstanding papers reporting new and original work in the following areas: (1) applications of solid-state physics and technology to electronics and optoelectronics, including theory and device design; (2) optical, electrical, morphological characterization techniques and parameter extraction of devices; (3) fabrication of semiconductor devices, and also device-related materials growth, measurement and evaluation; (4) the physics and modeling of submicron and nanoscale microelectronic and optoelectronic devices, including processing, measurement, and performance evaluation; (5) applications of numerical methods to the modeling and simulation of solid-state devices and processes; and (6) nanoscale electronic and optoelectronic devices, photovoltaics, sensors, and MEMS based on semiconductor and alternative electronic materials; (7) synthesis and electrooptical properties of materials for novel devices.