Solid-state Electronics最新文献

Exploring the synaptic response of reactive Mn electrodes based TiO2 resistive switches

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2024-11-26 DOI: 10.1016/j.sse.2024.109033

N. Ghenzi , C. Acha

{"title":"Exploring the synaptic response of reactive Mn electrodes based TiO2 resistive switches","authors":"N. Ghenzi , C. Acha","doi":"10.1016/j.sse.2024.109033","DOIUrl":"10.1016/j.sse.2024.109033","url":null,"abstract":"<div><div>Mn/TiO<sub>2</sub>/Mn devices, prepared by reactive sputtering and photolithography techniques, were characterized by analyzing their current–voltage (I-V) dependence, non-volatile memory properties, and artificial synapse behavior. The detailed study of its I-V characteristics allowed for highlighting the main conduction mechanisms involved in the electrical transport through the Mn-TiO<sub>2</sub> junctions and determining an equivalent circuit model. These results show that the oxidation of metallic Mn electrodes and the application of electrical pulses produce a complex scenario associated with a highly inhomogeneous oxygen vacancy distribution. The resistance hysteresis switching loops were determined, as well as the synaptic-like weight depreciation and potentiation, revealing a linear dependence of the reset voltage as a function of the amplitude of the set voltage and a quasi-linear variation of the conductance with the number of applied pulses. Simulations based on spiking neural network architecture, considering different updates of the synaptic weights, were trained to learn handwriting patterns. Notably, those based on the linear learning rule of the Mn/TiO<sub>2</sub>/Mn devices outperformed others with increasing non-linear behavior, demonstrating both high recognition and noise tolerance factors, further highlighting the robustness of this approach.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"223 ","pages":"Article 109033"},"PeriodicalIF":1.4,"publicationDate":"2024-11-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142744360","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Exploration of single-event effects under defocused laser irradiation: Analysis of charge collection in bipolar devices

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2024-11-24 DOI: 10.1016/j.sse.2024.109034

Hengbo Hou , Jiansong Yue , Zhankai Li , Ning Hu , Qiang Wei

{"title":"Exploration of single-event effects under defocused laser irradiation: Analysis of charge collection in bipolar devices","authors":"Hengbo Hou , Jiansong Yue , Zhankai Li , Ning Hu , Qiang Wei","doi":"10.1016/j.sse.2024.109034","DOIUrl":"10.1016/j.sse.2024.109034","url":null,"abstract":"<div><div>Pulsed lasers are employed to simulate Single Event Effects (SEEs) on Earth, with their feasibility empirically validated. In practical applications, it is necessary to correlate laser test results with high-energy particle measurements to accurately predict spatial SEE rates. Most of the current methods rely on charge collection RPP models or nested RPP models for laser-energy particle correlation. These models have not yet accounted for the effect of ionization trace differences. In this paper, ionization traces with different radial dimensions are obtained at different depths inside a bipolar device operational amplifier LM324 by adjusting the defocusing amount of the laser. This study compares charge collection generated by the laser with different characteristic ionization traces and analyzes experimental error factors and the charge collection mechanism. The results indicate that the radial size of the ionization traces inside the device is the main factor affecting the charge collection. Larger radial size of ionization traces on the surface area of the device results in greater charge collection, while smaller radial size of ionization traces in the depletion area and the substrate layer leads to increased charge collection. Additionally, efforts should be made to minimize the effects of movement accuracy errors and off-axis angle errors on the quantitative characterization of the test.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"223 ","pages":"Article 109034"},"PeriodicalIF":1.4,"publicationDate":"2024-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142744359","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Comparative analysis of capacitorless DRAM performance according to stacked junctionless gate-all-around structures

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2024-11-24 DOI: 10.1016/j.sse.2024.109036

Jihye Hwang, Ilgu Yun

{"title":"Comparative analysis of capacitorless DRAM performance according to stacked junctionless gate-all-around structures","authors":"Jihye Hwang, Ilgu Yun","doi":"10.1016/j.sse.2024.109036","DOIUrl":"10.1016/j.sse.2024.109036","url":null,"abstract":"<div><div>The characteristic comparison of the capacitor-less DRAMs in the structural form variation is investigated. Based on the simulation results of the three basic structures, such as circular, square, and rectangular nanosheets, the gate length (L<sub>g</sub>), channel thickness (T<sub>si</sub>), and width of the nanosheet (W<sub>si</sub>) are considered as the main factors in design and the characteristic variations are verified according to the junctionless (JL) gate-all-around (GAA) geometry factors. The channel thickness is a major factor that has a major influence on the sensing margin and the retention time, which are important characteristics of DRAM. The thinner the thickness, the more deteriorated the sensing margin is confirmed. Retention time is due to the influence of the electric field distribution of the JL GAA structure, resulting in differences in structure. Finally, the rectangular type nanosheet is implemented in the stacked structure. As the number of stacks increases, the effective channel width increases compared to the layout footprint. In addition, by stacking vertically, the area where holes can be stored increases. Therefore, the sensing margin tends to increase as the number of stacks increases. However, the difference in diffusion due to the difference in the initially stored hole density, the retention time deteriorates as the number of stacks increases.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"223 ","pages":"Article 109036"},"PeriodicalIF":1.4,"publicationDate":"2024-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142744472","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Defects in polysilicon channel: Insight from first principles and multi-scale modelling

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2024-11-24 DOI: 10.1016/j.sse.2024.109031

R. Maji , T. Rollo , S. Gangopadhyay , E. Luppi , E. Degoli , F. Nardi , L. Larcher , M. Pešić

{"title":"Defects in polysilicon channel: Insight from first principles and multi-scale modelling","authors":"R. Maji , T. Rollo , S. Gangopadhyay , E. Luppi , E. Degoli , F. Nardi , L. Larcher , M. Pešić","doi":"10.1016/j.sse.2024.109031","DOIUrl":"10.1016/j.sse.2024.109031","url":null,"abstract":"<div><div>With increasing demand for essential components in the field of electronic devices, enabling advancements in display technology, flexible electronics, and various industrial applications, thin-film transistors (TFTs) are significant. Their versatility and compatibility with low-temperature fabrication processes make them a vital element in advanced electronic systems. The use of polycrystalline silicon (Poly-Si) as the channel material is specific to TFT applications unlike single-crystal/epitaxial Si in high-performance integrated circuit transistors. Poly-Si is characterized by the presence of defects such as voids, grain boundaries (GBs), and dislocations, that exert detrimental influence on electrical conductivity and then on device performance. Understanding of these would help engineer the novel TFT devices with superior reliability. In this context, Fundamental properties of the GBs are calculated using density functional theory (DFT) and their impact on poly-Si TFTs performance and figures of merit is assessed using the Ginestra® simulation platform. To account the process contaminations, the impact of known lighter impurities on GBs is comprehensively studied. In this paper we show how material properties from DFT can be effectively virtualized to predict electronic device performance, enable fast and reliable evaluation of device sensitivity to material changes, and how outputs of this multi-scale modelling process agree with experiments.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"223 ","pages":"Article 109031"},"PeriodicalIF":1.4,"publicationDate":"2024-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142744473","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A computational study of AlScN-based ferroelectric tunnel junction 基于 AlScN 的铁电隧道结的计算研究

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2024-11-23 DOI: 10.1016/j.sse.2024.109026

Ning Yang, Guoting Cheng, Jing Guo

{"title":"A computational study of AlScN-based ferroelectric tunnel junction","authors":"Ning Yang, Guoting Cheng, Jing Guo","doi":"10.1016/j.sse.2024.109026","DOIUrl":"10.1016/j.sse.2024.109026","url":null,"abstract":"<div><div>Ferroelectric (FE) AlScN materials have been experimentally explored for memory and neuromorphic computing device applications. Here a computational study is performed to simulate the device characteristics and assess the performance potential of a ferroelectric tunnel junction (FTJ) based on AlScN. We parameterize an efficient k<span><math><mi>⋅</mi></math></span>p Hamiltonian from the complex band structure of AlScN from <em>ab initio</em> density-functional theory calculations to enable efficient quantum transport simulations of the FTJ device. Using a metal–FE–graphene structure enhances the barrier height modulation and the tunneling electroresistance (TER) ratio, compared to a metal–FE–semiconductor FTJ device structure. The barrier height modulation between ON and OFF states can reach <span><math><mo>∼</mo></math></span> 0.7eV with a FE polarization of 25 <span><math><mi>μ</mi></math></span>C/cm<sup>2</sup>. Reducing the AlScN tunnel layer thickness is important for increasing the device ON current and reducing the read latency. The results indicate the importance of contact designs and FE layer thickness in the design of AlScN-based FTJ devices, and highlight the potential of AlScN FTJ for future memory device technology applications.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"223 ","pages":"Article 109026"},"PeriodicalIF":1.4,"publicationDate":"2024-11-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142719881","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Effect of Al2O3 on the operation of SiNX-based MIS RRAMs

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2024-11-22 DOI: 10.1016/j.sse.2024.109035

A.E. Mavropoulis , N. Vasileiadis , P. Normand , C. Theodorou , G. Ch. Sirakoulis , S. Kim , P. Dimitrakis

引用次数: 0

Characterization of LDMOS down to cryogenic temperatures and modeling with PSPHV 低至低温的 LDMOS 特性及 PSPHV 建模

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2024-11-19 DOI: 10.1016/j.sse.2024.109029

Yili Wang , Kejun Xia , Guofu Niu , Michael Hamilton , Xu Cheng

{"title":"Characterization of LDMOS down to cryogenic temperatures and modeling with PSPHV","authors":"Yili Wang , Kejun Xia , Guofu Niu , Michael Hamilton , Xu Cheng","doi":"10.1016/j.sse.2024.109029","DOIUrl":"10.1016/j.sse.2024.109029","url":null,"abstract":"<div><div>This article presents a detailed characterization and analysis of a 45 V LDMOS device from production technology across a wide temperature range from 33 to 385 K. For the first time, quasi-saturation behavior is consistently observed throughout the entire temperature range studied. Compared to prior published data, this device shows some notable differences, including a substantially higher saturation temperature of around 200 K for threshold voltage and subthreshold swing due to band tail and a typical low on-resistance down to 33 K, free of freezeout. To account for the observed temperature dependencies, we propose improved semi-empirical temperature scaling equations for the PSPHV model. We extend its applicable temperature range down to 33 K from the previous lower limit of 240 K. The enhancement models the temperature behaviors of key device parameters, including threshold voltage, subthreshold swing, mobility, velocity saturation, drift resistance, and quasi-saturation effects. These results provide new insights into the low-temperature behavior of LDMOS devices for cryogenic electronics applications.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"223 ","pages":"Article 109029"},"PeriodicalIF":1.4,"publicationDate":"2024-11-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142703505","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A multi-level cell for ultra-scaled STT-MRAM realized by back-hopping 通过后跳实现超大规模 STT-MRAM 的多级单元

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2024-11-16 DOI: 10.1016/j.sse.2024.109027

M. Bendra , R.L. de Orio , S. Selberherr , W. Goes , V. Sverdlov

{"title":"A multi-level cell for ultra-scaled STT-MRAM realized by back-hopping","authors":"M. Bendra , R.L. de Orio , S. Selberherr , W. Goes , V. Sverdlov","doi":"10.1016/j.sse.2024.109027","DOIUrl":"10.1016/j.sse.2024.109027","url":null,"abstract":"<div><div>The development of advanced magnetic tunnel junctions with a footprint in the single-digit nanometer range can be achieved using structures with an elongated and composite ferromagnetic free layer. Using advanced modeling techniques, we investigated the back-hopping effect in ultra-scaled STT-MRAM devices, defined as the unintended switching of the last part of the free layer, leading to an undesired magnetization state of the free layer. To understand the switching of the free layer, the torque acting on both parts of the composite-free layer must be studied in detail. A reduction in the size of MRAM components to increase the memory density may lead to back-hopping. However, the observed back-hopping effect can also be exploited for the realization of multi-level cells. For this purpose, we have carefully investigated the switching behavior of a device with several tunnel barrier interfaces and a few nanometers in diameter. Our studies on ultra-scaled STT-MRAM devices highlight the significant back-hopping effect which, when harnessed, can enable multi-bit cells with four distinct states, enhancing storage and functionality. These insights are pivotal for the design and optimization of future miniaturized spintronics devices.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"223 ","pages":"Article 109027"},"PeriodicalIF":1.4,"publicationDate":"2024-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142703504","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Temperature influence on experimental analog behavior of MISHEMTs 温度对 MISHEMT 模拟实验行为的影响

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2024-11-13 DOI: 10.1016/j.sse.2024.109028

Welder F. Perina , Joao A. Martino , Eddy Simoen , Uthayasankaran Peralagu , Nadine Collaert , Paula G.D. Agopian

{"title":"Temperature influence on experimental analog behavior of MISHEMTs","authors":"Welder F. Perina , Joao A. Martino , Eddy Simoen , Uthayasankaran Peralagu , Nadine Collaert , Paula G.D. Agopian","doi":"10.1016/j.sse.2024.109028","DOIUrl":"10.1016/j.sse.2024.109028","url":null,"abstract":"<div><div>This work presents an analysis on experimental analog behavior of MISHEMTs operating in the temperature range from 450 K down to 200 K. The drain current (I<sub>DS</sub>) presented a slight anomaly, especially for temperatures lower than 400 K. In the transconductance it is possible to visualize a second peak, suggesting a second conduction. As shown, the transconductance presented a low dependence on gate length, and an anomaly was observed for the devices at 350 K. The output conductance and transistor efficiency behavior suggest a competition between the effects of the MOS and HEMT conductions, present in the device. A new kink was observed in the output characteristic (I<sub>DS</sub>xV<sub>DS</sub>) at room temperature, which is caused by the HEMT and MOS conductions interaction, and it is even more noticeable for higher overdrive voltages (V<sub>GT</sub>). This effect is called MISHEMT kink effect (MH-kink) in this work. The MH-kink shifts toward higher V<sub>DS</sub> for higher overdrive voltage, showing the stronger influence of the MOS conduction on the total drain current. The unity gain frequency (f<sub>t</sub>) increases from 800 MHz (450 K) to 1.8 GHz (200 K), while the A<sub>V</sub> goes in opposite direction from 43 dB (450 K) to 38 dB (200 K). Considering that the intrinsic voltage gain is good enough even at low temperatures, the MISHEMT can be identified as a good candidate for analog applications.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"223 ","pages":"Article 109028"},"PeriodicalIF":1.4,"publicationDate":"2024-11-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142652702","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A novel method used to prepare PN junction by plasmon generated under pulsed laser irradiation on silicon chip 利用脉冲激光照射硅芯片产生的等离子体制备 PN 结的新方法

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2024-11-08 DOI: 10.1016/j.sse.2024.109023

Wei-Qi Huang , Yin-Lian Li , Zhong-Mei Huang , Hao-Ze Wang , Shi-Rong Liu

{"title":"A novel method used to prepare PN junction by plasmon generated under pulsed laser irradiation on silicon chip","authors":"Wei-Qi Huang , Yin-Lian Li , Zhong-Mei Huang , Hao-Ze Wang , Shi-Rong Liu","doi":"10.1016/j.sse.2024.109023","DOIUrl":"10.1016/j.sse.2024.109023","url":null,"abstract":"<div><div>We prepare the PN junction on silicon chip by a novel method with surface plasmon generated under pulsed laser irradiation. It is found that the interaction between laser photons and plasma produces a plasmon layer, in which the faster electrons take resonance with photons to generate surface electron gas. It is interesting that the electron gas in high vacuum and the plasmon polarized in various atmosphere are directly observed by the Talbot reflect image with outstanding challenge. It is demonstrated that injection and diffusion can be completed quickly to form higher quality PN region on interface between ions layer and substrate while the plasmon dipole makes resonance with phonon, where the quantum energy of plasmon is closed to the phonon energy in silicon crystal. In this novel way, the PN junction structure can be built by coherent photons on silicon chip at first, and the different preparing processes are explored comparatively by using the I-V curves measured with nonlinear characteristic of PN junction for application in optic-electronic integration field.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"223 ","pages":"Article 109023"},"PeriodicalIF":1.4,"publicationDate":"2024-11-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142652700","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0