Solid-state Electronics最新文献

Unveiling the output conductance dynamics in Nanosheet FET: Does cryogenic temperature Make a Difference? 揭示纳米片场效应管的输出电导动态：低温是否有影响？

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2026-06-01 Epub Date: 2026-02-08 DOI: 10.1016/j.sse.2026.109348

Malvika , Prabhat Singh , Navjeet Bagga , Mohd. Shakir , Ankit Dixit , Naveen Kumar , Vihar Georgiev , S. Dasgupta

{"title":"Unveiling the output conductance dynamics in Nanosheet FET: Does cryogenic temperature Make a Difference?","authors":"Malvika , Prabhat Singh , Navjeet Bagga , Mohd. Shakir , Ankit Dixit , Naveen Kumar , Vihar Georgiev , S. Dasgupta","doi":"10.1016/j.sse.2026.109348","DOIUrl":"10.1016/j.sse.2026.109348","url":null,"abstract":"<div><div>Channel length modulation (CLM) and drain-induced barrier lowering (DIBL) are well-known short-channel effects that result in a finite output conductance (g<sub>ds</sub>). In a simplified analysis, g<sub>ds</sub> is predominantly governed by the drain voltage (V<sub>DS</sub>) and can be approximated by the slope of the I<sub>DS</sub>–V<sub>DS</sub> characteristics in the saturation regime. However, will the conceptual governance of g<sub>ds</sub> be the same at the cryogenic temperatures? To answer this question, we thoroughly investigate the Cryogenic Nanosheet FET (NSFET) using well-calibrated TCAD models. The results reveal that incomplete ionization in the cryogenic temperature (CT) regime provides additional expansion of the depletion at the drain side. This significantly increases g<sub>ds</sub> (i.e., the slope of the IDS-VDS characteristics) in CT compared to that at room temperature (RT). Therefore, in a Cryogenic FET, CLM becomes the function of temperature. Further, we extracted the CLM parameter (λ), early voltage (V<sub>A</sub>), and intrinsic gain (g<sub>max</sub>/g<sub>ds</sub>) of the Nanosheet FET with varying temperatures and found that the g<sub>max</sub>/g<sub>ds</sub> is maximum at 4 K.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"234 ","pages":"Article 109348"},"PeriodicalIF":1.4,"publicationDate":"2026-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146190185","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Bonding of micro LEDs using wet reflow process of indium bumps based on SU-8 solder mask 基于SU-8阻焊膜的铟凸点湿回流焊微型led

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2026-06-01 Epub Date: 2026-01-13 DOI: 10.1016/j.sse.2026.109333

Shuangjia Bai , Taifu Lang , Xin Lin , Shuaishuai Wang , Zhihua Wang , Chang Lin , Qun Yan , Jie Sun

{"title":"Bonding of micro LEDs using wet reflow process of indium bumps based on SU-8 solder mask","authors":"Shuangjia Bai , Taifu Lang , Xin Lin , Shuaishuai Wang , Zhihua Wang , Chang Lin , Qun Yan , Jie Sun","doi":"10.1016/j.sse.2026.109333","DOIUrl":"10.1016/j.sse.2026.109333","url":null,"abstract":"<div><div>This study proposes an innovative wet reflow process utilizing SU-8 photoresist as the solder mask for fabricating In bump arrays in Micro LED packaging. Conventional solder masks such as SiO<sub>2</sub> or metal layers involve complex processes, elevated temperatures, and limited compatibility with flexible substrates. In contrast, SU-8 enables mask patterning via single-step UV lithography, greatly simplifying fabrication and effectively reducing manufacturing complexity and cost. The optimized process achieved a 480 × 640 In bump array with excellent morphology: surface roughness (R<sub>a</sub>) reduced from 0.65 μm to 0.126 μm, height non-uniformity improved from 4.8 % to 0.28 %, and shear strength increased nearly tenfold to 1.106 N. Using glycerol as an eco-friendly wet reflow medium facilitated oxide mitigation and enhanced bump uniformity and bonding reliability. The results demonstrate that this low-temperature, efficient, and scalable approach offers clear advantages for high-yield Micro LED integration, particularly in flexible and high-resolution display applications.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"234 ","pages":"Article 109333"},"PeriodicalIF":1.4,"publicationDate":"2026-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146049119","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Ag-Cu2O nano composite: A comprehensive study on Ag concentration effect on physical properties for a two-band laser detector Ag- cu2o纳米复合材料：Ag浓度对双波段激光探测器物理性能影响的综合研究

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2026-06-01 Epub Date: 2026-01-27 DOI: 10.1016/j.sse.2026.109342

Evan T. Salim , Rana O. Mahdi , Roaa A. Abbas , Zaid T. Salim , Subash C.B. Gopinath , Ahmed A. Al-Amiery

{"title":"Ag-Cu2O nano composite: A comprehensive study on Ag concentration effect on physical properties for a two-band laser detector","authors":"Evan T. Salim , Rana O. Mahdi , Roaa A. Abbas , Zaid T. Salim , Subash C.B. Gopinath , Ahmed A. Al-Amiery","doi":"10.1016/j.sse.2026.109342","DOIUrl":"10.1016/j.sse.2026.109342","url":null,"abstract":"<div><div>Hydrothermally formed silver-decorated cuprous oxide thin films were synthesized at different Ag concentrations. The optimum condition sample was used for the formation of high-performance optoelectronic devices, which show enhancements in the pure Cu<sub>2</sub>O/p-Si heterojunction device. Structural properties studied by XRD show successful decoration on the Cu2O surface, with Ag decoration inducing a controlled reduction in Cu<sub>2</sub>O crystallite size (33.4 to 30.4 nm). Notably, silver decoration produced a strategy for band gap narrowing from 2.29 to 2.12 eV, while SERS analysis shows signal enhancement for Ag decorated cuprous oxide in comparison with pure Cu2O.</div><div>The optimum condition was obtained from a sample of 0.01 g, which was used for the synthesis of Ag@Cu<sub>2</sub>O/p-Si heterojunction to enhance the photodetector properties, including a responsivity, detectivity, and quantum efficiency. The built-in potential of 1.4 V compared with pure Cu<sub>2</sub>O/p-Si. This configuration of the device produces an enhancement in the responsivity across the visible to near-IR spectrum.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"234 ","pages":"Article 109342"},"PeriodicalIF":1.4,"publicationDate":"2026-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146081895","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Mixed finite element method for device simulations 器件仿真的混合有限元法

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2026-06-01 Epub Date: 2026-01-30 DOI: 10.1016/j.sse.2026.109346

Yingjia Gao, Naveen Kumar, Ross Williams, Andrei Shvarts, Łukasz Kaczmarczyk, Vihar Georgiev

引用次数: 0

Assessment of dual-oxide options for LDMOS transistors in FinFET technology 在FinFET技术中LDMOS晶体管的双氧化物选择评估

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2026-06-01 Epub Date: 2026-02-04 DOI: 10.1016/j.sse.2026.109345

Alessandro Ruggieri, Lisa Tondelli, Luca Selmi

{"title":"Assessment of dual-oxide options for LDMOS transistors in FinFET technology","authors":"Alessandro Ruggieri, Lisa Tondelli, Luca Selmi","doi":"10.1016/j.sse.2026.109345","DOIUrl":"10.1016/j.sse.2026.109345","url":null,"abstract":"<div><div>We present a comparison of three LDMOS transistor designs in <span><math><mo>≃</mo></math></span>16 nm FinFET technology with different gate stack configurations: thick ITL oxide, thin ITL oxide, and a combination of both (dual ITL oxide thickness). We analyze by simulation how the gate oxide stack influences the main performance and time-zero degradation rate indicators.</div><div>The simulations suggest that, for the same doping profile and gate length (L<span><math><msub><mrow></mrow><mrow><mi>G</mi></mrow></msub></math></span>), the dual-oxide configuration has transition frequency (f<span><math><msub><mrow></mrow><mrow><mi>T</mi></mrow></msub></math></span>) and on-resistance (R<span><math><msub><mrow></mrow><mrow><mi>DS,on</mi></mrow></msub></math></span>) within <span><math><mo>≈</mo></math></span>16% and 6% of those of thick and thin-oxide devices, respectively, while the maximum substrate and gate currents are <span><math><mo>≈</mo></math></span>35% and 43% smaller than for a fully thin-oxide device, respectively. Consequently, the dual-oxide configuration enables L<span><math><msub><mrow></mrow><mrow><mi>G</mi></mrow></msub></math></span> scaling and improvements in f<span><math><msub><mrow></mrow><mrow><mi>T</mi></mrow></msub></math></span> and R<span><math><msub><mrow></mrow><mrow><mi>DS,on</mi></mrow></msub></math></span> while keeping degradation monitors under control.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"234 ","pages":"Article 109345"},"PeriodicalIF":1.4,"publicationDate":"2026-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146190186","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A probabilistic compact model of ReRAM memories for accurate and high-performance simulation 一个精确和高性能仿真的概率紧凑模型

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2026-06-01 Epub Date: 2026-02-05 DOI: 10.1016/j.sse.2026.109349

S. Guitarra, M. Gavilánez, J. Cevallos, A. Vélez

引用次数: 0

Impact of top electrode materials on resistive switching characteristics of TiOx-based MIM structures 顶电极材料对tiox基MIM结构阻性开关特性的影响

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2026-04-01 Epub Date: 2026-01-01 DOI: 10.1016/j.sse.2025.109329

Karimul Islam , Rezwana Sultana , Aleksandra Dzięgielewska , Robert Mroczyński

{"title":"Impact of top electrode materials on resistive switching characteristics of TiOx-based MIM structures","authors":"Karimul Islam , Rezwana Sultana , Aleksandra Dzięgielewska , Robert Mroczyński","doi":"10.1016/j.sse.2025.109329","DOIUrl":"10.1016/j.sse.2025.109329","url":null,"abstract":"<div><div>This study investigates the influence of the top metal electrode on the resistive switching (RS) behavior of the metal/TiO<sub>x</sub>/ITO structure. Specifically, the effects of Al and TiN as top electrodes were examined in devices utilizing a 30 nm TiO<sub>x</sub> thin film as the active layer, deposited using a pulsed-DC reactive sputtering technique. Both configurations exhibited non-volatile bipolar resistive switching, demonstrating endurance over 100 cycles and stable data retention (>10<sup>4</sup> s). The results indicate that the choice of top electrode (TE) plays a crucial role in determining the electroforming process, current conduction mechanisms, and overall RS performance. Notably, devices with TiN as a TE exhibited more consistent RS behavior, with a superior ON/OFF ratio and enhanced operational stability. These findings demonstrate that electrode engineering offers a viable pathway to enhance resistive switching performance. The insights gained from this study provide a basis for the rational design and optimization of CMOS-compatible TiO<sub>x</sub>-based resistive random-access memory (RRAM) devices.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"233 ","pages":"Article 109329"},"PeriodicalIF":1.4,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145927752","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A 10T2R non-volatile SRAM cell design with high-reliability 一种高可靠性的10T2R非易失性SRAM单元设计

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2026-04-01 Epub Date: 2025-12-05 DOI: 10.1016/j.sse.2025.109304

So-Yeon Kwon, Woon-San Ko, Jun-Ho Byun, Do-Yeon Lee, So-Yeong Park, Hye-Ri Hong, Ga-Won Lee

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Warm white electrical sensitivities of pentacene-based Schottky photodiode 五苯基肖特基光电二极管的暖白色电灵敏度

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2026-04-01 Epub Date: 2025-12-29 DOI: 10.1016/j.sse.2025.109327

Ghusoon M. Ali , Kahtan Adnan Hussain , Shahad T. Armoot

{"title":"Warm white electrical sensitivities of pentacene-based Schottky photodiode","authors":"Ghusoon M. Ali , Kahtan Adnan Hussain , Shahad T. Armoot","doi":"10.1016/j.sse.2025.109327","DOIUrl":"10.1016/j.sse.2025.109327","url":null,"abstract":"<div><div>This study investigates the electrical sensitivities of warm white Al/pentacene/p-Si/Pd Schottky photodiodes with respect to current–voltage (I-V), capacitance–voltage (C-V), and conductance-voltage (G-V) characteristics. The pentacene thin film is deposited using the vacuum thermal evaporation technique. The energy level parameters of the Schottky junction are estimated through energy band diagrams. Two models are introduced to analyze the forward I-V characteristics of the pentacene Schottky diode: the thermionic emission theory and the space-charge-limited current model, both of which explain the mechanisms of charge carrier transport. The I-V, C-V, and G-V characteristics were examined under both dark and warm white illumination conditions, across a voltage range of −4 to 4 V at room temperature. Moreover, a study was conducted to assess, extract, and compare the sensitivities of current (S<sub>I</sub>), capacitance (S<sub>C</sub>), and conductance (S<sub>CO</sub>). The maximum S<sub>I</sub> is 1682 % at 0 V. Therefore, the proposed device demonstrates outstanding performance as a self-powered photodetector. The maximum S<sub>C</sub> is 38 % at −2.1 V, and S<sub>CO</sub> is 370 % at −1.6 V. The variations in sensitivity values are attributed to the different detection mechanisms employed. Overall, the results demonstrate the significant potential of the current-mode Schottky pentacene diode for use as a warm white self-powered photodetector.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"233 ","pages":"Article 109327"},"PeriodicalIF":1.4,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145885565","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Application of forksheet transistor in operational transconductance amplifier 叉片晶体管在运算跨导放大器中的应用

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2026-04-01 Epub Date: 2026-01-01 DOI: 10.1016/j.sse.2025.109330

Joao Antonio Martino , Julius Andretti Peixoto Pires de Paula , Paula Ghedini Der Agopian , Romain Ritzenthaler , Hans Mertens , Anabela Veloso , Naoto Horiguchi

{"title":"Application of forksheet transistor in operational transconductance amplifier","authors":"Joao Antonio Martino , Julius Andretti Peixoto Pires de Paula , Paula Ghedini Der Agopian , Romain Ritzenthaler , Hans Mertens , Anabela Veloso , Naoto Horiguchi","doi":"10.1016/j.sse.2025.109330","DOIUrl":"10.1016/j.sse.2025.109330","url":null,"abstract":"<div><div>This work presents, for the first time, experimental data on forksheet transistor used in the design of operational transconductance amplifiers (OTA), highlighting their potential for application in analog circuits. The OTA was designed for three different transistor efficiencies: gm/I<sub>D</sub> of 5, 8 and 11 V<sup>−1</sup>. The experimental n-type forksheet used in this work presents a sheet thickness of H<sub>FS</sub> = 7 nm, sheet width of W<sub>FS</sub> = 23 nm and a transistor channel length of L<sub>G</sub> = 70 nm. When the gm/I<sub>D</sub> increases from 5 to 11 V<sup>−1</sup>, the drain current and the transconductance decrease, which improves the OTA voltage gain (Av ∝ gm/I<sub>D</sub>) from 49 dB to 63 dB, the total power dissipation (Power ∝ I<sub>D</sub>) also improves (decreases) from 528 μW to 129 μW, while degrades the Gain-Bandwidth Product (GBW) from 343 MHz to 196 MHz (GBW ∝ gm). Depending on the application, the OTA bias conditions must be set appropriately due to the trade-off between Av and GBW. The obtained results show that the forksheet can be used for analog circuits such as OTA, for application in mixed-signal integrated circuits using this technology.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"233 ","pages":"Article 109330"},"PeriodicalIF":1.4,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145885563","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0