Solid-state Electronics最新文献

Temperature influence on experimental analog behavior of MISHEMTs 温度对 MISHEMT 模拟实验行为的影响

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2024-11-13 DOI: 10.1016/j.sse.2024.109028

Welder F. Perina , Joao A. Martino , Eddy Simoen , Uthayasankaran Peralagu , Nadine Collaert , Paula G.D. Agopian

{"title":"Temperature influence on experimental analog behavior of MISHEMTs","authors":"Welder F. Perina , Joao A. Martino , Eddy Simoen , Uthayasankaran Peralagu , Nadine Collaert , Paula G.D. Agopian","doi":"10.1016/j.sse.2024.109028","DOIUrl":"10.1016/j.sse.2024.109028","url":null,"abstract":"<div><div>This work presents an analysis on experimental analog behavior of MISHEMTs operating in the temperature range from 450 K down to 200 K. The drain current (I<sub>DS</sub>) presented a slight anomaly, especially for temperatures lower than 400 K. In the transconductance it is possible to visualize a second peak, suggesting a second conduction. As shown, the transconductance presented a low dependence on gate length, and an anomaly was observed for the devices at 350 K. The output conductance and transistor efficiency behavior suggest a competition between the effects of the MOS and HEMT conductions, present in the device. A new kink was observed in the output characteristic (I<sub>DS</sub>xV<sub>DS</sub>) at room temperature, which is caused by the HEMT and MOS conductions interaction, and it is even more noticeable for higher overdrive voltages (V<sub>GT</sub>). This effect is called MISHEMT kink effect (MH-kink) in this work. The MH-kink shifts toward higher V<sub>DS</sub> for higher overdrive voltage, showing the stronger influence of the MOS conduction on the total drain current. The unity gain frequency (f<sub>t</sub>) increases from 800 MHz (450 K) to 1.8 GHz (200 K), while the A<sub>V</sub> goes in opposite direction from 43 dB (450 K) to 38 dB (200 K). Considering that the intrinsic voltage gain is good enough even at low temperatures, the MISHEMT can be identified as a good candidate for analog applications.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"223 ","pages":"Article 109028"},"PeriodicalIF":1.4,"publicationDate":"2024-11-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142652702","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A novel method used to prepare PN junction by plasmon generated under pulsed laser irradiation on silicon chip 利用脉冲激光照射硅芯片产生的等离子体制备 PN 结的新方法

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2024-11-08 DOI: 10.1016/j.sse.2024.109023

Wei-Qi Huang , Yin-Lian Li , Zhong-Mei Huang , Hao-Ze Wang , Shi-Rong Liu

{"title":"A novel method used to prepare PN junction by plasmon generated under pulsed laser irradiation on silicon chip","authors":"Wei-Qi Huang , Yin-Lian Li , Zhong-Mei Huang , Hao-Ze Wang , Shi-Rong Liu","doi":"10.1016/j.sse.2024.109023","DOIUrl":"10.1016/j.sse.2024.109023","url":null,"abstract":"<div><div>We prepare the PN junction on silicon chip by a novel method with surface plasmon generated under pulsed laser irradiation. It is found that the interaction between laser photons and plasma produces a plasmon layer, in which the faster electrons take resonance with photons to generate surface electron gas. It is interesting that the electron gas in high vacuum and the plasmon polarized in various atmosphere are directly observed by the Talbot reflect image with outstanding challenge. It is demonstrated that injection and diffusion can be completed quickly to form higher quality PN region on interface between ions layer and substrate while the plasmon dipole makes resonance with phonon, where the quantum energy of plasmon is closed to the phonon energy in silicon crystal. In this novel way, the PN junction structure can be built by coherent photons on silicon chip at first, and the different preparing processes are explored comparatively by using the I-V curves measured with nonlinear characteristic of PN junction for application in optic-electronic integration field.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"223 ","pages":"Article 109023"},"PeriodicalIF":1.4,"publicationDate":"2024-11-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142652700","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Influence of Ag-Bi2S3 nanocomposites for highly sensitive and selective Cl2 gas sensors: Synthesis, characterization, and gas sensing performance Ag-Bi2S3 纳米复合材料对高灵敏度和选择性 Cl2 气体传感器的影响：合成、表征和气体传感性能

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2024-11-02 DOI: 10.1016/j.sse.2024.109024

Gangadhar Bandewad , Chetan Kamble , Sunil Pawar

{"title":"Influence of Ag-Bi2S3 nanocomposites for highly sensitive and selective Cl2 gas sensors: Synthesis, characterization, and gas sensing performance","authors":"Gangadhar Bandewad , Chetan Kamble , Sunil Pawar","doi":"10.1016/j.sse.2024.109024","DOIUrl":"10.1016/j.sse.2024.109024","url":null,"abstract":"<div><div>The gas sensing capabilities of Bi<sub>2</sub>S<sub>3</sub> chalcogenide have been actively enhanced and explored revealing its potential for high-performance Cl<sub>2</sub> gas detection under different environmental conditions and sensing configurations. This work successfully synthesized Bi<sub>2</sub>S<sub>3</sub> material via the SILAR method and further enhanced its sensing capabilities by fabricating Ag-Bi<sub>2</sub>S<sub>3</sub> nanocomposite. Both pristine Bi<sub>2</sub>S<sub>3</sub> and Ag-Bi<sub>2</sub>S<sub>3</sub> nanocomposite films underwent comprehensive characterization utilizing techniques such as FESEM, EDX, XRD, XPS, and RAMAN to analyze their morphological, structural, and chemical properties. Gas sensing capabilities were evaluated across a temperature range of 26–350 °C and varying Cl<sub>2</sub> gas concentrations (0.1–50 ppm). The findings reveal that the Ag-Bi<sub>2</sub>S<sub>3</sub> sensor demonstrates notably superior Cl<sub>2</sub> sensing response, particularly at an operational temperature of 150 °C, suggesting its promising potential for Cl<sub>2</sub> detection. The LOD has been calculated for Ag-Bi<sub>2</sub>S<sub>3</sub> sensor showing results of 0.150 better than pristine Bi<sub>2</sub>S<sub>3.</sub> HOMO-LUMO and PCA analysis for sensors has been studied to understand their capabilities with different gas sensing.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"223 ","pages":"Article 109024"},"PeriodicalIF":1.4,"publicationDate":"2024-11-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142652701","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Achieving 15.75% efficiency in solar cells: Advanced surface engineering using Tetra-Tert-Butyl-Tercarbazol-Benzonitrile and organic layer integration in n-type silicon wafer and hybrid Planar-Si systems 实现 15.75% 的太阳能电池效率：使用四叔丁基三咔唑-苯腈的先进表面工程以及 n 型硅晶片和混合平面硅系统中的有机层集成

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2024-11-02 DOI: 10.1016/j.sse.2024.109025

Fahim Ullah , Kamran Hasrat , Sami Iqbal , Shuang Wang

{"title":"Achieving 15.75% efficiency in solar cells: Advanced surface engineering using Tetra-Tert-Butyl-Tercarbazol-Benzonitrile and organic layer integration in n-type silicon wafer and hybrid Planar-Si systems","authors":"Fahim Ullah , Kamran Hasrat , Sami Iqbal , Shuang Wang","doi":"10.1016/j.sse.2024.109025","DOIUrl":"10.1016/j.sse.2024.109025","url":null,"abstract":"<div><div>This study investigates the progress in n-type solar cells utilizing implanted Tetra-Tert-Butyl-Tercarbazol-Benzonitrile (TTB-TB-BNZ) front surface fields and diffused Ag rear emitters. The n-type structure utilizes a systematic approach involving surface passivation, localized laser ablation, and screen printing, similar to commercial p-type solar cells. This design enables the conversion from p-type to n-type cell production. Ion implantation allows for accurate management of doping profiles, improving processing sequences and increasing efficiency. Analysis indicates that reduced post-implant annealing durations lead to a shallower doping profile, enhancing short-wavelength response. Its results in efficiencies reaching up to 15.75 % on large-area 200 cm2 n-type wafers. The study also examines hybrid planar-Si/organic heterojunction solar cells, emphasizing Tetra-Tert-Butyl-Tercarbazol-Benzonitrile (TTB-TB-BNZ) to improve photovoltaic efficiency. UV–visible and fluorescence spectroscopy indicate a maximum absorption wavelength of 360 nm and an emission wavelength of 420 nm. The concentration of TTB-TB-BNZ in (4,4′-di(9H-carbazol-9-yl)-1,1′-biphenyl) (CBP) films reaches its peak effectiveness at 40–50 %, leading to notable enhancements in light absorption and charge transport. The Si/PEDOT: PSS heterojunction solar cells incorporating TTB-TB-BNZ demonstrate a power conversion efficiency (PCE) of 15.75 %. This result underscores the potential for scalable fabrication methods to improve photovoltaic performance.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"223 ","pages":"Article 109025"},"PeriodicalIF":1.4,"publicationDate":"2024-11-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142586195","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Spiro-OMeTAD Anchoring perovskite for gradual homojunction in stable perovskite solar cells 在稳定的过氧化物太阳能电池中逐步实现同质结的螺氨过氧化物锚定过氧化物

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2024-11-01 DOI: 10.1016/j.sse.2024.109003

Ziyi Wang , Bobo Yuan , Yiheng Gao, Rui Wu, Shuping Xiao, Wuchen Xiang, Xueli Yu, Pingli Qin

{"title":"Spiro-OMeTAD Anchoring perovskite for gradual homojunction in stable perovskite solar cells","authors":"Ziyi Wang , Bobo Yuan , Yiheng Gao, Rui Wu, Shuping Xiao, Wuchen Xiang, Xueli Yu, Pingli Qin","doi":"10.1016/j.sse.2024.109003","DOIUrl":"10.1016/j.sse.2024.109003","url":null,"abstract":"<div><div>The role of interface energetics-modification in interface-defect passivation and optimal interface energy-level matching is assumed to be a crucial aspect. Enhancing the performance and durability of perovskite solar cells (PSCs) can be achieved through this strategy. Here, spiro-OMeTAD [2,2′,7,7′-tetrakis (N, N-di-p-methoxyphenylamine)-9,9′-spirobifluorene] has been pipetted onto the spinning perovskite precursor film via a chlorobenzene anti-solvent strategy. It is found that spiro-OMeTAD serves as not only the filler at grain boundaries, but also the coverage on perovskite’s grain, and then forms the gradual homojunction interface from perovskite to spiro-OMeTAD hole transport layer, which can make spiro-OMeTAD anchor perovskite via the reaction between Pb<sup>2+</sup> and C-O groups to decrease the interface barrier and obtain the optimal interface energy-level match between them for hole −migration and −collection. Moreover, these fillers or coverages can prevent moisture invading perovskite. Consequently, the counterpart PSC achieves a champion efficiency of 24.46 %, and has retained more than 88 % of the initial efficiency after 224 days of storage.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"221 ","pages":"Article 109003"},"PeriodicalIF":1.4,"publicationDate":"2024-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142571714","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Silicon-based integrated passive device stack for III-V/Si monolithic 3D circuits operating on RF band 用于射频波段 III-V/Si 单片 3D 电路的硅基集成无源器件堆栈

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2024-10-22 DOI: 10.1016/j.sse.2024.109012

Minsik Park , Minkyoung Seong , Jaeyong Jeong , Seungin Lee , Jonghyun Song , Hyoungho Ko , Ga-Won Lee , Woo-Suk Sul , Won-Chul Lee , Sanghyeon Kim , Jongwon Lee

{"title":"Silicon-based integrated passive device stack for III-V/Si monolithic 3D circuits operating on RF band","authors":"Minsik Park , Minkyoung Seong , Jaeyong Jeong , Seungin Lee , Jonghyun Song , Hyoungho Ko , Ga-Won Lee , Woo-Suk Sul , Won-Chul Lee , Sanghyeon Kim , Jongwon Lee","doi":"10.1016/j.sse.2024.109012","DOIUrl":"10.1016/j.sse.2024.109012","url":null,"abstract":"<div><div>In this study, we demonstrated a silicon (Si)-based integrated passive device (IPD) stack to support III-V/Si monolithic 3D (M3D) ICs operating on the radio frequency (RF) band. The IPD stack was fabricated based on an 8-inch CMOS process line and integrated via M3D with an InGaAs HEMT layer. A process condition for a trap rich layer and a buried oxide layer in the IPD was established to simultaneously minimizing both the RF loss and wafer bowing. Through the process condition, the RF loss of the coplanar waveguides was −0.631 dB/mm at 30 GHz, lower than that of the CMOS foundry, and the wafer bowing of the stack was as low as −5.5 μm. The maximum quality factor of the inductors showed good values when compared to those of other CMOS foundry process-based inductors operating on the RF bands reported thus far. To obtain a compressive profile for the IPD stack, which is one of the most important requirements in advancing to wafer-to-wafer-level 3D bonding with the III-V active layer, a process method for the final IMD layer of the IPD was developed, resulting in a change from a tensile profile to a compressive profile for the IPD (corresponding wafer bowing value from −12.6 to + 10.7 μm).</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"221 ","pages":"Article 109012"},"PeriodicalIF":1.4,"publicationDate":"2024-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142536111","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Influence of gate work function variations on characteristics of fin-shaped silicon quantum dot device with multi-gate under existence of gate electrostatic coupling 栅极功函数变化对存在栅极静电耦合的多栅极鳍状硅量子点器件特性的影响

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2024-10-22 DOI: 10.1016/j.sse.2024.109013

Kimihiko Kato, Hidehiro Asai, Hiroshi Oka, Shota Iizuka, Hiroshi Fuketa, Takumi Inaba, Takahiro Mori

引用次数: 0

Sputter-Deposited copper iodide thin film transistors with low Operating voltage 低工作电压的溅射沉积碘化铜薄膜晶体管

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2024-10-21 DOI: 10.1016/j.sse.2024.109014

Zachary C. Adamson , Rotem Zilberberg , Iryna Polishchuk , Natalia Thomas , Kyumin Kim , Alexander Katsman , Boaz Pokroy , Alexander Zaslavsky , David C. Paine

{"title":"Sputter-Deposited copper iodide thin film transistors with low Operating voltage","authors":"Zachary C. Adamson , Rotem Zilberberg , Iryna Polishchuk , Natalia Thomas , Kyumin Kim , Alexander Katsman , Boaz Pokroy , Alexander Zaslavsky , David C. Paine","doi":"10.1016/j.sse.2024.109014","DOIUrl":"10.1016/j.sse.2024.109014","url":null,"abstract":"<div><div>This paper reports on a back-gated p-type thin film transistor (TFT) with copper iodide (CuI) as the channel material, a HfO<sub>2</sub> gate dielectric layer, and Al<sub>2</sub>O<sub>3</sub> passivation. The γ-CuI channel was deposited from a CuI target using DC magnetron sputtering at room temperature. Our TFT can be fully shut off by V<sub>G</sub> = 4 V, with a field-effect channel hole mobility μ<sub>h</sub> ∼ 1.5–2 cm<sup>2</sup> V<sup>−1</sup> s<sup>−1</sup>. An anneal in forming gas was performed twice, once at 200 °C, then at 250 °C to improve gate control, yielding a final I<sub>on</sub>/I<sub>off</sub> current ratio of ∼ 250. The anneal served two purposes: to reduce the oxygen acceptor density in the CuI channel and reduce the concentration of interface states between the CuI, Al<sub>2</sub>O<sub>3</sub> passivation, and HfO<sub>2</sub>. A model of the device was built in an industrial TCAD simulator, which reproduces the measured characteristics and allows an estimation of interface state densities and channel doping.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"221 ","pages":"Article 109014"},"PeriodicalIF":1.4,"publicationDate":"2024-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142536110","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Enhanced resistive switching performance in TiN/AlOx/Pt RRAM by high-temperature I-V cycling 通过高温 I-V 循环提高 TiN/AlOx/Pt RRAM 的电阻开关性能

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2024-10-15 DOI: 10.1016/j.sse.2024.109011

Tao He , Huiyu Yan , Yixuan Wang

引用次数: 0

A well-conditioned surface potential equation for dynamically depleted SOI MOS devices accounting for the front-depletion/back-accumulation operation mode 适用于动态耗尽型 SOI MOS 器件的表面电势方程（考虑了前耗尽/后积累工作模式

IF 1.4 4区物理与天体物理

Solid-state Electronics Pub Date : 2024-10-10 DOI: 10.1016/j.sse.2024.109010

Thomas Bédécarrats, Sébastien Martinie, Adrien Vaysset, Olivier Rozeau

引用次数: 0