多阈值电流水平下共振隧道输运控制电压感应双量子点通道纳米线场效应晶体管(DQD-FET)的设计与建模

IF 1.4 4区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
N. Paul , S. Chattopadhyay
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引用次数: 0

摘要

本文研究了互补金属氧化物半导体(CMOS)兼容双量子点通道纳米线场效应晶体管(FET)中栅极电压控制的谐振隧道输运模型。在两个独立的门上施加适当的电压,器件的门1和门2在门的下面形成两个电压可调的量子点,在纳米线通道内。量子点本征态通过改变所施加的栅极电压来调谐,从而实现电压调制的谐振隧道传输。这种传输通过使用非平衡格林函数(NEGF)形式主义的Schrödinger-Poisson自洽框架来建模。同时也考虑了纳米线通道内的电子-声子散射。由于谐振隧道效应的存在,传输特性在10−4 μA/μm - 1 μA/μm范围内表现出多个电流阈值。观察到声子散射显著依赖于纳米线几何形状和施加的栅极电压,在较高的栅极电压下发生隧道主导的准弹道输运。当纳米线直径在20 nm ~ 5 nm范围内变化时,室温下的亚阈值斜率为30 mV/decade ~ 8 mV/decade,跨导范围为10 ~ 7 μS/μm ~ 1 μS/μm。因此,这种器件架构在室温下实现CMOS兼容架构的多电流阈值方面显示出巨大的潜力。
本文章由计算机程序翻译,如有差异,请以英文原文为准。

Design and modeling of resonant tunneling transport-controlled voltage-induced double quantum dot channel nanowire field-effect-transistor (DQD-FET) for multi-threshold current levels

Design and modeling of resonant tunneling transport-controlled voltage-induced double quantum dot channel nanowire field-effect-transistor (DQD-FET) for multi-threshold current levels
The article deals with the modeling of gate voltage controlled resonant tunneling transport in a complementary-metal–oxide–semiconductor (CMOS) compatible double quantum dot channel nanowire field-effect-transistor (FET). Appropriate applied voltages at two separate gates, gate-1 and gate-2 of the device form two voltage-tunable quantum dots underneath the gates, within the nanowire channel. The quantum dot eigenstates are tuned by varying the applied gate voltages to enable voltage-modulated resonant tunneling transport. Such transport is modeled by employing a Schrödinger-Poisson self-consistent framework using non-equilibrium Green’s function (NEGF) formalism. Electron–phonon scattering within the nanowire channel is also considered. The transfer characteristics exhibit multiple current thresholds in the range of 10−4 μA/μm–1 μA/μm due to resonant tunneling. The phonon scattering is observed to significantly depend on nanowire geometry and applied gate voltages, with tunneling dominated quasi-ballistic transport occurring at higher gate voltages. Also, steep sub-threshold slopes of 30 mV/decade–8 mV/decade range and transconductance in the range of 10−7 μS/μm–1 μS/μm at room temperature are obtained by varying the nanowire diameter in the range of 20 nm–5 nm. Therefore, such device architecture exhibits significant potential for achieving multi-current thresholds in a CMOS compatible architecture at room temperature.
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来源期刊
Solid-state Electronics
Solid-state Electronics 物理-工程:电子与电气
CiteScore
3.00
自引率
5.90%
发文量
212
审稿时长
3 months
期刊介绍: It is the aim of this journal to bring together in one publication outstanding papers reporting new and original work in the following areas: (1) applications of solid-state physics and technology to electronics and optoelectronics, including theory and device design; (2) optical, electrical, morphological characterization techniques and parameter extraction of devices; (3) fabrication of semiconductor devices, and also device-related materials growth, measurement and evaluation; (4) the physics and modeling of submicron and nanoscale microelectronic and optoelectronic devices, including processing, measurement, and performance evaluation; (5) applications of numerical methods to the modeling and simulation of solid-state devices and processes; and (6) nanoscale electronic and optoelectronic devices, photovoltaics, sensors, and MEMS based on semiconductor and alternative electronic materials; (7) synthesis and electrooptical properties of materials for novel devices.
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