A planar core-shell junctionless transistor compatible with FD-SOI Technology

IF 1.4 4区物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Solid-state Electronics Pub Date : 2025-01-30 DOI:10.1016/j.sse.2025.109079

Yu Yan , Weijia Song , Cunhua Dou , Xing Zhao , Shujian Xue , Yong Xu , Binhong Li , Yun Wang , Tianchun Ye , Sorin Cristoloveanu

引用次数: 0

Abstract

A planar version of Core-Shell Junctionless transistor (CS-JL FET), fully compatible with standard FDSOI process, is proposed and documented. An undoped region (shell) is added on top of a heavily doped core that bridges the source and drain terminals. While the fundamental advantages of junctionless (JL) MOSFET are maintained, its demerits are eliminated. The CS-JL FET features normally-off operation, high current drive and excellent mobility. The impact of layer thickness, core doping, back bias and gate length are discussed.

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来源期刊

Solid-state Electronics 物理-工程：电子与电气

CiteScore

3.00

自引率

5.90%

发文量

212

审稿时长

3 months

期刊介绍： It is the aim of this journal to bring together in one publication outstanding papers reporting new and original work in the following areas: (1) applications of solid-state physics and technology to electronics and optoelectronics, including theory and device design; (2) optical, electrical, morphological characterization techniques and parameter extraction of devices; (3) fabrication of semiconductor devices, and also device-related materials growth, measurement and evaluation; (4) the physics and modeling of submicron and nanoscale microelectronic and optoelectronic devices, including processing, measurement, and performance evaluation; (5) applications of numerical methods to the modeling and simulation of solid-state devices and processes; and (6) nanoscale electronic and optoelectronic devices, photovoltaics, sensors, and MEMS based on semiconductor and alternative electronic materials; (7) synthesis and electrooptical properties of materials for novel devices.