Comprehensive analysis of MOSFET threshold voltage extraction method considering DIBL effect from 300 K down to 10 K

IF 1.4 4区物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Solid-state Electronics Pub Date : 2025-02-01 DOI:10.1016/j.sse.2024.109045

Zhizhao Ma , Hao Su , Yuhuan Lin , Shenghua Zhou , Feichi Zhou , Xiaoguang Liu , Longyang Lin , Yida Li , Kai Chen

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引用次数: 0

Abstract

It is well known that different threshold voltage (V_th) extraction methods exhibit inconsistencies with respect to different drain voltage (V_d). This inconsistency becomes disruptive when temperature is considered for cryogenic applications such as quantum computing. This investigation examines various V_th extraction methods from room down to cryogenic temperatures, with a particular emphasis on how different V_d values combined with extraction methods behave as temperature decreases. For the first time, we find that the square root I_d method maintains consistency regardless of V_d, from 300 K all the way down to 10 K is identified. This provides a good insight into how the Drain-Induced Barrier Lowering (DIBL) effect changes with temperature, and positions the square root I_d method as a reliable tool for V_th extraction in cryogenic temperature.

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综合分析考虑DIBL效应的MOSFET阈值电压提取方法，从300 K降至10 K

众所周知，不同的阈值电压（Vth）提取方法对于不同的漏极电压（Vd）表现出不一致性。当考虑低温应用（如量子计算）的温度时，这种不一致性就变得具有破坏性。本研究考察了从室温到低温的各种Vth提取方法，特别强调了不同Vd值结合提取方法在温度降低时的表现。我们第一次发现，无论Vd如何，平方根Id方法都保持一致性，从300 K一直到10 K都是确定的。这为漏极诱导势阱降低（DIBL）效应如何随温度变化提供了很好的见解，并将平方根Id方法定位为低温条件下Vth提取的可靠工具。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Solid-state Electronics 物理-工程：电子与电气

CiteScore

3.00

自引率

5.90%

发文量

212

审稿时长

3 months

期刊介绍： It is the aim of this journal to bring together in one publication outstanding papers reporting new and original work in the following areas: (1) applications of solid-state physics and technology to electronics and optoelectronics, including theory and device design; (2) optical, electrical, morphological characterization techniques and parameter extraction of devices; (3) fabrication of semiconductor devices, and also device-related materials growth, measurement and evaluation; (4) the physics and modeling of submicron and nanoscale microelectronic and optoelectronic devices, including processing, measurement, and performance evaluation; (5) applications of numerical methods to the modeling and simulation of solid-state devices and processes; and (6) nanoscale electronic and optoelectronic devices, photovoltaics, sensors, and MEMS based on semiconductor and alternative electronic materials; (7) synthesis and electrooptical properties of materials for novel devices.