Zhizhao Ma , Hao Su , Yuhuan Lin , Shenghua Zhou , Feichi Zhou , Xiaoguang Liu , Longyang Lin , Yida Li , Kai Chen
{"title":"Comprehensive analysis of MOSFET threshold voltage extraction method considering DIBL effect from 300 K down to 10 K","authors":"Zhizhao Ma , Hao Su , Yuhuan Lin , Shenghua Zhou , Feichi Zhou , Xiaoguang Liu , Longyang Lin , Yida Li , Kai Chen","doi":"10.1016/j.sse.2024.109045","DOIUrl":null,"url":null,"abstract":"<div><div>It is well known that different threshold voltage <em>(V<sub>th</sub>)</em> extraction methods exhibit inconsistencies with respect to different drain voltage (<em>V<sub>d</sub></em>). This inconsistency becomes disruptive when temperature is considered for cryogenic applications such as quantum computing. This investigation examines various <em>V<sub>th</sub></em> extraction methods from room down to cryogenic temperatures, with a particular emphasis on how different <em>V<sub>d</sub></em> values combined with extraction methods behave as temperature decreases. For the first time, we find that the square root <em>I<sub>d</sub></em> method maintains consistency regardless of <em>V<sub>d</sub></em>, from 300 K all the way down to 10 K is identified. This provides a good insight into how the Drain-Induced Barrier Lowering (DIBL) effect changes with temperature, and positions the square root <em>I<sub>d</sub></em> method as a reliable tool for <em>V<sub>th</sub></em> extraction in cryogenic temperature.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"224 ","pages":"Article 109045"},"PeriodicalIF":1.4000,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Solid-state Electronics","FirstCategoryId":"101","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0038110124001941","RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
It is well known that different threshold voltage (Vth) extraction methods exhibit inconsistencies with respect to different drain voltage (Vd). This inconsistency becomes disruptive when temperature is considered for cryogenic applications such as quantum computing. This investigation examines various Vth extraction methods from room down to cryogenic temperatures, with a particular emphasis on how different Vd values combined with extraction methods behave as temperature decreases. For the first time, we find that the square root Id method maintains consistency regardless of Vd, from 300 K all the way down to 10 K is identified. This provides a good insight into how the Drain-Induced Barrier Lowering (DIBL) effect changes with temperature, and positions the square root Id method as a reliable tool for Vth extraction in cryogenic temperature.
期刊介绍:
It is the aim of this journal to bring together in one publication outstanding papers reporting new and original work in the following areas: (1) applications of solid-state physics and technology to electronics and optoelectronics, including theory and device design; (2) optical, electrical, morphological characterization techniques and parameter extraction of devices; (3) fabrication of semiconductor devices, and also device-related materials growth, measurement and evaluation; (4) the physics and modeling of submicron and nanoscale microelectronic and optoelectronic devices, including processing, measurement, and performance evaluation; (5) applications of numerical methods to the modeling and simulation of solid-state devices and processes; and (6) nanoscale electronic and optoelectronic devices, photovoltaics, sensors, and MEMS based on semiconductor and alternative electronic materials; (7) synthesis and electrooptical properties of materials for novel devices.