Simulation and experimental Demonstration on A retrograde drift LDMOS

IF 1.4 4区物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Solid-state Electronics Pub Date : 2025-02-01 DOI:10.1016/j.sse.2024.109050

Shaoxin Yu , Rongsheng Chen , Weiheng Shao , Xiaoyan Zhao , Zheng Chen , Weizhong Shan , Jenhao Cheng

{"title":"Simulation and experimental Demonstration on A retrograde drift LDMOS","authors":"Shaoxin Yu , Rongsheng Chen , Weiheng Shao , Xiaoyan Zhao , Zheng Chen , Weizhong Shan , Jenhao Cheng","doi":"10.1016/j.sse.2024.109050","DOIUrl":null,"url":null,"abstract":"<div><div>In this article, an RD (Retrograde drift) LDMOS (Lateral double diffused metal oxide semiconductor) device is introduced. The drift region in this proposed device is trapezoidal in shape and gradually decreases from top to bottom in doping concentration, called “retrograde drift.” Simulations indicate that this RD device has an 11.7% lower electric field peak value, 6.2% lower potential under the poly gate, 32.1% higher current width in the drift region, and 10.5% lower impact gen rate at the corner of FP (Field plate) as well. A series of devices have been fabricated using a photoresist treatment process. Compared with the conventional BD (box-shape drift) device, the RD device’s <span><math><mrow><mi>BV</mi></mrow></math></span>(Breakdown voltage)-<span><math><msub><mi>R</mi><mrow><mi>on</mi><mo>,</mo><mi>s</mi><mi>p</mi></mrow></msub></math></span> (on-resistance) FOM (Figure of merit) performance is improved by 30.9%, and the <span><math><msub><mi>Q</mi><mrow><mi>gd</mi></mrow></msub></math></span>(Gate-drain charge)-<span><math><msub><mi>R</mi><mrow><mi>on</mi><mo>,</mo><mi>s</mi><mi>p</mi></mrow></msub></math></span> FOM character is improved by 42.1%. Moreover, the RD device owns better HCI (Hot carrier injection) performance on both <span><math><msub><mi>R</mi><mrow><mi>on</mi><mo>,</mo><mi>s</mi><mi>p</mi></mrow></msub></math></span> degradation and <span><math><msub><mi>V</mi><mi>T</mi></msub></math></span> (Threshold voltage) degradation.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"224 ","pages":"Article 109050"},"PeriodicalIF":1.4000,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Solid-state Electronics","FirstCategoryId":"101","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0038110124001990","RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}

引用次数: 0

Abstract

In this article, an RD (Retrograde drift) LDMOS (Lateral double diffused metal oxide semiconductor) device is introduced. The drift region in this proposed device is trapezoidal in shape and gradually decreases from top to bottom in doping concentration, called “retrograde drift.” Simulations indicate that this RD device has an 11.7% lower electric field peak value, 6.2% lower potential under the poly gate, 32.1% higher current width in the drift region, and 10.5% lower impact gen rate at the corner of FP (Field plate) as well. A series of devices have been fabricated using a photoresist treatment process. Compared with the conventional BD (box-shape drift) device, the RD device’s

BV

(Breakdown voltage)-

R_{on, s p}

(on-resistance) FOM (Figure of merit) performance is improved by 30.9%, and the

Q_{gd}

(Gate-drain charge)-

R_{on, s p}

FOM character is improved by 42.1%. Moreover, the RD device owns better HCI (Hot carrier injection) performance on both

R_{on, s p}

degradation and

V_{T}

(Threshold voltage) degradation.

查看原文本刊更多论文

求助全文

约1分钟内获得全文求助全文

来源期刊

Solid-state Electronics 物理-工程：电子与电气

CiteScore

3.00

自引率

5.90%

发文量

212

审稿时长

3 months

期刊介绍： It is the aim of this journal to bring together in one publication outstanding papers reporting new and original work in the following areas: (1) applications of solid-state physics and technology to electronics and optoelectronics, including theory and device design; (2) optical, electrical, morphological characterization techniques and parameter extraction of devices; (3) fabrication of semiconductor devices, and also device-related materials growth, measurement and evaluation; (4) the physics and modeling of submicron and nanoscale microelectronic and optoelectronic devices, including processing, measurement, and performance evaluation; (5) applications of numerical methods to the modeling and simulation of solid-state devices and processes; and (6) nanoscale electronic and optoelectronic devices, photovoltaics, sensors, and MEMS based on semiconductor and alternative electronic materials; (7) synthesis and electrooptical properties of materials for novel devices.