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Smart-CX – Method of extraction of parasitic capacitances in ICs Smart-CX - 集成电路寄生电容提取方法
IF 1.4 4区 物理与天体物理
Solid-state Electronics Pub Date : 2024-09-26 DOI: 10.1016/j.sse.2024.109007
O.M. Grudanov , M.B. Grudanov
{"title":"Smart-CX – Method of extraction of parasitic capacitances in ICs","authors":"O.M. Grudanov ,&nbsp;M.B. Grudanov","doi":"10.1016/j.sse.2024.109007","DOIUrl":"10.1016/j.sse.2024.109007","url":null,"abstract":"<div><div>This paper proposes a novel rule-based parasitic capacitance extraction methodology, integrated into Smart-CX, to enhance the accuracy of SPICE simulations and physical verification of ICs. This methodology is crucial during the microchip design phase, particularly in preparation for fabrication on mature to advanced process nodes. The proposed enhanced analytical method addresses the accuracy/time tradeoffs between numerical and analytical extraction techniques. This study validates the accuracy of the methodology by comparison of the extracted parasitic parameters with foundry-provided 2D-models. The parasitic capacitances that are extracted within this method include: area capacitances <span><math><mrow><mo>(</mo><mi>C</mi><mi>a</mi><mo>)</mo></mrow></math></span>, coupling capacitances (<span><math><mrow><mi>C</mi><mi>c</mi><mo>)</mo></mrow></math></span>, including via-to-via capacitances <span><math><mrow><mo>(</mo><mi>C</mi><mi>m</mi><mi>v</mi><mo>)</mo></mrow></math></span>, contact-to-gate capacitances <span><math><mrow><mo>(</mo><mi>C</mi><mi>m</mi><mi>g</mi><mo>)</mo></mrow></math></span>, contact-to-active capacitances <strong>(</strong><span><math><mrow><mi>C</mi><mi>m</mi><mi>c</mi><mo>)</mo></mrow></math></span> and fringe type capacitances with the top <span><math><mrow><mo>(</mo><mi>C</mi><mi>f</mi><mi>t</mi><mo>)</mo></mrow></math></span> and bottom <span><math><mrow><mo>(</mo><mi>C</mi><mi>f</mi><mi>b</mi><mo>)</mo></mrow></math></span> conductive layers.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"221 ","pages":"Article 109007"},"PeriodicalIF":1.4,"publicationDate":"2024-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142437856","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Enhanced response and recovery performance of α-hexathiophene sensors for NO2 gas by dual heterogeneous interface 通过双异质界面提高α-六硫酚传感器对二氧化氮气体的响应和回收性能
IF 1.4 4区 物理与天体物理
Solid-state Electronics Pub Date : 2024-09-19 DOI: 10.1016/j.sse.2024.109006
Kaicaiayi Kelimu, Yiqun Zhang, Yangyang Zhu, Heping Su, Xi Lu, Li Juan Wang
{"title":"Enhanced response and recovery performance of α-hexathiophene sensors for NO2 gas by dual heterogeneous interface","authors":"Kaicaiayi Kelimu,&nbsp;Yiqun Zhang,&nbsp;Yangyang Zhu,&nbsp;Heping Su,&nbsp;Xi Lu,&nbsp;Li Juan Wang","doi":"10.1016/j.sse.2024.109006","DOIUrl":"10.1016/j.sse.2024.109006","url":null,"abstract":"<div><div>Organic semiconductor gas sensors of α-hexathiophene (α-6 T) films as active layers with dual heterogeneous interface layers of <em>p</em>-hexabiphenyl and pentacene films are prepared by continuous vacuum evaporation method. The enhanced properties of sensors are achieved by modulating the thickness of the α-6 T films. The sensitivity of 1373 %/ ppm and a theoretical low detection limit of 361 ppb are obtained. The sensors demonstrate fast response and recovery properties of 1.05 and 1.51 min for NO<sub>2</sub> gas of 20 ppm. The improved performance is attributed to the continuity of the interface layers and high adsorption of island-like growth. This approach is effective to improve organic sensors by introducing dual heterogeneous interface and tuning the growth of active layers.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"221 ","pages":"Article 109006"},"PeriodicalIF":1.4,"publicationDate":"2024-09-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142328352","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Carrier modulation and effective passivation of tin oxide thin-film transistors by organic surface doping 通过有机表面掺杂实现氧化锡薄膜晶体管的载流子调制和有效钝化
IF 1.4 4区 物理与天体物理
Solid-state Electronics Pub Date : 2024-09-16 DOI: 10.1016/j.sse.2024.109005
Guoxiang Song , Xinan Zhang , Haoxuan Xu
{"title":"Carrier modulation and effective passivation of tin oxide thin-film transistors by organic surface doping","authors":"Guoxiang Song ,&nbsp;Xinan Zhang ,&nbsp;Haoxuan Xu","doi":"10.1016/j.sse.2024.109005","DOIUrl":"10.1016/j.sse.2024.109005","url":null,"abstract":"<div><p>Doping is a useful technique for metal oxide thin-film transistors (TFTs) to adjust the threshold voltage and charge carrier density. However, a notable drawback is the disruption of the microstructure caused by doping crystalline lattice, leading to a partial decrease in charge carrier mobility. In this work, we suggest a surface doping technique that modifies the carrier concentration and passivates the device surface while preserving the channel layer lattice structure through the use of organic dopant molecules. It is shown that tin oxide (SnO<sub>2</sub>) TFTs doped in this manner typically exhibit improved electrical characteristics, particularly greater mobility and a noticeably lower threshold voltage, without negatively affecting the devices on/off current ratio. Furthermore, compared to pristine devices, bias stress stability and long-term durability are also enhanced. These findings suggest that surface doping may find use in high-performance oxide semiconductor devices and circuits.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"221 ","pages":"Article 109005"},"PeriodicalIF":1.4,"publicationDate":"2024-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142239541","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Fine-tuning Cesium lead chloride perovskite field-effect transistors for sensing applications: Bridging numerical modeling and experimental validation 微调用于传感应用的氯化铯铅过氧化物场效应晶体管:连接数值建模与实验验证
IF 1.4 4区 物理与天体物理
Solid-state Electronics Pub Date : 2024-09-12 DOI: 10.1016/j.sse.2024.109004
Gehad Ali , Reem Mahmoud , Mohamed Wafeek , Moataz M.K. Yousef , Sameh O. Abdellatif
{"title":"Fine-tuning Cesium lead chloride perovskite field-effect transistors for sensing applications: Bridging numerical modeling and experimental validation","authors":"Gehad Ali ,&nbsp;Reem Mahmoud ,&nbsp;Mohamed Wafeek ,&nbsp;Moataz M.K. Yousef ,&nbsp;Sameh O. Abdellatif","doi":"10.1016/j.sse.2024.109004","DOIUrl":"10.1016/j.sse.2024.109004","url":null,"abstract":"<div><p>This study presents a comprehensive approach to fine-tuning Cesium Lead Chloride Perovskite Field-Effect Transistors (CsPbCl<sub>3</sub>-FETs) for sensing applications by bridging numerical modeling with experimental validation. By combining finite element methods in COMSOL Multiphysics for optimization, we tailored FET parameters such as oxide and perovskite thin film thickness. The fabricated FET, with a 200 nm semiconductor layer and 30 nm oxide thickness, was strategically chosen to operate in a non-depletion mode, maximizing mobility while minimizing power consumption. Experimental results closely aligned with numerical simulations, showcasing a threshold voltage of 0.50 V±0.07 V and an impressive on/off current ratio of 1.50 x 10<sup>4</sup> ± 0.3 x 10<sup>4</sup>. Notably, the perovskite FET exhibited remarkable carrier mobility in saturation mode, reaching 5.40 cm<sup>2</sup>/V-s ± 0.8 cm<sup>2</sup>/V-s, outperforming other attempts in the literature. This work underscores the potential of CsPbCl<sub>3</sub> FETs for high-performance sensing applications, offering insights into optimizing device parameters for enhanced functionality and efficiency.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"221 ","pages":"Article 109004"},"PeriodicalIF":1.4,"publicationDate":"2024-09-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142233637","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Improved Temperature-Scalable DC model for SiC power MOSFET including Quasi-Saturation effect 包含准饱和效应的改进型碳化硅功率 MOSFET 温度可变直流模型
IF 1.4 4区 物理与天体物理
Solid-state Electronics Pub Date : 2024-08-12 DOI: 10.1016/j.sse.2024.108993
Hicham Er-rafii, Abdelghafour Galadi
{"title":"Improved Temperature-Scalable DC model for SiC power MOSFET including Quasi-Saturation effect","authors":"Hicham Er-rafii,&nbsp;Abdelghafour Galadi","doi":"10.1016/j.sse.2024.108993","DOIUrl":"10.1016/j.sse.2024.108993","url":null,"abstract":"<div><p>In this paper, accurate temperature-dependent static model for Silicon-Carbide (SiC) power MOSFET is presented. The proposed model is formed by two equations relating to linear and saturation operating regions. In this model, new formalism of the saturation drain current is introduced to consider the peculiar features observed in the <em>I</em>-<em>V</em> static characteristics of the SiC power MOSFET: a) moderate inversion region, or region of low gate voltages and b) quasi-saturation region, region of high gate voltages at which the drain current becomes less sensitive to the increase of gate voltage. In addition, the model captures with high-precision the transition region between linear and saturation region, pinch-off region, noticed in the output characteristics of the SiC power MOSFETs. It will be shown that the model equations ensure continuity and smooth transition between all operating regions. Temperature scaling of the model is carried out by its temperature scaling parameters. The proposed compact model is simple and efficient using reduced number of technology independent parameters. Simple parameter extraction procedure is described that uses an optimizer algorithm based on good experimental initial guess. Excellent agreement is obtained by comparing model to TCAD simulation and device measurement.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"220 ","pages":"Article 108993"},"PeriodicalIF":1.4,"publicationDate":"2024-08-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141990468","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A novel method to determine bias-dependent source and drain parasitic series resistances in AlGaN/GaN high electron mobility transistors 确定氮化铝/氮化镓高电子迁移率晶体管中与偏置有关的源极和漏极寄生串联电阻的新方法
IF 1.4 4区 物理与天体物理
Solid-state Electronics Pub Date : 2024-08-02 DOI: 10.1016/j.sse.2024.108991
Guangyuan Jiang , Chen Fu , Yang Liu , Guang Yang , Peng Cui , Guangyuan Zhang , Yuanjie Lv , Zhaojun Lin
{"title":"A novel method to determine bias-dependent source and drain parasitic series resistances in AlGaN/GaN high electron mobility transistors","authors":"Guangyuan Jiang ,&nbsp;Chen Fu ,&nbsp;Yang Liu ,&nbsp;Guang Yang ,&nbsp;Peng Cui ,&nbsp;Guangyuan Zhang ,&nbsp;Yuanjie Lv ,&nbsp;Zhaojun Lin","doi":"10.1016/j.sse.2024.108991","DOIUrl":"10.1016/j.sse.2024.108991","url":null,"abstract":"<div><p>The AlGaN/GaN high electron mobility transistors (HEMTs) with T-gate that suitable for high frequency applications were fabricated. A novel method to extract the bias-dependent source and drain parasitic series resistances (R<sub>s</sub> and R<sub>d</sub>) of AlGaN/GaN HEMTs is proposed. By analyzing the distributed capacitance and current generator network in the velocity saturated regions of the AlGaN/GaN HEMTs, a new restriction relationship between small-signal equivalent circuit elements is found. The R<sub>s</sub> and R<sub>d</sub> can be determined under active bias through wideband S-parameter measurements, which can better reflect the physical mechanism of AlGaN/GaN HEMTs under normal operation. The S-parameters and extrinsic transconductance calculated based the small-signal equivalent circuit element values extracted by the method proposed in this paper are very consistent with the experimental values, which reflects the accuracy of this element extraction method. In this paper, the physical mechanism that causes R<sub>s</sub> and R<sub>d</sub> to vary with bias voltage is also studied. This study has a deeper insight into the bias-dependence of R<sub>s</sub> and R<sub>d</sub>, which modifies the understanding for physical mechanisms of AlGaN/GaN HEMTs. The research results provide new ideas for establishing small-signal equivalent circuit models containing more physical effects and is of great significance to GaN-based integrated circuit design.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"220 ","pages":"Article 108991"},"PeriodicalIF":1.4,"publicationDate":"2024-08-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141953968","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
The study on influence factors of contact properties of metal-MoS2 interfaces 金属-MoS2界面接触性能影响因素研究
IF 1.4 4区 物理与天体物理
Solid-state Electronics Pub Date : 2024-07-30 DOI: 10.1016/j.sse.2024.108992
Jiawei Li, Jiale Sun, Hongliang Lu, Yuming Zhang, Yuche Pan
{"title":"The study on influence factors of contact properties of metal-MoS2 interfaces","authors":"Jiawei Li,&nbsp;Jiale Sun,&nbsp;Hongliang Lu,&nbsp;Yuming Zhang,&nbsp;Yuche Pan","doi":"10.1016/j.sse.2024.108992","DOIUrl":"10.1016/j.sse.2024.108992","url":null,"abstract":"<div><p>The metal and two-dimension (2D) semiconductor contact interfaces have a more considerable contact resistance hindering carrier injection, which makes the performance of 2D semiconductor devices less than the theory. The contact properties of Ni, Au, and Mo with MoS<sub>2</sub> are simulated by the first-principles method. The interface dipole caused by the interface charge redistribution changes the work function difference at the metal-MoS<sub>2</sub> interface, so the interface charge redistribution is one of the important factors for correctly evaluating the contact properties. Due to the metal-induced gap states (MIGS) at metal-monolayer (ML) MoS<sub>2</sub> interfaces, the Fermi level is strongly pinned to fixed energy, and the Schottky barrier height (SBH) cannot be regulated efficiently by the metal work function. Although the work function of Au is bigger than Ni, the Fermi level of Au is pinned at a higher position. In the meantime, the bandgap of MoS<sub>2</sub> narrows and metallization occurs due to the larger MIGS. In the Mo-MoS<sub>2</sub> interface, the Fermi level is pinned near the conduction band minimum of MoS<sub>2</sub>. The contact resistances (R<sub>c</sub>) of the three structures are tested by the Circular Transfer Length Method (CTLM), which is consistent with the prediction of the simulation. The Mo-MoS<sub>2</sub> has the smallest R<sub>c</sub>. The results indicate that contact resistance of 2D semiconductors cannot be simply predicted by soled work functions or Fermi level pinning, but is determined by several factors.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"220 ","pages":"Article 108992"},"PeriodicalIF":1.4,"publicationDate":"2024-07-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141961008","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
ANN-based framework for modeling process induced variation using BSIM-CMG unified model 利用 BSIM-CMG 统一模型,建立基于 ANN 的流程诱导变异建模框架
IF 1.4 4区 物理与天体物理
Solid-state Electronics Pub Date : 2024-07-22 DOI: 10.1016/j.sse.2024.108988
Anant Singhal , Yogendra Machhiwar , Shashank Kumar , Girish Pahwa , Harshit Agarwal
{"title":"ANN-based framework for modeling process induced variation using BSIM-CMG unified model","authors":"Anant Singhal ,&nbsp;Yogendra Machhiwar ,&nbsp;Shashank Kumar ,&nbsp;Girish Pahwa ,&nbsp;Harshit Agarwal","doi":"10.1016/j.sse.2024.108988","DOIUrl":"10.1016/j.sse.2024.108988","url":null,"abstract":"<div><p>In this work, we present a machine-learning augmented compact modeling framework for modeling process induced variations in advanced semiconductor devices. The framework employs BSIM-CMG unified compact model at the core and can be used for any advanced devices like GAA nanosheets and nanowires, FinFETs etc. We have validated the model with extensive numerical simulations and experimental data such as <span><math><mrow><mn>14</mn><mspace></mspace><mi>nm</mi></mrow></math></span> technology FinFET and <span><math><mrow><mn>24</mn><mspace></mspace><mi>nm</mi></mrow></math></span> technology Nanowire. Our results show excellent accuracy in modeling variability in key electrical parameters of the device including off-current (<em>I</em><sub>off</sub>), on-current (<em>I</em><sub>on</sub>), threshold voltage (<em>V</em><sub>th</sub>), subthreshold swing (<em>SS</em>) etc. We observe that the overall accuracy of the ML-based framework strongly depends on the nature and physical behavior of the core model used for modeling the nominal device.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"220 ","pages":"Article 108988"},"PeriodicalIF":1.4,"publicationDate":"2024-07-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141853216","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A versatile compact model of resistive random-access memory (RRAM) 电阻式随机存取存储器(RRAM)的多功能紧凑型模型
IF 1.4 4区 物理与天体物理
Solid-state Electronics Pub Date : 2024-07-15 DOI: 10.1016/j.sse.2024.108989
Chien-Ting Tung, Chetan Kumar Dabhi, Sayeef Salahuddin, Chenming Hu
{"title":"A versatile compact model of resistive random-access memory (RRAM)","authors":"Chien-Ting Tung,&nbsp;Chetan Kumar Dabhi,&nbsp;Sayeef Salahuddin,&nbsp;Chenming Hu","doi":"10.1016/j.sse.2024.108989","DOIUrl":"10.1016/j.sse.2024.108989","url":null,"abstract":"<div><p>We present a versatile compact model for resistive random-access memory (RRAM) that can model different types of RRAM devices such as oxide-RRAM (OxRAM) and conducting-bridge-RRAM (CBRAM). The model unifies the switching mechanisms of these RRAMs into a single framework. We showcase the model’s accuracy in reproducing published experimental device DC and transient characteristics of various RRAM structures. We also demonstrate the model’s efficacy in capturing RRAM variability and conducting 1T1R circuit simulations.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"220 ","pages":"Article 108989"},"PeriodicalIF":1.4,"publicationDate":"2024-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141700286","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Improvement of electrical performance in Normally-Off GaN MOSFET with regrown AlGaN layer on the Source/Drain region 利用源极/漏极区的再生氮化铝层改善常关断氮化镓 MOSFET 的电气性能
IF 1.4 4区 物理与天体物理
Solid-state Electronics Pub Date : 2024-07-14 DOI: 10.1016/j.sse.2024.108987
Seung Heon Shin , Do-Kywn Kim , Sung-bum Bae , Hyung-Seok Lee , Jung-Hee Lee , Dong-Seok Kim
{"title":"Improvement of electrical performance in Normally-Off GaN MOSFET with regrown AlGaN layer on the Source/Drain region","authors":"Seung Heon Shin ,&nbsp;Do-Kywn Kim ,&nbsp;Sung-bum Bae ,&nbsp;Hyung-Seok Lee ,&nbsp;Jung-Hee Lee ,&nbsp;Dong-Seok Kim","doi":"10.1016/j.sse.2024.108987","DOIUrl":"10.1016/j.sse.2024.108987","url":null,"abstract":"<div><p>A normally-off GaN MOSFET is successfully fabricated by using the selective regrowth technique (SRT) with regrown AlGaN layer on source/drain (S/D) region. The GaN MOSFET with regrown AlGaN layer and L<sub>g</sub> of 10 μm shows enhanced electrical performance such as maximum drain current (I<sub>D,max</sub>) of 57 mA/mm, maximum transconductance (g<sub>m,max</sub>) of 11 mS/mm, and field-effect mobility (μ<sub>FE</sub>) of 59 cm<sup>2</sup>/V·s, respectively, compared to the GaN MOSFET with n<sup>+</sup>-GaN selective regrowth in S/D region. This is because of the high 2DEG density formed by AlGaN/GaN heterojunction in S/D region. Moreover, to accommodate the poor structural quality of the narrow region regrowth of AlGaN layer on the S/D region, wide regrown AlGaN layer is applied to the GaN MOSFET. Especially, the off-state breakdown voltage improves from 25 V to 192 V with the improved structural quality of wide regrown AlGaN layer and optimized structure and the application of the 70-nm thick SiO<sub>2</sub> passivation. These result shows that GaN MOSFET with wide regrown AlGaN layer on S/D region is beneficial to achieving high-quality and uniform normally-off GaN MOSFETs with excellent electrical performance.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"220 ","pages":"Article 108987"},"PeriodicalIF":1.4,"publicationDate":"2024-07-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S0038110124001369/pdfft?md5=59e372a1b6529a8bc762128c67a00206&pid=1-s2.0-S0038110124001369-main.pdf","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141637705","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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