Preliminary numerical study on magnet gate in MOS FD-SOI technology for quantum and sensor applications

IF 1.4 4区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Philippe Galy , Franck Sabatier , Fabien Ndagijimana , Dominique Drouin
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引用次数: 0

Abstract

This preliminary study aims to explore the feasibility of a new metal-oxide-semiconductor (MOS) device, specifically in 28-nm fully-depleted silicon-on-insulator (FD-SOI) ultra-thin body buried (UTBB) technology, with a new dedicated gate stack of magnetic material, with and without TiN metal gate, along with an gate oxide. This study focuses on stacking a magnetic material in a MOS gate through 3D HFSS numerical simulations to evaluate the magnetic field gradient under and around the MOS dot device. Typically, the polycrystalline silicon gate is replaced by a magnetic material exhibiting metallic behaviour to enable conventional electrostatic MOS control with Vg gate bias. Designed to adhere to 28-nm specifications, potential candidates for process integration are Co or Ni magnetic materials. Other materials should be selected based on the magnetic specifications and metal work function. These configurations can be used in applications with an internal or external magnetic field environment, relevant to quantum or sensor applications. Finally, 3D magnetic simulations are carried out with the HFSS tool under static conditions with electric biases.
用于量子和传感器的MOS FD-SOI技术中磁栅的初步数值研究
本初步研究旨在探索一种新型金属氧化物半导体(MOS)器件的可行性,特别是在28纳米完全耗尽绝缘体上硅(FD-SOI)超薄体埋(UTBB)技术中,采用新的专用磁材料栅极堆栈,带或不带TiN金属栅极,以及栅极氧化物。本研究主要通过三维HFSS数值模拟,在MOS栅极中叠加磁性材料,以评估MOS点器件下和周围的磁场梯度。通常,多晶硅栅极被表现出金属行为的磁性材料取代,以实现具有Vg栅极偏置的传统静电MOS控制。设计坚持28纳米规格,潜在的候选工艺集成是Co或Ni磁性材料。其他材料应根据磁性规格和金属工作功能选择。这些配置可用于与量子或传感器应用相关的内部或外部磁场环境的应用。最后,利用HFSS工具在静态条件下进行了三维磁模拟。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
Solid-state Electronics
Solid-state Electronics 物理-工程:电子与电气
CiteScore
3.00
自引率
5.90%
发文量
212
审稿时长
3 months
期刊介绍: It is the aim of this journal to bring together in one publication outstanding papers reporting new and original work in the following areas: (1) applications of solid-state physics and technology to electronics and optoelectronics, including theory and device design; (2) optical, electrical, morphological characterization techniques and parameter extraction of devices; (3) fabrication of semiconductor devices, and also device-related materials growth, measurement and evaluation; (4) the physics and modeling of submicron and nanoscale microelectronic and optoelectronic devices, including processing, measurement, and performance evaluation; (5) applications of numerical methods to the modeling and simulation of solid-state devices and processes; and (6) nanoscale electronic and optoelectronic devices, photovoltaics, sensors, and MEMS based on semiconductor and alternative electronic materials; (7) synthesis and electrooptical properties of materials for novel devices.
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