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2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)最新文献

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A novel RRAM-based adaptive-threshold LIF neuron circuit for high recognition accuracy 一种基于随机存储器的自适应阈值LIF神经元电路，具有较高的识别精度
2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) Pub Date : 2018-04-01 DOI: 10.1109/VLSI-TSA.2018.8403854
Xinxin Wang, Peng Huang, Zhen Dong, Zheng Zhou, Yuning Jiang, Runze Han, Lifeng Liu, Xiaoyan Liu, Jinfeng Kang
{"title":"A novel RRAM-based adaptive-threshold LIF neuron circuit for high recognition accuracy","authors":"Xinxin Wang, Peng Huang, Zhen Dong, Zheng Zhou, Yuning Jiang, Runze Han, Lifeng Liu, Xiaoyan Liu, Jinfeng Kang","doi":"10.1109/VLSI-TSA.2018.8403854","DOIUrl":"https://doi.org/10.1109/VLSI-TSA.2018.8403854","url":null,"abstract":"A novel leaky integrate-and-fire (LIF) neuron circuit based on the gradual switching in resistive random access memory (RRAM) device is put forward, in which threshold modulation can be achieved. Its threshold modulation and spike generating functions are verified through HSPICE simulation. In unsupervised pattern recognition for handwritten digits in MNIST dataset, its advantage in improving the accuracy (from about 70% to more than 95%) is demonstrated. Benchmarking results indicate that this novel neuron is much faster and can save about 66% area compared to one previously proposed.","PeriodicalId":209993,"journal":{"name":"2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126955439","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
On the detection, characterization, and identification of single molecule with nanopores 纳米孔单分子的检测、表征和鉴定
2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) Pub Date : 2018-04-01 DOI: 10.1109/VLSI-TSA.2018.8403829
J. Kasianowicz, H. Wang, J. Ettedgui
{"title":"On the detection, characterization, and identification of single molecule with nanopores","authors":"J. Kasianowicz, H. Wang, J. Ettedgui","doi":"10.1109/VLSI-TSA.2018.8403829","DOIUrl":"https://doi.org/10.1109/VLSI-TSA.2018.8403829","url":null,"abstract":"Proteins that form nanometer-scale pores in cell membranes provide the molecular basis of action for nerve, muscle, and other tissues. For over the past 25 years, we have been developing them for the electronic detection, characterization, quantitation, and identification of single molecules[1]. We will discuss the potential use and limits of this method for practical applications, including DNA sequencing[2-4], sizing individual molecules[5-6], measuring the forces between single molecules[7], therapeutics development[8], and the identification of synthetic nanoparticles[9].","PeriodicalId":209993,"journal":{"name":"2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122771968","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Ta0x/Hf02-based RRAM with self-selective feature caused by current compliance modulation 基于Ta0x/ hf02的RRAM具有电流顺应调制引起的自选择特性
2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) Pub Date : 2018-04-01 DOI: 10.1109/VLSI-TSA.2018.8403839
Yue Xi, Huaqiang Wu, B. Gao, Xinyi Li, Wei Wu, Dong Wu, Ning Deng, H. Qian
{"title":"Ta0x/Hf02-based RRAM with self-selective feature caused by current compliance modulation","authors":"Yue Xi, Huaqiang Wu, B. Gao, Xinyi Li, Wei Wu, Dong Wu, Ning Deng, H. Qian","doi":"10.1109/VLSI-TSA.2018.8403839","DOIUrl":"https://doi.org/10.1109/VLSI-TSA.2018.8403839","url":null,"abstract":"In the present study, a Ta0x/Hf02-based resistive random access memory (RRAM) device was developed to generate self-selective feature. After appropriate current compliance in the set process, a threshold switching phenomenon was observed in the reset process. Satisfactory results were gained for the cycle-to-cycle and device- to-device uniform in the following measurements, which was of great significance to the reliability ofthe RRAM device and further exploration ofself-selective characteristic. On the basis ofprevious work and data fitting, the modelling ofthe self-selective I-V curves might be interface limited threshold switch (TS).","PeriodicalId":209993,"journal":{"name":"2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)","volume":"117 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133558535","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Temperature effect on operations and characteristics of p-channel FinFET dielectric RRAM 温度对p沟道FinFET介电RRAM工作特性的影响
2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) Pub Date : 2018-04-01 DOI: 10.1109/VLSI-TSA.2018.8403830
Jen Chieh Kuo, Y. King, C. Lin
{"title":"Temperature effect on operations and characteristics of p-channel FinFET dielectric RRAM","authors":"Jen Chieh Kuo, Y. King, C. Lin","doi":"10.1109/VLSI-TSA.2018.8403830","DOIUrl":"https://doi.org/10.1109/VLSI-TSA.2018.8403830","url":null,"abstract":"The p-channel based FinFET Dielectric RRAM (FIND RRAM) cell has been proposed for low-cost logic nonvolatile memory (NVM). This p-channel FIND RRAM cell exhibit similar set/reset behaviors as that have been reported on n- channel counterpart, including low set voltage, low reset current and a stable LRS/HRS window. A higher WL voltage can be applied on p-channel WL to facilitate a higher reset speed. In addition, temperature effect on forming, set and reset characteristics are studied in this work.","PeriodicalId":209993,"journal":{"name":"2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115874697","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Nonvolatile magneto-electric field effect transistors for spintronic memory and logic 用于自旋电子存储和逻辑的非易失性磁电场效应晶体管
2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) Pub Date : 2018-04-01 DOI: 10.1109/VLSI-TSA.2018.8403869
P. Dowben, C. Binek, D. Nikonov
{"title":"Nonvolatile magneto-electric field effect transistors for spintronic memory and logic","authors":"P. Dowben, C. Binek, D. Nikonov","doi":"10.1109/VLSI-TSA.2018.8403869","DOIUrl":"https://doi.org/10.1109/VLSI-TSA.2018.8403869","url":null,"abstract":"Here we describe the development of magneto-electric transistor devices to address the need for non-volatile, ultra-low power, ultra-fast, and scalable memory and logic.","PeriodicalId":209993,"journal":{"name":"2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123669927","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
RTN modulation by neighboring word-line Vt level in 1Xnm floating gate NAND strings 1Xnm浮栅NAND串中相邻字行Vt电平的RTN调制
2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) Pub Date : 2018-04-01 DOI: 10.1109/VLSI-TSA.2018.8403858
C.C. Cheng, Y.H. Chen, C. Wang, C. Cheng, C.W. Lee, T.W. Lin, S. Ku, Y.W. Chang, W. Tsai, T. Lu, K.C. Chen, Tahui Wang, Chih-Yuan Lu
{"title":"RTN modulation by neighboring word-line Vt level in 1Xnm floating gate NAND strings","authors":"C.C. Cheng, Y.H. Chen, C. Wang, C. Cheng, C.W. Lee, T.W. Lin, S. Ku, Y.W. Chang, W. Tsai, T. Lu, K.C. Chen, Tahui Wang, Chih-Yuan Lu","doi":"10.1109/VLSI-TSA.2018.8403858","DOIUrl":"https://doi.org/10.1109/VLSI-TSA.2018.8403858","url":null,"abstract":"Impact of threshold voltage (Vt) level from the cells at neighboring word-lines (WLs) on random telegraph noise (RTN) in floating-gate (FG) NAND flash memory is investigated. Due to aggressive pitch scaling, two-step programming is utilized to suppress the cell-to-cell interference and to achieve multi-level-cell (MLC) operation [1,2]. Such scheme could compromise the interference to get optimized Vt distributions at selected WL (sel-WL) even if the cells at the adjacent WLs reveal various Vt states. Once the neighboring WL keeps at low-Vt state, a compact RTN distribution is obtained. TCAD device simulation putting different stored charges to modulate the adjacent equivalent pass gate voltage (equi-Vpass), further confirms that RTN variation strongly correlates to the conduction current path beneath the sel-WLs. The reduction of RTN influence by increasing the equi-Vpass is then demonstrated. Finally, the optimal source/drain dosage range would be determined.","PeriodicalId":209993,"journal":{"name":"2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120896452","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Statistical analysis of CBRAM endurance CBRAM耐力的统计分析
2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) Pub Date : 2018-04-01 DOI: 10.1109/VLSI-TSA.2018.8403856
D. A. Robayo, C. Nail, G. Sassine, J. Nodin, M. Bernard, Q. Raffay, G. Ghibaudo, G. Molas, E. Nowak
{"title":"Statistical analysis of CBRAM endurance","authors":"D. A. Robayo, C. Nail, G. Sassine, J. Nodin, M. Bernard, Q. Raffay, G. Ghibaudo, G. Molas, E. Nowak","doi":"10.1109/VLSI-TSA.2018.8403856","DOIUrl":"https://doi.org/10.1109/VLSI-TSA.2018.8403856","url":null,"abstract":"In this paper, we address endurance reliability of resistive RAM at array level. To this aim, Al2O3 based Conductive Bridging RAM (CBRAM) kb arrays are studied. Maximum number of cycles the memory can sustain is statistically analyzed. Impact of SET and RESET conditions and Al2O3 thickness on endurance distributions is discussed. Finally, gradual endurance degradation mechanism is discussed along with defect generation in the resistive layer.","PeriodicalId":209993,"journal":{"name":"2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)","volume":"78 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134033227","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Impact of Ge oxidation states in GeOx interfacial layer on electrical characteristics of Ge pMOSFETs GeOx界面层中Ge氧化态对Ge pmosfet电学特性的影响
2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) Pub Date : 2018-04-01 DOI: 10.1109/VLSI-TSA.2018.8403823
S. Yi, K. Chang-Liao, Chia-Wei Hsu, Jiayi Huang, Tzung-Yu Wu
{"title":"Impact of Ge oxidation states in GeOx interfacial layer on electrical characteristics of Ge pMOSFETs","authors":"S. Yi, K. Chang-Liao, Chia-Wei Hsu, Jiayi Huang, Tzung-Yu Wu","doi":"10.1109/VLSI-TSA.2018.8403823","DOIUrl":"https://doi.org/10.1109/VLSI-TSA.2018.8403823","url":null,"abstract":"Effects of Ge oxidation states in GeO<inf>x</inf> interfacial layer (IL) on electrical characteristics of Ge pMOSFET with ~ 0.5 nm EOT are comprehensively studied. The gate leakage current density (J<inf>G</inf>) is impacted by contents of Ge<sup>+1</sup> and Ge<sup>+2</sup> in GeO<inf>x</inf> IL. The hole mobility is influenced by content of Ge<sup>+3</sup> in GeO<inf>x</inf> IL. The Ge oxidation states in IL play crucial roles on Ge pMOSFET.","PeriodicalId":209993,"journal":{"name":"2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)","volume":"190 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132231020","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Evaluation of circuit performance degradation due to CNT process imperfection 碳纳米管工艺缺陷导致电路性能下降的评估
2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) Pub Date : 2018-04-01 DOI: 10.1109/VLSI-TSA.2018.8403840
K. Sheikh, Lan Wei
{"title":"Evaluation of circuit performance degradation due to CNT process imperfection","authors":"K. Sheikh, Lan Wei","doi":"10.1109/VLSI-TSA.2018.8403840","DOIUrl":"https://doi.org/10.1109/VLSI-TSA.2018.8403840","url":null,"abstract":"As the Si scaling return rapidly diminishes, active research efforts on emerging materials and devices are made worldwide seeking post-Moore solutions [1,2]. While preliminary results show great potentials to improve circuit performance by adopting new materials including carbon nanotubes (CNTs)[3], one critical challenge that deserves more attention is that the material maturity and process quality of almost all these new materials are far from the state-of-the-art silicon technology. Without the tremendous efforts and investment to develop silicon technology in the past decades, these materials may never achieve the level of process quality in Si technology. Hence, a fair evaluation and projection of these new materials must take into consideration the material and process imperfection.","PeriodicalId":209993,"journal":{"name":"2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)","volume":"59 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114507955","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Prostate cancer biomarker detection by using Si nanowire based electrolyte/NiOx/SiO2/n-Si sensors 基于硅纳米线电解质/NiOx/SiO2/n-Si传感器的前列腺癌生物标志物检测
2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) Pub Date : 2018-04-01 DOI: 10.1109/VLSI-TSA.2018.8403861
Anisha Roy, J. Qiu, S. Maikap
{"title":"Prostate cancer biomarker detection by using Si nanowire based electrolyte/NiOx/SiO2/n-Si sensors","authors":"Anisha Roy, J. Qiu, S. Maikap","doi":"10.1109/VLSI-TSA.2018.8403861","DOIUrl":"https://doi.org/10.1109/VLSI-TSA.2018.8403861","url":null,"abstract":"Sarcosine as a prostate cancer biomarker has been detected by using Si naowire based electrolyte/NiO<inf>x</inf>/SiO<inf>2</inf>/n-Si sensor for the first time. A long nanowire (14 ^m) by chemically etched is observed by scanning electron microscope (SEM) images. A 2 nm-thick NiO<inf>x</inf> membrane on SiO<inf>2</inf>/n-Si structure shows low concentration of 1 pM H<inf>2</inf>O<inf>2</inf> sensing as well as sarcosine of 10 pM has been detected because Ni<sup>2</sup>+ oxidation state changes to Ni<sup>3</sup>+ state.","PeriodicalId":209993,"journal":{"name":"2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122690769","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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