RTN modulation by neighboring word-line Vt level in 1Xnm floating gate NAND strings

2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) Pub Date : 2018-04-01 DOI:10.1109/VLSI-TSA.2018.8403858

C.C. Cheng, Y.H. Chen, C. Wang, C. Cheng, C.W. Lee, T.W. Lin, S. Ku, Y.W. Chang, W. Tsai, T. Lu, K.C. Chen, Tahui Wang, Chih-Yuan Lu

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引用次数: 1

Abstract

Impact of threshold voltage (Vt) level from the cells at neighboring word-lines (WLs) on random telegraph noise (RTN) in floating-gate (FG) NAND flash memory is investigated. Due to aggressive pitch scaling, two-step programming is utilized to suppress the cell-to-cell interference and to achieve multi-level-cell (MLC) operation [1,2]. Such scheme could compromise the interference to get optimized Vt distributions at selected WL (sel-WL) even if the cells at the adjacent WLs reveal various Vt states. Once the neighboring WL keeps at low-Vt state, a compact RTN distribution is obtained. TCAD device simulation putting different stored charges to modulate the adjacent equivalent pass gate voltage (equi-Vpass), further confirms that RTN variation strongly correlates to the conduction current path beneath the sel-WLs. The reduction of RTN influence by increasing the equi-Vpass is then demonstrated. Finally, the optimal source/drain dosage range would be determined.

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1Xnm浮栅NAND串中相邻字行Vt电平的RTN调制

研究了浮动门NAND闪存中相邻字行单元的阈值电压电平对随机电报噪声的影响。由于具有侵略性的基音缩放，采用两步编程来抑制细胞间干扰并实现多级细胞(MLC)操作[1,2]。这种方案可以降低干扰，即使相邻WL的细胞显示不同的Vt状态，也可以在选定的WL (self -WL)上获得最佳的Vt分布。当相邻的WL保持在低vt状态时，得到一个紧凑的RTN分布。TCAD装置模拟了用不同的存储电荷来调制相邻的等效通栅极电压(equii - vpass)，进一步证实了RTN的变化与自wl下的传导电流路径密切相关。然后证明了通过增加等电压通来减少RTN的影响。最后确定最佳源漏剂量范围。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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2018 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)

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