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2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)最新文献

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Application of SLAT methodology in bond pad process evaluation for sidewall polymer removal SLAT方法在边壁聚合物去除粘结垫工艺评价中的应用
2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2016-07-18 DOI: 10.1109/IPFA.2016.7564311
Yanjing Yang, Xintong Zhu, R. R. Nistala, Suhas Vasant Shaha, Vincent Chai, S. Pani, Pandurangan Madhavan, Koesun Pak, S. Zhao, Jinsong Xu
{"title":"Application of SLAT methodology in bond pad process evaluation for sidewall polymer removal","authors":"Yanjing Yang, Xintong Zhu, R. R. Nistala, Suhas Vasant Shaha, Vincent Chai, S. Pani, Pandurangan Madhavan, Koesun Pak, S. Zhao, Jinsong Xu","doi":"10.1109/IPFA.2016.7564311","DOIUrl":"https://doi.org/10.1109/IPFA.2016.7564311","url":null,"abstract":"Bond pad sidewall polymer removal in a thick passivation device was attempted using different approaches, longer NE111 clean, 250°C bake and high temperature (HT) NE111 clean. SLAT methodology was adopted to evaluate the Al bond pad quality due to F-content on the bond pad surfaces during long term wafer storage. Both for 250°C bake and HT-NE111 no Fluorine-crystal defects were observed on bond pad surfaces with SLAT studies. However, Cu segregation was noticed, which can cause Al-Cu galvanic corrosion, for 250 °C baking process. But with HT NEU, bond pad sidewall polymers were completely removed and thus, mitigating the risk of F-crystal defect formation. Moreover, this approach was without any other type of defects. This is an alternative approach where EKC solvent is not available to manufacture bond pad surface with no sidewall polymers. Wafers, which were processed with HT NE111 clean, were stored up to 3 months and display no F-crystal on bond pad surfaces.","PeriodicalId":206237,"journal":{"name":"2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"626 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127527698","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Three-dimensional AES of segregated materials on a gold pad 金衬垫上分离材料的三维原子发射光谱
2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2016-07-18 DOI: 10.1109/IPFA.2016.7564292
T. Uchida, A. Tanaka, K. Tsutsumi, N. Ikeo
{"title":"Three-dimensional AES of segregated materials on a gold pad","authors":"T. Uchida, A. Tanaka, K. Tsutsumi, N. Ikeo","doi":"10.1109/IPFA.2016.7564292","DOIUrl":"https://doi.org/10.1109/IPFA.2016.7564292","url":null,"abstract":"Auger electron spectroscopy (AES) has been developed as a useful technique for chemical analysis of surface regions with high spatial and depth resolution. In this report, we present a newly developed system of AES which visualizes high-resolution distributions of the segregated materials on an Au pad by the 3-dimensional mapping.","PeriodicalId":206237,"journal":{"name":"2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133106203","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Nanoprobing on the SRAM static noise margin (SNM) soft fail analysis 纳米探针对SRAM静态噪声裕度(SNM)软失效分析
2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2016-07-18 DOI: 10.1109/IPFA.2016.7564248
C. Q. Chen, P. T. Ng, F. Rivai, Y. Ma, P. K. Tan, H. Tan, J. Lam, Z. Mai
{"title":"Nanoprobing on the SRAM static noise margin (SNM) soft fail analysis","authors":"C. Q. Chen, P. T. Ng, F. Rivai, Y. Ma, P. K. Tan, H. Tan, J. Lam, Z. Mai","doi":"10.1109/IPFA.2016.7564248","DOIUrl":"https://doi.org/10.1109/IPFA.2016.7564248","url":null,"abstract":"As the semiconductor technology continues to scale, the stability and performance of embedded SRAM are growing concerns during the design and analysis stages. Maintaining an acceptable Static Noise Margin (SNM) in the embedded SRAM while scaling the minimum feature size and supply voltage of the integrated circuit (IC) becomes increasingly challenging. As a result, the manufacturing process window continues to shrink. This increases the difficulty for the failure analysis as many soft failures are induced by the reducing process margin. In this paper, a case study on an advanced technology node embedded SRAM soft fail was analyzed. Nanoprobing was employed at the room temperature to do SNM analysis at Metal 1 on the suspected location. Abnormal SNM window was observed at the room temperature analysis. Further analysis at high temperature on the same bit confirmed the soft failure bit. This correlates to the testing failure mode result. This case study is a good example for others who encounter same kind of the embedded SRAM soft failure.","PeriodicalId":206237,"journal":{"name":"2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128469145","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Failure analysis of power integrated modules and its challenges 电源集成模块的失效分析及其挑战
2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2016-07-18 DOI: 10.1109/IPFA.2016.7564325
E. J. de La Cruz, N. Yusof, W. Y. Wong, N. I. Mohd Arifen
{"title":"Failure analysis of power integrated modules and its challenges","authors":"E. J. de La Cruz, N. Yusof, W. Y. Wong, N. I. Mohd Arifen","doi":"10.1109/IPFA.2016.7564325","DOIUrl":"https://doi.org/10.1109/IPFA.2016.7564325","url":null,"abstract":"Power Integrated Module (PIM) in a configurable package platform employs high-power direct-bonded-copper (DBC) substrate technology along with press-fit pins, thus, provides a high performance and reliable power module solution. The state of the art module platform however, presents a challenge to perform component-level failure analysis. The failure analysis techniques developed for multi-layered module packaging is presented in this paper.","PeriodicalId":206237,"journal":{"name":"2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126568745","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Failure defect modeling — An effective failure analysis simulation tool 失效缺陷建模——有效的失效分析仿真工具
2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2016-07-18 DOI: 10.1109/IPFA.2016.7564286
R. Mendaros, Arnulfo Evangelista, Jerome Paghasian
{"title":"Failure defect modeling — An effective failure analysis simulation tool","authors":"R. Mendaros, Arnulfo Evangelista, Jerome Paghasian","doi":"10.1109/IPFA.2016.7564286","DOIUrl":"https://doi.org/10.1109/IPFA.2016.7564286","url":null,"abstract":"Failure defect modeling (FDM), a software simulation technique, replicates the failure mode and characteristic of a defective integrated circuit thus narrows down the analysis area. The results of FDM guides the analyst in the selection of the suitable physical failure analysis technique and process steps to successfully uncover the defect.","PeriodicalId":206237,"journal":{"name":"2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123718209","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Localization techniques for finding embedded defects in stacked die package 叠片封装中嵌入缺陷的定位技术
2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2016-07-18 DOI: 10.1109/IPFA.2016.7564239
L. Yeoh, Kok-Cheng Chong, Susan X. Li
{"title":"Localization techniques for finding embedded defects in stacked die package","authors":"L. Yeoh, Kok-Cheng Chong, Susan X. Li","doi":"10.1109/IPFA.2016.7564239","DOIUrl":"https://doi.org/10.1109/IPFA.2016.7564239","url":null,"abstract":"Driven by the next generation of electronic devices that require progressive miniaturization, stacked die packages have been developed to provide greater functionality in smaller package footprints. This provides a substantial improvement in the electrical performance while enabling continuous extension of the Moore's Law. Nevertheless, high circuit density and high complexity of interconnections have posed a great challenge to failure analysis work. In this paper, the application of lock-in infrared thermography technique coupled with detailed physical deprocessing work in finding embedded defects in stacked memory die packages are broadly discussed.","PeriodicalId":206237,"journal":{"name":"2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"111 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121617871","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Strategies to determine failure mechanism of devices that recovered during analysis 确定在分析过程中恢复的设备故障机制的策略
2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2016-07-18 DOI: 10.1109/IPFA.2016.7564327
L. Tan, C. H. Liew, Akeel Nazakat, Jethro Tan, W. F. Kho
{"title":"Strategies to determine failure mechanism of devices that recovered during analysis","authors":"L. Tan, C. H. Liew, Akeel Nazakat, Jethro Tan, W. F. Kho","doi":"10.1109/IPFA.2016.7564327","DOIUrl":"https://doi.org/10.1109/IPFA.2016.7564327","url":null,"abstract":"Occurrences of failure recovery in the course of failure analysis work are not uncommon. Despite this, successful identification of the failure mechanism is still possible in some cases based on available data up to the point of failure recovery, circuit layout knowledge and a combination of a few conventional failure analysis techniques.","PeriodicalId":206237,"journal":{"name":"2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126326139","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Advanced coating techniques for photoresist TEM sample preparation 光刻胶TEM样品制备的先进涂层技术
2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2016-07-18 DOI: 10.1109/IPFA.2016.7564259
E. Sebastian, I. Tee, Y. Shen, Kok Wah Lee, L. Tam, Jie Zhu, S. Zhao
{"title":"Advanced coating techniques for photoresist TEM sample preparation","authors":"E. Sebastian, I. Tee, Y. Shen, Kok Wah Lee, L. Tam, Jie Zhu, S. Zhao","doi":"10.1109/IPFA.2016.7564259","DOIUrl":"https://doi.org/10.1109/IPFA.2016.7564259","url":null,"abstract":"Hard baked photoresist structures tend to deform under FIB-TEM sample preparation. This study shows how different coating methods during sample preparation will affect the photoresist profile under TEM. It turns out that PECVD oxide is the most outstanding coating method to maintain the photoresist profile with minimum deformation. Further PECVD parameter optimization is also demonstrated.","PeriodicalId":206237,"journal":{"name":"2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"122 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134603505","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Reliability and failure analysis of MEMS/NEMS switches MEMS/NEMS开关的可靠性与失效分析
2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2016-07-18 DOI: 10.1109/IPFA.2016.7564328
Chengkuo Lee
{"title":"Reliability and failure analysis of MEMS/NEMS switches","authors":"Chengkuo Lee","doi":"10.1109/IPFA.2016.7564328","DOIUrl":"https://doi.org/10.1109/IPFA.2016.7564328","url":null,"abstract":"Microelectromechnical system (MEMS) and nanoelectromechanical system (NEMS) devices have widely deployed in many places now. When they are used in harsh environment, reliability remains as a grand challenge because these devices are exposed to catastrophic level of pressure, temperature, radiation and so on, while there are free-standing structures and movable parts in MEMS and NEMS. In this invited talk, general reliability related concerns of MEMS and NEMS are discussed first. MEMS/NEMS switches are experimentally investigated in terms of reliability and failure analysis.","PeriodicalId":206237,"journal":{"name":"2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134565314","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
From IC debug to hardware security risk: The power of backside access and optical interaction 从IC调试到硬件安全风险:背面访问和光交互的力量
2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2016-07-18 DOI: 10.1109/IPFA.2016.7564318
C. Boit, Shahin Tajik, P. Scholz, E. Amini, A. Beyreuther, Heiko Lohrke, Jean-Pierre Seifert
{"title":"From IC debug to hardware security risk: The power of backside access and optical interaction","authors":"C. Boit, Shahin Tajik, P. Scholz, E. Amini, A. Beyreuther, Heiko Lohrke, Jean-Pierre Seifert","doi":"10.1109/IPFA.2016.7564318","DOIUrl":"https://doi.org/10.1109/IPFA.2016.7564318","url":null,"abstract":"IC debug and diagnosis techniques like photon emission and FIB circuit edit are well established as powerful ways to attack secret codes in security ICs through chip frontside. But protective additions like interconnect meshes serve as countermeasures. This work shows examples how the risk assessment of contactless fault isolation (CFI) techniques through chip backside has indicated a drastic increase of vulnerability. Acclaimed unclonable functions and keys have been successfully challenged. There is no low-cost electronic backside protection concept available like the frontside meshes, because alignment and contact of backside structures to active IC layers cannot be handled without expensive through-silicon-via (TSV) technologies. But optical interaction can also be used to create backside protection concepts: Such concepts based on electro-optical properties are presented and proven to be operational.","PeriodicalId":206237,"journal":{"name":"2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"265 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133698549","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 25
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