发布求助
文献互助 智能选刊 最新文献

2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)最新文献

筛选
英文 中文
VNA Based Measurements and Nonlinear Modeling for Efficient RF Circuit Design 基于VNA的测量和非线性建模的高效射频电路设计
2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2016-10-01 DOI: 10.1109/CSICS.2016.7751078
S. Dellier, A. Xiong, C. Charbonniaud, C. Mazière, C. Enguehard, T. Gasseling
{"title":"VNA Based Measurements and Nonlinear Modeling for Efficient RF Circuit Design","authors":"S. Dellier, A. Xiong, C. Charbonniaud, C. Mazière, C. Enguehard, T. Gasseling","doi":"10.1109/CSICS.2016.7751078","DOIUrl":"https://doi.org/10.1109/CSICS.2016.7751078","url":null,"abstract":"All the players in RF industry are looking to develop high efficiency circuits, and are willing to invest heavily to achieve this target. Increasing power efficiency enables decreasing power consumption, thus reducing the use of the resources provided from the battery, to reduce the size of cooling systems, improve reliability, and ultimately reduce the electricity bill. For advanced design of RF power amplifier circuits, this requires a detailed knowledge of the optimal matching conditions that can leverage the best performances. If the RF designer can use an accurate transistor model for the simulation with a proper design method, then the design target will be hit. If there is no model available, alternative methods must be found in order to retain the best RF design. In the later case, for die or packaged transistor, two approaches are proposed. Both tend to secure the design flow of high efficiency amplifier when a complete compact transistor nonlinear model is not available.","PeriodicalId":183218,"journal":{"name":"2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123005591","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A 250 nm GaN N-Path Filter IC with +27 dBm Blocker Tolerance 具有+27 dBm阻滞剂容限的250 nm GaN n路滤波器IC
2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2016-10-01 DOI: 10.1109/CSICS.2016.7751015
C. Thomas, T. Quach, I. Telliez, T. Nakatani, D. Kimball, L. Larson
{"title":"A 250 nm GaN N-Path Filter IC with +27 dBm Blocker Tolerance","authors":"C. Thomas, T. Quach, I. Telliez, T. Nakatani, D. Kimball, L. Larson","doi":"10.1109/CSICS.2016.7751015","DOIUrl":"https://doi.org/10.1109/CSICS.2016.7751015","url":null,"abstract":"A fully integrated 250 nm GaN bandpass N-path filter is presented for high blocker tolerance applications. Measurements from 200 MHz to 1.9 GHz of a 4-phase shunt architecture demonstrate a broadband tunable bandpass response with insertion loss less than 5 dB, out-of-band rejection of 18 dB, in-band blocker B1dB of +18 dBm, and out-of-band blocker B1dB of +27 dBm.","PeriodicalId":183218,"journal":{"name":"2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128780100","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Silicon Electronics-Photonics Integrated Circuits for Datacenters 用于数据中心的硅电子-光子集成电路
2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2016-10-01 DOI: 10.1109/CSICS.2016.7751066
S. Shekhar, L. Chrostowski, S. Mirabbasi, Spoorthi Nayak, M. W. AlTaha, Ahmed A. Naguib, A. Ramani, H. Jayatilleka
{"title":"Silicon Electronics-Photonics Integrated Circuits for Datacenters","authors":"S. Shekhar, L. Chrostowski, S. Mirabbasi, Spoorthi Nayak, M. W. AlTaha, Ahmed A. Naguib, A. Ramani, H. Jayatilleka","doi":"10.1109/CSICS.2016.7751066","DOIUrl":"https://doi.org/10.1109/CSICS.2016.7751066","url":null,"abstract":"This paper gives an overview of silicon-photonics devices and integrated circuits, drawing several analogies from electronics circuits. Methods to co-simulate the electronics and photonics components are presented. Finally, techniques to address the data rate demands in warehouse size datacenters are described including pulse amplitude modulation (PAM) and wavelength division multiplexing (WDM).","PeriodicalId":183218,"journal":{"name":"2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126430238","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Microwave Transistor Power Rectifiers and Applications 微波晶体管功率整流器及其应用
2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2016-10-01 DOI: 10.1109/CSICS.2016.7751055
Z. Popovic, I. Ramos, T. Reveyrand, M. Litchfield
{"title":"Microwave Transistor Power Rectifiers and Applications","authors":"Z. Popovic, I. Ramos, T. Reveyrand, M. Litchfield","doi":"10.1109/CSICS.2016.7751055","DOIUrl":"https://doi.org/10.1109/CSICS.2016.7751055","url":null,"abstract":"This paper presents design, analysis and experimental results on synchronous and self- synchronous microwave transistor rectifiers implemented with GaN HEMTs at frequencies from 2 to 10GHz. The rectifier/power amplifier duality is explained and measurements confirming this mode of operation are presented. Finally, rectifier applications in wireless power transfer and high- frequency integrated dc-dc converters are discussed, including a GaN MMIC dc-dc converter switching at 4.6GHz.","PeriodicalId":183218,"journal":{"name":"2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"865 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126943250","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
The Role of Measurement Uncertainty in Achieving First-Pass Design Success 测量不确定度在实现首过设计成功中的作用
2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2016-10-01 DOI: 10.1109/CSICS.2016.7751072
Dylan F. Williams, R. Chamberlin, Wei Zhao, J. Cheron, M. Urteaga
{"title":"The Role of Measurement Uncertainty in Achieving First-Pass Design Success","authors":"Dylan F. Williams, R. Chamberlin, Wei Zhao, J. Cheron, M. Urteaga","doi":"10.1109/CSICS.2016.7751072","DOIUrl":"https://doi.org/10.1109/CSICS.2016.7751072","url":null,"abstract":"We investigate the role of measurement uncertainty in achieving first-pass design success at microwave frequencies. We develop a model for state-of-the-art 250 nm heterojunction bipolar transistors, and demonstrate the propagation of correlated measurement uncertainties through the model-extraction and verification process. We then investigate the accuracy of the extracted model parameters and the role of measurement uncertainty in gauging the ability of the model to predict the behavior of the transistor in large-signal operating states.","PeriodicalId":183218,"journal":{"name":"2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122338311","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
SiGe Technology as a Millimeter-Wave Platform: Scaling Issues, Reliability Physics, Circuit Performance, and New Opportunities SiGe技术作为毫米波平台:缩放问题，可靠性物理，电路性能和新机遇
2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2016-10-01 DOI: 10.1109/CSICS.2016.7751065
J. Cressler, C. Coen, S. Zeinolabedinzadeh, P. Song, R. Schmid, Michael A. Oakley, P. Chakraborty
{"title":"SiGe Technology as a Millimeter-Wave Platform: Scaling Issues, Reliability Physics, Circuit Performance, and New Opportunities","authors":"J. Cressler, C. Coen, S. Zeinolabedinzadeh, P. Song, R. Schmid, Michael A. Oakley, P. Chakraborty","doi":"10.1109/CSICS.2016.7751065","DOIUrl":"https://doi.org/10.1109/CSICS.2016.7751065","url":null,"abstract":"This paper reviews recent work aimed at a comprehensive assessment of the potential of SiGe technology to support emerging millimeter-wave (mm-wave) and sub-mm-wave integrated circuit applications. Scaling limits, reliability constraints, and the limits of CMOS for mm-wave are addressed, followed by a diverse variety of mm-wave and sub-mm-wave SiGe circuits that are offered as examples of the many opportunities awaiting.","PeriodicalId":183218,"journal":{"name":"2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130645745","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Towards Next Generations of Silicon Photonics 迈向下一代硅光子学
2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2016-10-01 DOI: 10.1109/CSICS.2016.7751074
S. Crémer, C. Baudot, N. Vulliet, J. Durel, C. Durand, H. Petiton, E. Temporiti, F. Boeuf
{"title":"Towards Next Generations of Silicon Photonics","authors":"S. Crémer, C. Baudot, N. Vulliet, J. Durel, C. Durand, H. Petiton, E. Temporiti, F. Boeuf","doi":"10.1109/CSICS.2016.7751074","DOIUrl":"https://doi.org/10.1109/CSICS.2016.7751074","url":null,"abstract":"Process flow and device performances of an industrial 300mm Silicon Photonics platform demonstrating 25Gb/s per data lane when associated with 55nm BICMOS are presented. Advanced designs targeting 56Gb/s and using this platform are introduced. Device improvements suitable to convert such demonstrators into products are shown. Backside reflector, 40Ghz photodiode as well as WDM capability are presented as some potential process and device evolutions for future Silicon Photonics platforms. Finally laser integration challenges and opportunities are discussed.","PeriodicalId":183218,"journal":{"name":"2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"76 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132130437","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Prospects for Gallium Nitride-on-Diamond Transistors 金刚石上氮化镓晶体管的前景
2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2016-10-01 DOI: 10.1109/CSICS.2016.7751059
J. Blevins, G. Via
{"title":"Prospects for Gallium Nitride-on-Diamond Transistors","authors":"J. Blevins, G. Via","doi":"10.1109/CSICS.2016.7751059","DOIUrl":"https://doi.org/10.1109/CSICS.2016.7751059","url":null,"abstract":"Strategies aimed at improving the near junction heat removal of Gallium Nitride (GaN) High Electron Mobility Transistors (HEMTs) are presently limiting GaN device technology from realization of its true capability [1]. Approximately ten years ago, Cree demonstrated AlGaN/GaN HEMTs with power densities exceeding 40 W/mm [2]. Control of the GaN junction temperature requires integration of thermal transport solutions near the heat source to ensure optimal performance and reliable operation [3]. An approach under consideration is the use of Chemical Vapor Deposition (CVD) polycrystalline diamond inserted within microns of the device junction. Recent AFRL and Defense Advanced Research Projects Agency (DARPA) efforts have shown that replacing the epitaxial host substrate with high thermal conductivity polycrystalline diamond substrates can improve the GaN HEMT areal power density >3Xs [4-9]. This paper will examine the motivation behind the use of diamond, integration approaches, material/device results and key technological challenges going forward.","PeriodicalId":183218,"journal":{"name":"2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134270462","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A 20 Gbit/s RFDAC-Based Direct-Modulation W-Band Transmitter in 32nm SOI CMOS 基于32nm SOI CMOS的20gbit /s rfdac直接调制w波段发射机
2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2016-10-01 DOI: 10.1109/CSICS.2016.7751014
H. Al-Rubaye, Gabriel M. Rebeiz
{"title":"A 20 Gbit/s RFDAC-Based Direct-Modulation W-Band Transmitter in 32nm SOI CMOS","authors":"H. Al-Rubaye, Gabriel M. Rebeiz","doi":"10.1109/CSICS.2016.7751014","DOIUrl":"https://doi.org/10.1109/CSICS.2016.7751014","url":null,"abstract":"This paper presents a 94 GHz transmitter chipset in 32nm SOI CMOS. The transmitter employs two 2- bit high-speed RFDACs driven in quadrature, 20 dB gain LO drivers and 30 Gbps high-speed digital retimers and deserializers. The transmitter chip is capable of supporting BPSK/PAM4/QPSK modulation schemes, at a saturated output power Psat of +4 dBm. A maximum data rate of 20 Gbps was achieved when operating in QPSK mode, and 12 Gbps in BPSK and PAM4 modes. The chip occupies 1.4 × 0.8 mm2, and consumes 110 mW in BPSK/PAM4 modes and 220 mW in QPSK mode, resulting in a state-of-the-art 9 pJ/bit and 11 pJ/bit efficiency, respectively.","PeriodicalId":183218,"journal":{"name":"2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114548579","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
A High Efficiency High Power Density Harmonic-Tuned Ka Band Stacked-FET GaAs Power Amplifier 一种高效率高功率密度谐波调谐Ka波段叠置场效应晶体管GaAs功率放大器
2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2016-10-01 DOI: 10.1109/CSICS.2016.7751020
Duy P. Nguyen, T. Pham, B. Pham, A. Pham
{"title":"A High Efficiency High Power Density Harmonic-Tuned Ka Band Stacked-FET GaAs Power Amplifier","authors":"Duy P. Nguyen, T. Pham, B. Pham, A. Pham","doi":"10.1109/CSICS.2016.7751020","DOIUrl":"https://doi.org/10.1109/CSICS.2016.7751020","url":null,"abstract":"A stacked-FET power amplifier (PA) with harmonic- tuned output matching network is demonstrated using a 0.15-μm Gallium Arsenide (GaAs) technology. The fabricated PA exhibits 28.5 dBm output power, 12 dB gain and 38.4% power added efficiency (PAE). To the best of our knowledge, this is for the first time stacked-FET technique is used in combining with harmonic-tuned output network to achieve high PAE and high power density simultaneously in a GaAs PA.","PeriodicalId":183218,"journal":{"name":"2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122128506","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 15
首页 上一页 下一页 尾页
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整，为了账户安全，请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们：info@booksci.cn Book学术提供免费学术资源搜索服务，方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号：604180095
Book学术官方微信