A 20 Gbit/s RFDAC-Based Direct-Modulation W-Band Transmitter in 32nm SOI CMOS

H. Al-Rubaye, Gabriel M. Rebeiz
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引用次数: 7

Abstract

This paper presents a 94 GHz transmitter chipset in 32nm SOI CMOS. The transmitter employs two 2- bit high-speed RFDACs driven in quadrature, 20 dB gain LO drivers and 30 Gbps high-speed digital retimers and deserializers. The transmitter chip is capable of supporting BPSK/PAM4/QPSK modulation schemes, at a saturated output power Psat of +4 dBm. A maximum data rate of 20 Gbps was achieved when operating in QPSK mode, and 12 Gbps in BPSK and PAM4 modes. The chip occupies 1.4 × 0.8 mm2, and consumes 110 mW in BPSK/PAM4 modes and 220 mW in QPSK mode, resulting in a state-of-the-art 9 pJ/bit and 11 pJ/bit efficiency, respectively.
基于32nm SOI CMOS的20gbit /s rfdac直接调制w波段发射机
本文提出了一种采用32nm SOI CMOS结构的94ghz发射芯片。发射机采用两个2位高速正交rfdac驱动,20db增益LO驱动器和30gbps高速数字计时器和反序列化器。发射机芯片能够支持BPSK/PAM4/QPSK调制方案,饱和输出功率Psat为+4 dBm。QPSK模式下最大传输速率为20gbps, BPSK和PAM4模式下最大传输速率为12gbps。该芯片的尺寸为1.4 × 0.8 mm2,在BPSK/PAM4模式下功耗为110 mW,在QPSK模式下功耗为220 mW,效率分别为9 pJ/bit和11 pJ/bit。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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