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Integrated Dual-Channel X-Band Offset-Transmitter for Phase Steering and DDMA Arrays 用于相位控制和DDMA阵列的集成双通道x波段偏移发射机
2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2016-10-24 DOI: 10.1109/CSICS.2016.7751048
Johan C. J. G. Withagen, A. Annema, B. Nauta, F. V. van Vliet
{"title":"Integrated Dual-Channel X-Band Offset-Transmitter for Phase Steering and DDMA Arrays","authors":"Johan C. J. G. Withagen, A. Annema, B. Nauta, F. V. van Vliet","doi":"10.1109/CSICS.2016.7751048","DOIUrl":"https://doi.org/10.1109/CSICS.2016.7751048","url":null,"abstract":"Multiple-Input and Multiple-Output (MIMO) arrays provide more degrees of freedom than conventional phased arrays. They require that every transmitting element of the array can be identified when received. One way to achieve this is to give every element its own unique frequency. Offset-transmitters may be used to introduce MIMO or Doppler Division Multiple Access (DDMA) into phased-arrays without an excessive increase in waveform-generating hardware. Our dual-channel demonstrator IC can obtain a phase accuracy better than 1 degree and an spurious level of better than -65dBc for a single on-chip channel. This work investigates at X-band the effects of the limited on-chip isolation of 35dB, when multiple offset outputs are generated on a single chip for both beam steering and DDMA. In case of beam steering, the requirements on channel-to-channel isolation are less strict, making it well within reach. In the case of DDMA, we recommend increasing the channel-to-channel isolation by implementing multiple chips, in which case independent signals can be generated.","PeriodicalId":183218,"journal":{"name":"2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131653175","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A 14-GHz, 22-dBm Series Doherty Power Amplifier in 45-nm CMOS SOI 14ghz, 22dbm系列Doherty功率放大器在45nm CMOS SOI
2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2016-10-01 DOI: 10.1109/CSICS.2016.7751012
Cooper S. Levy, Voravit Vorapipat, J. Buckwalter
{"title":"A 14-GHz, 22-dBm Series Doherty Power Amplifier in 45-nm CMOS SOI","authors":"Cooper S. Levy, Voravit Vorapipat, J. Buckwalter","doi":"10.1109/CSICS.2016.7751012","DOIUrl":"https://doi.org/10.1109/CSICS.2016.7751012","url":null,"abstract":"This paper presents a new series Doherty power amplifier (SDPA) with a single-ended output that eliminates transformers in the output matching network. The series power combining architecture offers higher output power in scaled CMOS compared to conventional Doherty PAs and is amenable to integration at microwave and millimeter wave bands. The SDPA is implemented in 45-nm CMOS SOI and achieves a peak output power of 22-dBm and PAE of 24% and 20% at peak and 6 dB back-off powers, respectively.","PeriodicalId":183218,"journal":{"name":"2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124710562","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
Si-Based Technologies for mmWave Automotive Radar 毫米波汽车雷达的si基技术
2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2016-10-01 DOI: 10.1109/CSICS.2016.7751064
J. John, J. Kirchgessner, R. Ma, D. Morgan, I. To, V. Trivedi
{"title":"Si-Based Technologies for mmWave Automotive Radar","authors":"J. John, J. Kirchgessner, R. Ma, D. Morgan, I. To, V. Trivedi","doi":"10.1109/CSICS.2016.7751064","DOIUrl":"https://doi.org/10.1109/CSICS.2016.7751064","url":null,"abstract":"Continued advancements in Si-based technologies - in particular SiGe BiCMOS technologies - have enabled mmWave integrated circuits designed for 77GHz automotive radar systems to reach production-level maturity. This paper will discuss the technology requirements for mmWave automotive radar products, and also present the evolution of the respective key figures of merit. Si-based CMOS challenges and opportunities will also be discussed.","PeriodicalId":183218,"journal":{"name":"2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122007997","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
150 V-Bias RF GaN for 1 kW UHF Radar Amplifiers 用于1kw UHF雷达放大器的150v偏置射频GaN
2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2016-10-01 DOI: 10.1109/CSICS.2016.7751006
G. Formicone, J. Burger, J. Custer
{"title":"150 V-Bias RF GaN for 1 kW UHF Radar Amplifiers","authors":"G. Formicone, J. Burger, J. Custer","doi":"10.1109/CSICS.2016.7751006","DOIUrl":"https://doi.org/10.1109/CSICS.2016.7751006","url":null,"abstract":"A 1 kilowatt pulsed RF amplifier operating at 150 V for radar applications in the UHF frequency band from 420 MHz to 450 MHz is presented. GaN HEMT devices with 600 V breakdown voltage are becoming ubiquitous in power conversion applications operating from kHz to a few MHz, but they have never been considered for RF applications in power amplifiers. This paper explores the advantages in high power RF amplifiers that employ a high voltage GaN technology operating above the industry standard of 50 V. The signal is a pulse of 100 μs width and 10% duty cycle. The power amplifier is based on a specifically designed RF GaN technology that can operate at 150 V bias. The RF GaN transistor has breakdown voltage in excess of 500 V and peak iron (Fe) doping in the buffer layer in excess of 1018 cm-3. The single- ended 150 V RF GaN device utilizes three dice of 15 mm gate periphery assembled in a standard ceramic package. It achieves 1 kW output power across the band, with >70% drain efficiency without pulse gating during radar transmitter receive mode.","PeriodicalId":183218,"journal":{"name":"2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115844464","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Highly-Integrated Quad-Channel Transimpedance Amplifier for Next Generation Coherent Optical Receiver 用于新一代相干光接收机的高集成四通道透阻放大器
2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2016-10-01 DOI: 10.1109/CSICS.2016.7751043
Rajanish Pandey, G. Takahashi, S. Bhagavatheeswaran, Eric Tangen, M. Heins, Jens Muellrich
{"title":"Highly-Integrated Quad-Channel Transimpedance Amplifier for Next Generation Coherent Optical Receiver","authors":"Rajanish Pandey, G. Takahashi, S. Bhagavatheeswaran, Eric Tangen, M. Heins, Jens Muellrich","doi":"10.1109/CSICS.2016.7751043","DOIUrl":"https://doi.org/10.1109/CSICS.2016.7751043","url":null,"abstract":"This paper presents a highly integrated, high performance four channel linear transimpedance amplifier (TIA) RFIC with a footprint of 2mmx3.5mm towards next generation 100G/400G miniaturized coherent receivers. A TIA of such form may become indispensable as the size, complexity and cost of receivers continue to reduce. The design has been realized in a 130nm SiGe BiCMOS process for a low cost, high performance solution towards long- haul/metro applications. The TIA is capable of providing control functions either digitally through an on-chip 4-wire serial-peripheral interface (SPI) or in analog mode. Analog mode is provided as an alternative control for real-time control and monitoring. To provide high input dynamic range, a variable gain control block is integrated for each channel, which can be used in automatic or manual mode. The TIA has a differential input, differential output configuration that exhibits state-of-the-art THD of <;0.9% up to 500mVpp output voltage swing for input currents up to 2mApp and high isolation > 40dB between adjacent channels. A high transimpedance gain (Zt) up to ~7KΩ with a large dynamic range up to 37dB and variable bandwidth up to 34GHz together with low average input noise density of 20pA/√Hz has been achieved. To the authors' knowledge, these metrics combined with diverse functionality and high integration have not been exhibited so far. This paper intends to report a state-of-the-art high-baud rate TIA and provide insight into possibilities for further integration.","PeriodicalId":183218,"journal":{"name":"2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127866795","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
A 40 Gbps Micro-Ring Modulator Driver Implemented in a SiGe BiCMOS Technology 基于SiGe BiCMOS技术实现的40gbps微环调制器驱动
2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2016-10-01 DOI: 10.1109/CSICS.2016.7751016
A. Fatemi, H. Klar, F. Gerfers, D. Kissinger
{"title":"A 40 Gbps Micro-Ring Modulator Driver Implemented in a SiGe BiCMOS Technology","authors":"A. Fatemi, H. Klar, F. Gerfers, D. Kissinger","doi":"10.1109/CSICS.2016.7751016","DOIUrl":"https://doi.org/10.1109/CSICS.2016.7751016","url":null,"abstract":"This paper presents a 40 Gbps micro-ring modulator driver IC implemented in a 130nm SiGe BiCMOS technology providing a fT,max of 250GHz. The proposed bandwidth-optimized driver IC achieves 2Vppd output signal swing required for the integrated high-impedance silicon photonics ring modulator or 1Vppd when differentially terminated with 100Ω. The complete driver including input termination and biasing consumes 90mW operated from a single 2:5V power supply. The inductor-less driver architecture exploits a current density optimized cascode topology with capacitive degeneration to improve both, the overall bandwidth and the output voltage swing. The driver core occupies only 0.04mm2. Small-signal measurements show a differential gain of 16dB with a -3dB bandwidth of 33GHz and a return loss of -15dB at 33GHz. This design represents one of the fastest micro-ring modulator drivers with FOM of 2.25 pJ/(bit×⌉Vppd) above 25 Gbps.","PeriodicalId":183218,"journal":{"name":"2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"109 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116034849","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Broadband GaN DHFET Traveling Wave Amplifiers with up to 120 GHz Bandwidth 带宽高达120ghz的宽带GaN DHFET行波放大器
2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2016-10-01 DOI: 10.1109/CSICS.2016.7751031
David F. Brown, A. Kurdoghlian, R. Grabar, D. Santos, J. Magadia, H. Fung, J. Tai, I. Khalaf, M. Micovic
{"title":"Broadband GaN DHFET Traveling Wave Amplifiers with up to 120 GHz Bandwidth","authors":"David F. Brown, A. Kurdoghlian, R. Grabar, D. Santos, J. Magadia, H. Fung, J. Tai, I. Khalaf, M. Micovic","doi":"10.1109/CSICS.2016.7751031","DOIUrl":"https://doi.org/10.1109/CSICS.2016.7751031","url":null,"abstract":"We report MMIC traveling-wave amplifiers (TWAs) fabricated using a 40 nm GaN double heterostructure FET (DHFET) technology. By varying the gate periphery within cascode gain stages, we produced a family of TWA designs with a range of gain and bandwidth and approximately 300 GHz gain- bandwidth product. The TWA with the widest bandwidth had >120 GHz of 3-dB bandwidth, with 7.3 dB gain, 6 dB noise figure (NF), and saturated output power of 19 dBm at 20 GHz. Our TWA that was optimized for performance at lower frequencies had 1-50 GHz bandwidth with 16 dB gain, 1.7 dB minimum NF, and 27 dBm output power at 20 GHz. These circuits represent record MMIC performance for GaN in terms of bandwidth and gain-bandwidth product, and are very promising for broadband amplifier applications where low noise figure, and ultra- high linearity, dynamic range and survivability are required.","PeriodicalId":183218,"journal":{"name":"2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116041649","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Elimination of Leakage in GaN-on-Diamond 消除gan -on-金刚石中的泄漏
2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2016-10-01 DOI: 10.1109/CSICS.2016.7751039
B. Alvarez, D. Francis, F. Faili, F. Lowe, D. Twitchen, K. B. Lee, P. Houston
{"title":"Elimination of Leakage in GaN-on-Diamond","authors":"B. Alvarez, D. Francis, F. Faili, F. Lowe, D. Twitchen, K. B. Lee, P. Houston","doi":"10.1109/CSICS.2016.7751039","DOIUrl":"https://doi.org/10.1109/CSICS.2016.7751039","url":null,"abstract":"The use of chemical vapor deposition diamond as a substrate for gallium nitride (GaN) to form GaN- on-diamond has the potential to allow for higher linear power densities in GaN high electron mobility transistors (HEMTs). The increase in GaN HEMT power density on diamond has been limited to date by the electrical leakage in GaN-on-diamond substrates. In this paper we show that to eliminate buffer leakage in silicon based GaN-on- diamond, you have to completely remove the transition layers used to grow high quality GaN on the original host silicon. By completely removing the transition layers in GaN-on-diamond, we demonstrated buffer leakage comparable to the leakage in GaN on silicon carbide.","PeriodicalId":183218,"journal":{"name":"2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123479774","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
35nm InP HEMT LNAs at E/W-Band Frequencies E/ w波段35nm InP HEMT LNAs
2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2016-10-01 DOI: 10.1109/CSICS.2016.7751007
Nicholas Estella, L. Bui, E. Camargo, J. Schellenberg
{"title":"35nm InP HEMT LNAs at E/W-Band Frequencies","authors":"Nicholas Estella, L. Bui, E. Camargo, J. Schellenberg","doi":"10.1109/CSICS.2016.7751007","DOIUrl":"https://doi.org/10.1109/CSICS.2016.7751007","url":null,"abstract":"This paper presents the design and performance of two millimeter-wave LNAs using 35nm InP HEMT device technology. First, a single-ended 3-stage LNA, operating over the 81-86 GHz band, is reported with a noise figure (NF) of 1.6-1.9 dB and a gain of 28 ±1 dB. This is the lowest reported noise figure for LNAs at this frequency. Secondly, a balanced LNA, operating over the 56- 110 GHz band, is reported with a NF of typically 2.7 dB and a gain of greater than 20 dB. This amplifier represents an unprecedented combination of low noise, good input/output match, and broad bandwidth.","PeriodicalId":183218,"journal":{"name":"2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128170008","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Compact Thermal Modeling of GaN HEMT Devices for Pulsed and CW Applications 用于脉冲和连续波应用的GaN HEMT器件的紧凑热建模
2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) Pub Date : 2016-10-01 DOI: 10.1109/CSICS.2016.7751035
Jiang Liu, M. Calvo, L. Dunleavy, H. Morales, Richard Martin, Mark Woods, N. Craig
{"title":"Compact Thermal Modeling of GaN HEMT Devices for Pulsed and CW Applications","authors":"Jiang Liu, M. Calvo, L. Dunleavy, H. Morales, Richard Martin, Mark Woods, N. Craig","doi":"10.1109/CSICS.2016.7751035","DOIUrl":"https://doi.org/10.1109/CSICS.2016.7751035","url":null,"abstract":"A novel empirical thermal modeling technique is proposed to allow improved prediction of channel temperature for GaN HEMT power devices when driven with pulsed DC/RF signals. The proposed thermal model contains a multiple-pole RC network and adapts itself based on the pulse width and duty cycles of the input signals. The model, which is incorporated within an Angelov-based compact non-linear model, is derived from numerical physics-based thermal analysis results. The model enables designers to conveniently estimate peak and average channel temperatures for specified pulse conditions and load and source impedances. The model can be used in either transient or in more time-efficient harmonic balance simulations.","PeriodicalId":183218,"journal":{"name":"2016 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128724347","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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