Proceedings of the 2nd International Symposium on Power Semiconductor Devices and Ics. ISPSD '90.最新文献

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Power MOSFETs having Schottky barrier drain contact 具有肖特基阻挡漏极触点的功率mosfet
K. Sakurai, T. Nishimura, S. Obinata, S. Momota, T. Nakajima, S. Tagami, S. Furuhata, Y. Inakoshi
{"title":"Power MOSFETs having Schottky barrier drain contact","authors":"K. Sakurai, T. Nishimura, S. Obinata, S. Momota, T. Nakajima, S. Tagami, S. Furuhata, Y. Inakoshi","doi":"10.1109/ISPSD.1990.991072","DOIUrl":"https://doi.org/10.1109/ISPSD.1990.991072","url":null,"abstract":"A new vertical Schottky barrier gain com tact power MDS~-(KSMISIT) is presented for the first time. The new device has a mique drain structure of Schottky barrier (SB) contact or p-n jvlction ad&d in para1 le1 with the SB contact. istics changes with varying the kind of barrier metal (Pt. and A I ) and the ratio of the SB contact to the total back-surface area. The change arises fran the control of the minority carrier injection resulting in conductivity mo&lation and of the electron conduction path &ring turn off. The VsDMOsms provide hi& blocking voltage, low on-state resistance and fast switching speed. 1000-1200V VQMXFEr with 100% Pt SB contact, for exwle, exhibits about a half of the on-state resistance and the carparable fa1 I time for the conventiwl power NEFEL The omstate resistance and the switching character-","PeriodicalId":162198,"journal":{"name":"Proceedings of the 2nd International Symposium on Power Semiconductor Devices and Ics. ISPSD '90.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129936185","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A novel 8 KV light-triggered thyristor with overvoltage self protection 一种具有过压自保护功能的新型8kv光触发晶闸管
H. Mitlehner, F. Pfirsch, H. Schulze
{"title":"A novel 8 KV light-triggered thyristor with overvoltage self protection","authors":"H. Mitlehner, F. Pfirsch, H. Schulze","doi":"10.1109/ISPSD.1990.991098","DOIUrl":"https://doi.org/10.1109/ISPSD.1990.991098","url":null,"abstract":"We have fabricated a novel 8 kV light-triggered power thyristor with integrated overvoltage self-protection. The light-sensitivity was improved by a special groove structure. Four amplifying gate-stages together with an integrated currentlimiting resistor guarantee a safe and homogeneous turn-on behavior. An improvement of the dynamic and static power losses could be obtained by a local lifetime reduction and by a decrease of the penetration depths of the blocking pn-junctions.","PeriodicalId":162198,"journal":{"name":"Proceedings of the 2nd International Symposium on Power Semiconductor Devices and Ics. ISPSD '90.","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129978886","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Annealing behaviour of ion implanted aluminum in silicon 离子注入铝在硅中的退火行为
T. Stockmeier, P. Braesch, E. Halder, P. Kluge-Weiss, P. Roggwiller, F. Stucki
{"title":"Annealing behaviour of ion implanted aluminum in silicon","authors":"T. Stockmeier, P. Braesch, E. Halder, P. Kluge-Weiss, P. Roggwiller, F. Stucki","doi":"10.1109/ISPSD.1990.991079","DOIUrl":"https://doi.org/10.1109/ISPSD.1990.991079","url":null,"abstract":"","PeriodicalId":162198,"journal":{"name":"Proceedings of the 2nd International Symposium on Power Semiconductor Devices and Ics. ISPSD '90.","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130029994","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
40 V BiCMOS technology with polysilicon emitter structure 具有多晶硅发射极结构的40 V BiCMOS技术
S. Yamada, T. Yamauchi, M. Tokuriki, X. Inayoshi
{"title":"40 V BiCMOS technology with polysilicon emitter structure","authors":"S. Yamada, T. Yamauchi, M. Tokuriki, X. Inayoshi","doi":"10.1109/ISPSD.1990.991065","DOIUrl":"https://doi.org/10.1109/ISPSD.1990.991065","url":null,"abstract":"This paper describes a high voltage BiCMOS fabrication technique consisting of a selfaligned emitter process that uses reflowing PSG, photoetchs emitter contact windows and diffuses phosphorus in the windows through polysilicon. We also used a more lightly doped drain for NMOS transistors. As a result, we could fabricate bipolar transistors of over 40 V BV CEO and 1.56 GHz cutoff frequency ( fr ) and CMOS transistors of over 20 V BVDs.","PeriodicalId":162198,"journal":{"name":"Proceedings of the 2nd International Symposium on Power Semiconductor Devices and Ics. ISPSD '90.","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122352803","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A novel heavily doped drift - auxiliary cathode lateral insulated gate transistor structure 一种新型重掺杂漂移辅助阴极侧绝缘栅晶体管结构
Q. Huang, E. M. Sankara Narayanan, K. Kwan, G. Amaratunga, W. Milne
{"title":"A novel heavily doped drift - auxiliary cathode lateral insulated gate transistor structure","authors":"Q. Huang, E. M. Sankara Narayanan, K. Kwan, G. Amaratunga, W. Milne","doi":"10.1109/ISPSD.1990.991068","DOIUrl":"https://doi.org/10.1109/ISPSD.1990.991068","url":null,"abstract":"A novel CMOS-compatible, heavily doped drift auxiliary cathode lateral insulated gate transistor (HDD-ACLIGT) structure is analyzed using two-dimensional device simulation techniques. Simulation results indicate that low on-resistance and a fast turn-off time of less than 50 ns can be achieved by incorporating an additional n+ region which is self-aligned to the gate between the p+ auxiliary cathode and the p well, together with an extended p buried layer in an anode-shorted modified lateral insulated gate transistor (MLIGT) structure. The on-state and its transient performance are analyzed in detail. The on-state performances of the HDD-ACLIGT and the MLIGT are compared and discussed. The results indicate that the HDD-ACLIGT structure is well suited for HVICs. The device is also well suited for integration with self-aligned digital CMOS.","PeriodicalId":162198,"journal":{"name":"Proceedings of the 2nd International Symposium on Power Semiconductor Devices and Ics. ISPSD '90.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125683366","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Design optimization for improving high power GTO switching characteristics with 'alloy free technology' 利用“无合金技术”改善大功率GTO开关特性的优化设计
H. Matsuda, T. Fujiwara, K. Nishitani
{"title":"Design optimization for improving high power GTO switching characteristics with 'alloy free technology'","authors":"H. Matsuda, T. Fujiwara, K. Nishitani","doi":"10.1109/ISPSD.1990.991090","DOIUrl":"https://doi.org/10.1109/ISPSD.1990.991090","url":null,"abstract":"Switching performance of 3kA-4.5kV GTO has been improved by design optimization. The improvement of 20-30% in switching power loss, without sacrificing the other characteristics, has been realized. To optimize GTO performance,'Alloy Free Technology' has been adopted to the high power GTO as well as reviewing very carefully GTO element design profile. With assistance from computer-aided numerical structual analysis, very uniform mounting presure and mechanical ruggedness have been realized.","PeriodicalId":162198,"journal":{"name":"Proceedings of the 2nd International Symposium on Power Semiconductor Devices and Ics. ISPSD '90.","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124324966","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Multi-dimensional simulation of MCT structures MCT结构的多维模拟
A. Aenuner, F. Bauer, J. Burgler, W. Fichtner, S. Muller, P. Roggwiller
{"title":"Multi-dimensional simulation of MCT structures","authors":"A. Aenuner, F. Bauer, J. Burgler, W. Fichtner, S. Muller, P. Roggwiller","doi":"10.1109/ISPSD.1990.991052","DOIUrl":"https://doi.org/10.1109/ISPSD.1990.991052","url":null,"abstract":"Numerical simulation of the fabrication steps and the electrical behavior has become an invaluable tool in the design and optimization of new semiconductor device structures. The field of process and device modeling has made important contributions to our understanding of device concepts and technologyperformance tradeoffs. Through the use of efficient modeling tools, this paradigm offers significant cost reductions with additional improvements in the overall design time. While the use of numerical modeling tools has been pioneered in the more classical \"VLSI\" field, there have also been considerable efforts during the last few years to achieve similar results in the area of power semiconductor devices [I]. During the last few years, we have developed a software environment for process and device simulation studies dedicated to semiconductor power devices such as MCT, FCT, GTO and IGBT structures. While we tried to automate the program usage as much as possible, robustness and accuracy were important concerns in the design. Our aDDroach centers around an integrated approach of process, device modeling and analysis tools such as graphics postprocessors. Figure 1 summarizes this concept by schematically illustrating the interplay between process and device simulators and graphics tools. One should realize that each part of this modeling hierarchy contains large software packages that were developed over several years. In this paper, we want to illustrate the power of our integrated approach for the case of a complex MCT device. We have taken the MCT as a representative example of a modern power device. A three-dimensional picture of this MCT is presented in Fig. 2. (Reference [2] gives a more detailed description of this structure and summarizes technological concepts and measurement results.) Here we shall concentrate on the modeling aspects of these structures, in particular the various software tools that were developed. Suucture U Generator (3d) Technology Data 1 Process Simulator","PeriodicalId":162198,"journal":{"name":"Proceedings of the 2nd International Symposium on Power Semiconductor Devices and Ics. ISPSD '90.","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124082750","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Power semiconductor devices for pulse power applications 脉冲功率应用的功率半导体器件
W. Portnoy
{"title":"Power semiconductor devices for pulse power applications","authors":"W. Portnoy","doi":"10.1109/ISPSD.1990.991049","DOIUrl":"https://doi.org/10.1109/ISPSD.1990.991049","url":null,"abstract":"The operation of various proposed thyristor closing switches for pulse power is reviewed and their switching parameters are compared and evaluated. The comparisons suggest that current thyristor technology can provide elements which can be combined to obtain a thyratron replacement switch.","PeriodicalId":162198,"journal":{"name":"Proceedings of the 2nd International Symposium on Power Semiconductor Devices and Ics. ISPSD '90.","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117284291","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
High speed, high current capacity LIGBT and diode for output stage of high voltage monolithic three-phase inverter IC 用于高压单片三相逆变电路输出级的高速大电流灯和二极管
N. Sakurai, M. Mori, T. Yatsuo
{"title":"High speed, high current capacity LIGBT and diode for output stage of high voltage monolithic three-phase inverter IC","authors":"N. Sakurai, M. Mori, T. Yatsuo","doi":"10.1109/ISPSD.1990.991060","DOIUrl":"https://doi.org/10.1109/ISPSD.1990.991060","url":null,"abstract":"Structure of a high speed, high current capacity Latelal Insulated Gate Bipolar Transistor (LIGBT) and a diode for a 250V1A monolithic three-phase inverter IC are studied. A hybrid structure between Schottky junctions and pn junctions is effective for the diode, but not for the LIGBT. Characteristics of the IC using the LIGBT and diode are also presented.","PeriodicalId":162198,"journal":{"name":"Proceedings of the 2nd International Symposium on Power Semiconductor Devices and Ics. ISPSD '90.","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117126833","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 22
GTO-cascode for high power, high frequency applications 用于高功率,高频应用的gto级联码
W. Nowak, J. Korec, H. Maeder, M. Fullmann
{"title":"GTO-cascode for high power, high frequency applications","authors":"W. Nowak, J. Korec, H. Maeder, M. Fullmann","doi":"10.1109/ISPSD.1990.991074","DOIUrl":"https://doi.org/10.1109/ISPSD.1990.991074","url":null,"abstract":"Despite of the rapid progress in t-he field of MOS-controlled power devices there is still no optimum device for high power ratings. Besides monolithically integrated MOS-bipolar devices a hybrid setup of a GTOthyristor and a low voltage MOSFET in a cascode configuration can be used. This paper shows that the GTO-cascode switch is free from drawbacks inherent for conventional gate drive operation. Especially a cascode switch with a new designed fine patterned GTO is a promising candidate for high power, high frequency applications.","PeriodicalId":162198,"journal":{"name":"Proceedings of the 2nd International Symposium on Power Semiconductor Devices and Ics. ISPSD '90.","volume":"111 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122655797","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
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