{"title":"A novel field plate structure under high voltage interconnections","authors":"N. Fujishima, H. Takeda","doi":"10.1109/ISPSD.1990.991066","DOIUrl":"https://doi.org/10.1109/ISPSD.1990.991066","url":null,"abstract":"A newly proposed channel stopper field plate (CS-FP) consists of a poly-silicon field plate in the surface Si02 film on a high resistivity epitaxial layer region. The CS-FP acts as a channel stopper in high voltage ICs. Breakdown voltages of more than 400 V are achieved in high voltage devices such as n- and p- channel DMOSFETs using the CS-FP. This breakdown voltage is 28% higher than that for a device which uses a conventional channel stopper .","PeriodicalId":162198,"journal":{"name":"Proceedings of the 2nd International Symposium on Power Semiconductor Devices and Ics. ISPSD '90.","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123835204","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Power rectifier with integrated current sensor","authors":"H. Chang, A.V. Radun, R. Baliga","doi":"10.1109/ISPSD.1990.991071","DOIUrl":"https://doi.org/10.1109/ISPSD.1990.991071","url":null,"abstract":"In this paper, high voltage power rectifiers with integrated current sensors are reported for the first time. Devices with a 600 volt blocking capability were designed and fabricated with current ratings of 20 and 80 amperes. 2-D computer modeling of the device structure was performed to achieve the designed breakdown voltage as well as sufficient isolation between the current sensing element and the main device. The integrated current sensor exhibits linearity and temperature independence characteristics which are desirable for current monitoring in the power circuits.","PeriodicalId":162198,"journal":{"name":"Proceedings of the 2nd International Symposium on Power Semiconductor Devices and Ics. ISPSD '90.","volume":"83 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131781872","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A two-dimensional analytical model for the output I-V characteristics of the static induction transistor (SIT)","authors":"A. Strollo, P. Spirito","doi":"10.1109/ISPSD.1990.991083","DOIUrl":"https://doi.org/10.1109/ISPSD.1990.991083","url":null,"abstract":"On the basis of the physical picture obtained by a detailed two-dimensional numerical simulation, an analytical model is developed for the output IV characteristics of a Static Induction Transistor (SIT). The model is able to explain the output I-V curves from the exponential shape in the low current range, to the triode-like I-V curve shape, and to the linear behaviour in the high current range. The obtained comprehensive analytical model gives results in very good agreement with the numerical simulations and can be used to assess the influence of the various geometrical and physical parameters on the performances of the device.","PeriodicalId":162198,"journal":{"name":"Proceedings of the 2nd International Symposium on Power Semiconductor Devices and Ics. ISPSD '90.","volume":"80 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114397170","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A multi-cell mosfet with exponential V/sub G/-I/sub D/ characteristics","authors":"K. Sekine, K. Shono","doi":"10.1109/ISPSD.1990.991055","DOIUrl":"https://doi.org/10.1109/ISPSD.1990.991055","url":null,"abstract":"A M O S F E T having exponentially grouped cells in which a threshold is given t o each group shows exponential VG I D characteristics. T h e design principle is based on t h e gradual channel model of MOSFET. T h e calculated characterist ics are compared with those experimentally obtained. T h e threshold voltage of t h e cell can b e controlled locally by ion-implantation during wafer processing or by electron beam irradiation af ter device fabrication.","PeriodicalId":162198,"journal":{"name":"Proceedings of the 2nd International Symposium on Power Semiconductor Devices and Ics. ISPSD '90.","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134054391","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
T. Ogura, A. Nakagawa, M. Atsuta, Y. Kamei, K. Takigami
{"title":"High frequency 6000 V gate GTOs with buried gate structure","authors":"T. Ogura, A. Nakagawa, M. Atsuta, Y. Kamei, K. Takigami","doi":"10.1109/ISPSD.1990.991092","DOIUrl":"https://doi.org/10.1109/ISPSD.1990.991092","url":null,"abstract":"A new double gate GTO with buried gate structure for a second gate has been proposed to realize high turn-off gain simultaneously with low turn-off switching loss. The double gate GTO has been combined with an n-buffer structure to realize 6000 V forward blocking voltage with a narrow n-base width, such as 550 p . The high turn-off gain, such as 6, was obtained when the anode current was 500 A . It was found that the double gate GTOs with buried gate realize a very short tail time and a small tail current. The newly developed double gate GTOs decrease the turn-off loss to less than 1/10 of that for the conventional single gate GTOs.","PeriodicalId":162198,"journal":{"name":"Proceedings of the 2nd International Symposium on Power Semiconductor Devices and Ics. ISPSD '90.","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125239516","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Experiments and 2D-simulations for quasi-saturation effect in ponver VDMOS transistors","authors":"Chan-Kwang Park, K. Lee","doi":"10.1109/ISPSD.1990.991086","DOIUrl":"https://doi.org/10.1109/ISPSD.1990.991086","url":null,"abstract":"Quasi-saturation phenomena in power VDMOS transistors have been studied extensively by experiments and also by two dimensional device simulation. It has been found that the quasi-saturation current is proportional to the effective cell-to-cell spacing, and beyond the critical point, carrier drift velocity in JFET region is saturated and carrier modulation occurs under the gate region. The results of this work shows that a power VDMOS transistor should be designed to keep the operating current smaller than one half of the critical current (I*) rather than I* reported previously. This is obtained from the detailed analysis of the severe non-linearity of the on-resistance due to mobility degradation as well as to the channel length modulation in the JFET region.","PeriodicalId":162198,"journal":{"name":"Proceedings of the 2nd International Symposium on Power Semiconductor Devices and Ics. ISPSD '90.","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131438684","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Bipolar MOS power device simulator TonaddeIIc taking into account external circuit","authors":"A. Nakagawa, K. Sato","doi":"10.1109/ISPSD.1990.991054","DOIUrl":"https://doi.org/10.1109/ISPSD.1990.991054","url":null,"abstract":"Device s imula to r family TONADDEII was r ev i sed t o enable s imula t ing MOS b i p o l a r composite dev ices . A n automatic mesh and input d a t a gene ra to r MEDIT and a device breakdown vo l t age s imula to r TONADDEIIB have been developed and included a s t h e s imula to r f ami ly . A newly implemented a r b i t r a r y ex te rna l c i r c u i t d e f i n i n g func t ion he lps u s e r s t o e a s i l y s imula t e switching c h a r a c t e r i s t i c s , while r e t a i n i n g t h e r ap id convergence f e a t u r e . d e s i r e d dev ice s t r u c t u r e s . MEDIT au tomat i ca l ly gene ra t e s a r ec t angu la r mesh and a complete s e t of imput d a t a f o r TONADDEIIC. TONADDEIIC a l lows u s e r s t o d e f i n e any e x t e r n a l c i r c u i t s using pass ive components i n a d d i t ion t o d iodes and v a r i a b l e vo l t age sou rces . Thus, it is poss ib l e t o a c c u r a t e l y execute dev ice switching-off s imula t ions even w i t h snubber c i r c u i t s . Since s e v e r a l a p p l i c a t i o n examples of TONADDEIIC have a l r eady been pub l i shed[5 ] , t h i s paper emphasizes a lgo r i thms and s o l u t i o n methods adopted i n TONADDEIIC and MEDIT. In o rde r t o execute t r a n s i e n t s i m u l a t i o n s ,","PeriodicalId":162198,"journal":{"name":"Proceedings of the 2nd International Symposium on Power Semiconductor Devices and Ics. ISPSD '90.","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127241444","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Novel planar junction termination technique for high voltage power devices","authors":"T. Stockmeier, P. Roggwiller","doi":"10.1109/ISPSD.1990.991089","DOIUrl":"https://doi.org/10.1109/ISPSD.1990.991089","url":null,"abstract":"","PeriodicalId":162198,"journal":{"name":"Proceedings of the 2nd International Symposium on Power Semiconductor Devices and Ics. ISPSD '90.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125342563","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Impact of ultra clean wafer processings on power devices","authors":"T. Ohmi","doi":"10.1109/ISPSD.1990.991077","DOIUrl":"https://doi.org/10.1109/ISPSD.1990.991077","url":null,"abstract":"It is demonstrated that ultra clean technology is a crucial factor in developing high quality processing technology for future ULSI fabrication. Simultaneous establishment of three principles, i.e., ultra clean processing environment, ultra clean wafer surf ace, and perfect processparameter control, only makes it possible to realize high quality processing. Such high quality processing technologies are recognized to be essentially required for deep submicron ULSI and advanced power device manufacturing. In accordance with the development of advanced microfabrications based on the ultra clean technology, temperatures of key processings are lowered less than 50OoC. so that buried metal structures becomes practical to be introduced to power devices in order to improve the speed performance due to the decrease of the electrode resistance.","PeriodicalId":162198,"journal":{"name":"Proceedings of the 2nd International Symposium on Power Semiconductor Devices and Ics. ISPSD '90.","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123155668","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Off-line integrated full-bridge drrver for induction motors","authors":"C. Bruning, A. Wegener","doi":"10.1109/ISPSD.1990.991061","DOIUrl":"https://doi.org/10.1109/ISPSD.1990.991061","url":null,"abstract":"An off-line 500V integrated full-bridge driver with motor current feedback-loop is presented. This type of IC offers a further step towards miniaturization in motor control by integrating two high voltage source follower driver functions, and, in addition, by including the custom current control (variable amplitude-variable frequency) for a range of single-phase induction motors.","PeriodicalId":162198,"journal":{"name":"Proceedings of the 2nd International Symposium on Power Semiconductor Devices and Ics. ISPSD '90.","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1990-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114795232","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}