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ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures最新文献

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A new method for the experimental determination of the control gate and drain coupling ratios in FLOTOX EEPROM cells 一种实验测定FLOTOX EEPROM细胞中控制栅和漏极耦合比的新方法
ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures Pub Date : 1993-03-22 DOI: 10.1109/ICMTS.1993.292904
C. Papadas, B. Moison, G. Ghibaudo, P. Mortini, G. Panankakis
{"title":"A new method for the experimental determination of the control gate and drain coupling ratios in FLOTOX EEPROM cells","authors":"C. Papadas, B. Moison, G. Ghibaudo, P. Mortini, G. Panankakis","doi":"10.1109/ICMTS.1993.292904","DOIUrl":"https://doi.org/10.1109/ICMTS.1993.292904","url":null,"abstract":"A new method for the extraction of the control gate and drain coupling ratios in FLOTOX electrically erasable PROM (EEPROM) cells is proposed. The method enables parameter extraction to be performed directly on the memory cells, without any use of the so-called dummy-cell. The rapidity of the method allows statistical analysis of the coupling ratio variation to be performed throughout a wafer or a matrix. An alternative simplified method for extracting the drain coupling ratio in FLOTOX EEPROM cells, with optional use of the dummy-cell, is proposed.<<ETX>>","PeriodicalId":123048,"journal":{"name":"ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120843412","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Evaluation technique of gate oxide damage 栅氧化损伤评价技术
ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures Pub Date : 1993-03-22 DOI: 10.1109/ICMTS.1993.292878
Y. Uraoka, K. Eriguchi, T. Tamaki, K. Tsuji
{"title":"Evaluation technique of gate oxide damage","authors":"Y. Uraoka, K. Eriguchi, T. Tamaki, K. Tsuji","doi":"10.1109/ICMTS.1993.292878","DOIUrl":"https://doi.org/10.1109/ICMTS.1993.292878","url":null,"abstract":"Gate oxide damage by the plasma process is studied using test structures with various length antennas. It is shown that the gate oxide damage by the plasma process can be monitored quantitatively by measuring the charge to breakdown Q/sub BD/. From Q/sub BD/ measurements, it is found that degradation occurs in the duration of over-etching, not in main etching. The breakdown spot in the gate oxide is detected by the photon emission method. The breakdown caused by plasma damage occurs at the local oxidation of silicon (LOCOS) edge. LOCOS structure plays an important role for the degradation by plasma damage.<<ETX>>","PeriodicalId":123048,"journal":{"name":"ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures","volume":"242 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123744013","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 27
A new test device for detecting very low leakage current using DRAM cell array 一种利用DRAM单元阵列检测极低泄漏电流的新型测试装置
ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures Pub Date : 1993-03-22 DOI: 10.1109/ICMTS.1993.292879
T. Oasa, H. Inada, M. Fujito, T. Matsumoto
{"title":"A new test device for detecting very low leakage current using DRAM cell array","authors":"T. Oasa, H. Inada, M. Fujito, T. Matsumoto","doi":"10.1109/ICMTS.1993.292879","DOIUrl":"https://doi.org/10.1109/ICMTS.1993.292879","url":null,"abstract":"A method for measuring very low leakage current is presented. The method, named the variable V/sub pc/ method, is capable of detecting leakage current lower than 10/sup -14/ A in the area of 8.7*9.4 mu m/sup 2/ using a dynamic RAM (DRAM) cell. This method is used to measure the leakage current caused by oxidation-induced stacking faults (OSFs) originating in a Si wafer. The leakage current of OSFs is evaluated quantitatively.<<ETX>>","PeriodicalId":123048,"journal":{"name":"ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126743423","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Proposal of standard characterization method for dynamic circuit performance 动态电路性能标准表征方法的提出
ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures Pub Date : 1993-03-22 DOI: 10.1109/ICMTS.1993.292915
M. Fujishima, K. Asada
{"title":"Proposal of standard characterization method for dynamic circuit performance","authors":"M. Fujishima, K. Asada","doi":"10.1109/ICMTS.1993.292915","DOIUrl":"https://doi.org/10.1109/ICMTS.1993.292915","url":null,"abstract":"A reliable characterization method is proposed for evaluating effective load capacitance, effective current drivability and effective leak current in dynamic operation. In this method, two test structures are utilized in order to make the evaluation reliable; one is an open-loop inverter array for extracting parameters, and the other is a conventional closed-loop ring oscillator for confirmation. The method is easily extended for general high-speed circuits such as emitter-coupled logic (ECL) and compound-semiconductor circuits. CMOS circuits are used in this study.<<ETX>>","PeriodicalId":123048,"journal":{"name":"ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures","volume":"93 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114044938","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Channel-width measurements of LOCOS- and trench-isolated n-MOSFETs by photoemission 利用光电发射测量LOCOS-和沟槽隔离n- mosfet的通道宽度
ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures Pub Date : 1993-03-22 DOI: 10.1109/ICMTS.1993.292908
T. Ohzone, H. Iwata
{"title":"Channel-width measurements of LOCOS- and trench-isolated n-MOSFETs by photoemission","authors":"T. Ohzone, H. Iwata","doi":"10.1109/ICMTS.1993.292908","DOIUrl":"https://doi.org/10.1109/ICMTS.1993.292908","url":null,"abstract":"A simple, accurate, and nondestructive method for measuring the channel width of a processed n-MOSFET by using a high-resolution photoemission microscope is proposed. It is confirmed for test devices with local application of silicon (LOCOS) and trench isolation that the method can be applicable to n-MOSFETs with submicron channel width.<<ETX>>","PeriodicalId":123048,"journal":{"name":"ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures","volume":"131 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124250003","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Thermal measurements by use of a SBIMOS diode matrix 热测量的使用一个双极二极管矩阵
ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures Pub Date : 1993-03-22 DOI: 10.1109/ICMTS.1993.292923
B. Geeraerts, W. Van Petegem, W. Sansen
{"title":"Thermal measurements by use of a SBIMOS diode matrix","authors":"B. Geeraerts, W. Van Petegem, W. Sansen","doi":"10.1109/ICMTS.1993.292923","DOIUrl":"https://doi.org/10.1109/ICMTS.1993.292923","url":null,"abstract":"The diode matrix is shown to be an excellent tool for determining thermal constants and temperature distributions on chip. This information can be used to evaluate the electro-thermal simulator and to provide designers with more practical guidelines in designing chips with tight temperature specification. Temperature related problems on chip, such as offset voltage due to temperature gradients and maximum allowable temperature, can now be modeled adequately.<<ETX>>","PeriodicalId":123048,"journal":{"name":"ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123371396","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A method for modeling the manufacturability of IC designs 集成电路设计的可制造性建模方法
ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures Pub Date : 1993-03-22 DOI: 10.1109/ICMTS.1993.292912
E. D. Boskin, C. Spanos, G. Korsh
{"title":"A method for modeling the manufacturability of IC designs","authors":"E. D. Boskin, C. Spanos, G. Korsh","doi":"10.1109/ICMTS.1993.292912","DOIUrl":"https://doi.org/10.1109/ICMTS.1993.292912","url":null,"abstract":"A methodology for modeling the manufacturability of MOS transistors and circuits is developed. The models are based on a small set of measurable process characterization parameters, whose variation explains the range of performance seen during production. A statistical MOSFET model, based on these measurable process parameters, is developed using global optimization and regression modeling of key fitting parameters in order to accurately predict transistor characteristics over a wide range of process variation. These same process parameters can be measured on the manufacturing floor, both in-line and at electrical test, and can be used to predict the performance of the fabricated integrated circuit before packaging and final test. The models for use in manufacturing and design are integrated. Data taken from the manufacturing line can be used to identify process shifts, as well as to suggest design improvements for manufacturability enhancement.<<ETX>>","PeriodicalId":123048,"journal":{"name":"ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130197141","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 23
SPICE DC parameter extraction of MESFETs with diffused and grown channel 扩散沟道和生长沟道mesfet的SPICE直流参数提取
ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures Pub Date : 1993-03-22 DOI: 10.1109/ICMTS.1993.292927
A.S. Lujan, Ivan Chueiri, J. Swart, F. Prince, P.H. Tessari
{"title":"SPICE DC parameter extraction of MESFETs with diffused and grown channel","authors":"A.S. Lujan, Ivan Chueiri, J. Swart, F. Prince, P.H. Tessari","doi":"10.1109/ICMTS.1993.292927","DOIUrl":"https://doi.org/10.1109/ICMTS.1993.292927","url":null,"abstract":"A procedure for extracting SPICE (simulation program with IC emphasis) DC parameters of GaAs MESFETs is presented. The program developed produces a best fitting of the calculated I-V curves to the experimental characteristics. Devices are fabricated by means of two different processes producing different channel doping structures and different channel length devices. Extracted parameters of these devices are presented and analyzed.<<ETX>>","PeriodicalId":123048,"journal":{"name":"ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129472382","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A testset for automatic characterisation of opamps in the frequency domain 一种在频域自动表征运放大器的测试集
ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures Pub Date : 1993-03-22 DOI: 10.1109/ICMTS.1993.292889
C. Van Grieken, W. Sansen
{"title":"A testset for automatic characterisation of opamps in the frequency domain","authors":"C. Van Grieken, W. Sansen","doi":"10.1109/ICMTS.1993.292889","DOIUrl":"https://doi.org/10.1109/ICMTS.1993.292889","url":null,"abstract":"A new test set is described. It allows fully automatic measurements of the open loop gain, the common mode rejection ratio (CMRR), and the power supply rejection ratios of operational amplifiers in the frequency domain. New features include an improved method for CMRR measurement, a large frequency range (0.1 Hz to 10 MHz), and the absence of wiring to be changed by the user for the different measurements.<<ETX>>","PeriodicalId":123048,"journal":{"name":"ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128702113","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Evaluations of leakage currents and capacitances on elementary CMOS devices 基本CMOS器件泄漏电流和电容的评估
ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures Pub Date : 1993-03-22 DOI: 10.1109/ICMTS.1993.292905
P. Girard, P. Nouet, A. Khalkhal, F. M. Roche
{"title":"Evaluations of leakage currents and capacitances on elementary CMOS devices","authors":"P. Girard, P. Nouet, A. Khalkhal, F. M. Roche","doi":"10.1109/ICMTS.1993.292905","DOIUrl":"https://doi.org/10.1109/ICMTS.1993.292905","url":null,"abstract":"A method allowing the easy determination of currents and capacitances of integrated structures in the femtoampere and femtofarad ranges, respectively, is developed. It involves some test structures and, as equipment, a standard transistor parameter analyzer. In the case of minimum size diodes for a 1.5- mu m CMOS technology, experimental results show the capabilities of the method, and good consistency with simulation.<<ETX>>","PeriodicalId":123048,"journal":{"name":"ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130200033","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
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