Microelectronics Reliability最新文献_第7页

Long-term (8000 h) reliability and failures of high-power LEDs for outdoor lighting stressed at high ambient temperatures

IF 1.6 4区工程技术

Microelectronics Reliability Pub Date : 2025-03-12 DOI: 10.1016/j.microrel.2025.115634

A. Caria , R. Fraccaroli , G. Pierobon , T. Castellaro , A. Huang , J. Magnien , J. Rosc , Gy Lipák , G. Hantos , J. Hegedüs , C. De Santi , M. Buffolo , N. Trivellin , E. Zanoni , A. Poppe , G. Meneghesso , M. Meneghini

{"title":"Long-term (8000 h) reliability and failures of high-power LEDs for outdoor lighting stressed at high ambient temperatures","authors":"A. Caria , R. Fraccaroli , G. Pierobon , T. Castellaro , A. Huang , J. Magnien , J. Rosc , Gy Lipák , G. Hantos , J. Hegedüs , C. De Santi , M. Buffolo , N. Trivellin , E. Zanoni , A. Poppe , G. Meneghesso , M. Meneghini","doi":"10.1016/j.microrel.2025.115634","DOIUrl":"10.1016/j.microrel.2025.115634","url":null,"abstract":"<div><div>Modern solid-state lighting systems allowed to enhance the energy efficiency of light sources, improve quality and reduce the related costs; however, the reliability of high-power light-emitting diodes (LEDs) is a critical aspect, especially in systems where high powers/small footprints are required.</div><div>In this paper, the long-term reliability of high-power light emitting diodes (LEDs) for outdoor lighting is analyzed. LEDs were stressed for 8000 h near their absolute maximum current, at different ambient temperatures (45 °C, 65 °C, 85 °C and 105 °C). The devices were mounted on metal-core printed circuit boards (PCBs), 8 LEDs per PCB. LEDs were characterized individually by means of I-V characterizations and power spectral density measurements. LEDs stressed at the lowest temperatures, which junction temperature was within absolute maximum rating, showed almost no degradation, whereas LEDs stressed at 85 °C and 105 °C, with junction temperature exceeding absolute maximum, showed an initial gradual degradation, followed by a catastrophic degradation, due to silicone cracking and darkening. X-ray imaging and shear tests highlighted a solder degradation. Remarkably, negligible thermal resistance variation was measured, but junction temperature increased during the stress. This increase was attributed to gradual silicone degradation, that increased silicone lens light absorption in a positive feedback loop, leading to the cracking/darkening of the lens.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"168 ","pages":"Article 115634"},"PeriodicalIF":1.6,"publicationDate":"2025-03-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143611530","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

About the influence of temperature operation and packaging stress on the threshold for catastrophic optical damage in laser diodes

IF 1.6 4区工程技术

Microelectronics Reliability Pub Date : 2025-03-12 DOI: 10.1016/j.microrel.2025.115695

Jorge Souto, José Luis Pura, Julian Anaya, Juan Jimenez

引用次数: 0

Active gate driver for current overshoot suppression of SiC+Si hybrid switches with dynamic gate current regulation

IF 1.6 4区工程技术

Microelectronics Reliability Pub Date : 2025-03-12 DOI: 10.1016/j.microrel.2025.115689

Ping Liu , Yongjie Liu , Qi Cao , Biao Xiao , Mingbin Tang , Chunming Tu , Bin Yu

{"title":"Active gate driver for current overshoot suppression of SiC+Si hybrid switches with dynamic gate current regulation","authors":"Ping Liu , Yongjie Liu , Qi Cao , Biao Xiao , Mingbin Tang , Chunming Tu , Bin Yu","doi":"10.1016/j.microrel.2025.115689","DOIUrl":"10.1016/j.microrel.2025.115689","url":null,"abstract":"<div><div>Hybrid Switch (HyS) is consisted of a high-current Si-insulated gate bipolar transistor (IGBT) and a low-current Silicon Carbide (SiC)-MOSFET connected in parallel, which has been widely studied due to their high efficiency and low cost. In general, to realize the zero-voltage conduction of IGBTs, the switching timing of the Hys is usually chosen to turn on the SiC earlier or at the same instant. However, HyS will have current overcurrent stress problem in practical applications, resulting in the maximum current rating being limited. In this paper, an active drive circuit is proposed to suppress the SiC MOSFET current overshoot by extracting part of the driving current during the SiC current rise phase, so as to ensure the operational reliability of the hybrid switches. A double-pulse test platform was built to verify the proposed driver circuit under different load current conditions. The experimental results show that compared with the conventional gate driver (CGD) circuit, the Si/SiC hybrid switches with the active gate driver(AGD) circuit proposed in this paper suppresses the current overshoot of the SiC by 38.3 %, 28.4 %, and 22 % in the heavy-load, medium-load, and light-load conditions, respectively, when the drain resistance is selected to be 3 Ω. The peak current of the SiC is within the limit of the safe operating area, while the increased switching loss is within the acceptable range.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"168 ","pages":"Article 115689"},"PeriodicalIF":1.6,"publicationDate":"2025-03-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143611528","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Device edge termination effects on TDDB in galvanic isolators based on polymeric dielectrics

IF 1.6 4区工程技术

Microelectronics Reliability Pub Date : 2025-03-12 DOI: 10.1016/j.microrel.2025.115670

Matteo Greatti , Jurij L. Mazzola , Lorenzo Cantù , Marco Salina , Fabrizio Speroni , Michele Lauria , Francesco Guzzi , Donata Asnaghi , Dario Paci , Vincenzo Marano , Alessandro Spinelli , Christian Monzio Compagnoni , Gerardo Malavena

引用次数: 0

Gate lifetime investigation at low temperature for p-GaN HEMT

IF 1.6 4区工程技术

Microelectronics Reliability Pub Date : 2025-03-11 DOI: 10.1016/j.microrel.2025.115658

M. Alam , V. Rustichelli , M. Zerarka , C. Banc , J. Pieprzyk , O. Perrotin , R. Ceccarelli , D. Trémouilles , M. Matmat , F. Coccetti

{"title":"Gate lifetime investigation at low temperature for p-GaN HEMT","authors":"M. Alam , V. Rustichelli , M. Zerarka , C. Banc , J. Pieprzyk , O. Perrotin , R. Ceccarelli , D. Trémouilles , M. Matmat , F. Coccetti","doi":"10.1016/j.microrel.2025.115658","DOIUrl":"10.1016/j.microrel.2025.115658","url":null,"abstract":"<div><div>This paper investigates the time-dependent gate degradation of Schottky-type p-GaN gate transistors by the application of constant electrical stress until the breakdown of the device, indicated by a sudden increase in the gate leakage current. Tests are performed at voltage levels outside the datasheet limits to accelerate the occurrence of failure. To understand the impact of temperature on the failure mechanism, tests encompass temperature ranges from −55 °C to 80 °C, within datasheet recommendations. Results demonstrate that the lower the temperature, the shorter the lifetime, indicating a negative activation energy. Results also present a non-constant activation energy within the range of tested temperatures, demonstrating a complex temperature dependence of the failure mechanism that might not be unique over this temperature range. A very low lifetime of only one day was estimated at −55 °C at the nominal datasheet voltage. The validity of the projection was experimentally confirmed. This underlines the importance of further investigating the gate behavior at low temperatures, as it could be critical for certain applications. Additionally, this challenges the standard gate reliability tests typically performed at the maximum temperature rating of the device, which do not appear to represent the worst-case condition for the gate lifetime.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"168 ","pages":"Article 115658"},"PeriodicalIF":1.6,"publicationDate":"2025-03-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143592879","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Interface-related VTH shift of SiC MOSFETs during constant current stress extracted from charge pumping measurements

IF 1.6 4区工程技术

Microelectronics Reliability Pub Date : 2025-03-11 DOI: 10.1016/j.microrel.2025.115698

A. Marcuzzi , M. Avramenko , C. De Santi , P. Moens , G. Meneghesso , E. Zanoni , M. Meneghini

引用次数: 0

On the influence of the porosity and homogeneity of sintered die-attach layers on the power cycling performance

IF 1.6 4区工程技术

Microelectronics Reliability Pub Date : 2025-03-10 DOI: 10.1016/j.microrel.2025.115691

L. Mikutta, F. Otto, J. Schadewald

引用次数: 0

On the validity of rainflow counting-based lifetime assessment for power electronics assembly

IF 1.6 4区工程技术

Microelectronics Reliability Pub Date : 2025-03-10 DOI: 10.1016/j.microrel.2025.115651

D. Zhao, S. Letz, J. Leib, B. Eckardt

{"title":"On the validity of rainflow counting-based lifetime assessment for power electronics assembly","authors":"D. Zhao, S. Letz, J. Leib, B. Eckardt","doi":"10.1016/j.microrel.2025.115651","DOIUrl":"10.1016/j.microrel.2025.115651","url":null,"abstract":"<div><div>The lifetime assessment of power electronics based on mission profiles is increasingly applied to obtain realistic lifetime predictions while considering application-close operational scenarios. Generally, mission profile-based lifetime is calculated by individual temperature cycles disassembled from the mission profiles using specific counting methods. Among the different methods, rainflow counting (RC) method is the most common algorithmic procedure for determining damage-relevant events in power electronics. However, the conventional RC method does not consider the mechanical sequential effect and transient effect on damage caused by time-dependent material properties, especially at high temperatures during power module operation. In this paper, we investigate the validity of using the RC method for mission profile-based lifetime assessment of power modules. Through finite element (FE) modeling, we explicitly calculate both effects driven by the mission profile. For the selected mission profiles, we find that the lifetime of bond wire calculated by the FE approach shows a difference of 9 %, which cannot be sensed by the conventional RC approach. Furthermore, through a comparison between different approaches, it appears that the lifetime calculated by the RC approach is higher than the lifetime assessed by the FE approach by around 20 %. Simultaneously at the solder, the deviation between both approaches reaches around 95 %.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"168 ","pages":"Article 115651"},"PeriodicalIF":1.6,"publicationDate":"2025-03-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143578646","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

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A geometry-scalable electrothermal compact circuit model of SiC merged-PiN-Schottky diodes accounting for the snapback mechanism: Application to current surge events

IF 1.6 4区工程技术

Microelectronics Reliability Pub Date : 2025-03-10 DOI: 10.1016/j.microrel.2025.115668

A. Borghese, V. Terracciano, M. Boccarossa, A. Irace, V. d'Alessandro

引用次数: 0

Threshold voltage hysteresis investigation of SiC MOSFETs with different structures under various measurement conditions

IF 1.6 4区工程技术

Microelectronics Reliability Pub Date : 2025-03-09 DOI: 10.1016/j.microrel.2025.115657

Dong Xie , Patrick Heimler , Roman Boldyrjew-Mast , Mohamed Alaluss , Sven Thiele , Josef Lutz , Thomas Basler

引用次数: 0