Tianyuan Chen , Mengran Zhou , Hao Fu , Xiaohua Xu , Xinhua Dong , Yunjian Zhao , Gaoqiang Chen , Gong Zhang , Qingyu Shi
{"title":"The thermal cycling response of Sn-Zn, Sn-Ag-Cu and Sn-Bi solder in industrial production","authors":"Tianyuan Chen , Mengran Zhou , Hao Fu , Xiaohua Xu , Xinhua Dong , Yunjian Zhao , Gaoqiang Chen , Gong Zhang , Qingyu Shi","doi":"10.1016/j.microrel.2025.115925","DOIUrl":"10.1016/j.microrel.2025.115925","url":null,"abstract":"<div><div>The reliability of different solder joints assembled with Sn-Zn, Sn-Ag-Cu, and Sn-Bi solders under thermal cycling conditions based on industrial production conditions was analyzed in this study. The results of dye and pull test indicated that there were significant differences in the number, types, and location of fractures at different component joints soldered with different solder. Due to the excellent mechanical properties and unique intermetallic compound (IMC) composition, the number of fractures in Sn-Zn solder joints is remarkably lower than the Sn-Ag-Cu and Sn-Bi solder, indicating that the Sn-Zn system is more reliable under thermal cycling. These findings demonstrated that Sn-Zn solder is more suitable for industrial production of the complex printed circuit boards (PCBs) and has a better durability.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"175 ","pages":"Article 115925"},"PeriodicalIF":1.9,"publicationDate":"2025-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145226995","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
T.S. Copetti , A. Chordia , M. Fieback , M. Taouil , S. Hamdioui , L.M. Bolzani Poehls
{"title":"Exploring the use of extreme temperatures to facilitate fault propagation in ReRAMs","authors":"T.S. Copetti , A. Chordia , M. Fieback , M. Taouil , S. Hamdioui , L.M. Bolzani Poehls","doi":"10.1016/j.microrel.2025.115919","DOIUrl":"10.1016/j.microrel.2025.115919","url":null,"abstract":"<div><div>Resistive Random-Access Memories (ReRAMs) represent a promising candidate to complement and/or replace CMOS-based memories adopted in several emerging applications. Despite all their advantages – mainly CMOS process compatibility, zero standby power, and high scalability and density – the use of ReRAMs in real applications depends on guaranteeing their quality after manufacturing. As observed in CMOS-based memories, ReRAMs are also susceptible to manufacturing deviations, including defects and process variations, that can cause faulty behaviors different from those observed in CMOS technology, increasing not only the manufacturing test complexity but also the time required to perform the test. In this context, this paper proposes to study the use of temperature to facilitate fault propagation in ReRAMs, reducing the required test time. A case study composed of a 3x3 word-based ReRAM with peripheral circuitry implemented based on a 130 nm Predictive Technology Model (PTM) library was adopted. During the proposed study, a total of 17 defects were injected in different positions of the ReRAM cell, and their respective faulty behavior was classified into conventional and unique faults, considering three different temperatures (25, 100, and -40 °C). The obtained results show that the temperature can, depending on the position of the defect, facilitate fault propagation, which reduces the time required for performing manufacturing testing.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"175 ","pages":"Article 115919"},"PeriodicalIF":1.9,"publicationDate":"2025-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145226994","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Jing Sun , Xingyao Zhang , Mengjun Sun , Gang Yu , Yiyuan Wang , Lin Wen , Xuefeng Yu , Qi Guo , Yudong Li
{"title":"Ionizing radiation damage and accuracy degradation in PMOS dosimeter constant current sources under bias-dose rate coupling","authors":"Jing Sun , Xingyao Zhang , Mengjun Sun , Gang Yu , Yiyuan Wang , Lin Wen , Xuefeng Yu , Qi Guo , Yudong Li","doi":"10.1016/j.microrel.2025.115922","DOIUrl":"10.1016/j.microrel.2025.115922","url":null,"abstract":"<div><div>As an important part of PMOS dosimeter, the radiation resistance of constant current source directly affects its measurement accuracy. This paper mainly analyzes the damage variation law of constant current source in space radiation environment, and studies the ionizing radiation effect of constant current source under different bias and dose rate. The results show that the three-terminal adjustable constant current source increases the percentage of current change caused by ionizing radiation when the constant current source is set to operate at a small current, causing more serious degradation.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"175 ","pages":"Article 115922"},"PeriodicalIF":1.9,"publicationDate":"2025-09-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145159528","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Jinlong Zhang , Chenghao Zhang , Zhen Pan , Chun Li , Xiaoqing Si , Zongjing He , Yang Liu , Jian Cao
{"title":"Effect of Bi element on microstructure, strength and failure mechanism of Sn-Cu-In solder alloy","authors":"Jinlong Zhang , Chenghao Zhang , Zhen Pan , Chun Li , Xiaoqing Si , Zongjing He , Yang Liu , Jian Cao","doi":"10.1016/j.microrel.2025.115924","DOIUrl":"10.1016/j.microrel.2025.115924","url":null,"abstract":"<div><div>In this paper, the changes of the microstructure, wettability, and mechanical properties, of the Sn-0.5Cu-3In solder alloy were studied after adding 0.3–0.7 wt% Bi. The addition of Bi to Sn-0.5Cu-3In solder alloy resulted in changes to the microstructure, with a decrease in grain size and an increase in uniformity. The β-Sn phase size also decreased, and the distribution of intermetallic compounds became denser. When the amount of Bi element added is less than 0.5 wt%, the impact performance of the solder alloy changes little, and the impact work reaches a maximum of 62.2 J when 0.5 wt% Bi is added. The shear test results of the solder joints show that the addition of Bi element effectively improves the reliability of the solder joints, and the shear strength reaches a maximum value of 46.8 MPa at the addition of 0.5 wt% of Bi element. This is because the Bi and β-Sn forms a solid solution, resulting in solid solution strengthening. And the Bi element refines the grains of the solder alloy, so the shear strength of the solder joint is significantly improved.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"175 ","pages":"Article 115924"},"PeriodicalIF":1.9,"publicationDate":"2025-09-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145159529","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Biao Li , Zhaolei Zheng , Feng Wang , Zhuangzhuang Li , Jun Liu
{"title":"Research on the lifetime model of IGBT modules based on coupling failure of bonding wire and solder layer","authors":"Biao Li , Zhaolei Zheng , Feng Wang , Zhuangzhuang Li , Jun Liu","doi":"10.1016/j.microrel.2025.115923","DOIUrl":"10.1016/j.microrel.2025.115923","url":null,"abstract":"<div><div>To address the issues of insulated gate bipolar transistor module failure and lifetime prediction, a physical model of the insulated gate bipolar transistor module has been established. Through thermo-electrical structural coupling simulations, the failure mechanisms of the bonding wire and solder layer have been analyzed. Based on the failure mechanisms of both components, a lifetime model for insulated gate bipolar transistor modules, considering the coupling failures of the bonding wire and solder layer, has been constructed. Additionally, the failure model has been fitted using data from power cycling tests, and a comparative analysis has been conducted between the parallel failure lifetime model and the energy-based lifetime model and Coffin-Manson lifetime model in terms of prediction accuracy. The results indicate that the insulated gate bipolar transistor module lifetime model based on parallel failures of the bonding wire and solder layer has an average error of less than 5 %, reducing the error by 7.74 % compared to the classical lifetime model. Furthermore, it shows a 59.38 % reduction in error compared to the energy-based lifetime model that considers only solder layer failure, significantly improving prediction accuracy. The development of the model and its results provide important reference significance for the reliability assessment of insulated gate bipolar transistor modules.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"175 ","pages":"Article 115923"},"PeriodicalIF":1.9,"publicationDate":"2025-09-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145158881","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An FPGA-based architecture for time-resolved polarization probing of FeRAM fatigue","authors":"Yubin Liao , Zerong He , Xiangyin Chen , Zhongguang Xu","doi":"10.1016/j.microrel.2025.115920","DOIUrl":"10.1016/j.microrel.2025.115920","url":null,"abstract":"<div><div>Traditional approaches to assessing Ferroelectric RAM (FeRAM) reliability rely on direct electrical access to individual capacitors. While effective on isolated test structures, such methods are infeasible for high-density, packaged memory arrays, creating a critical gap between device-level physics and system-level reliability assessment. To bridge this gap, we propose Time-Resolved Polarization Probing (TRPP), a novel indirect methodology that infers the internal polarization state by precisely measuring the minimum switching time accessible at the cell terminals. We implement TRPP on a custom FPGA-based platform that integrates a flexible MBIST engine for controlled fatigue stressing with a carry-chain programmable delay generator offering 53<!--> <!-->ps resolution. Experimental results on FeRAM devices demonstrate that TRPP effectively quantifies the progressive degradation of polarization kinetics under stress up to <span><math><mrow><mn>1</mn><msup><mrow><mn>0</mn></mrow><mrow><mn>9</mn></mrow></msup></mrow></math></span> cycles. The measurements further reveal disproportionately severe degradation at lower operating voltages, underscoring critical implications for low-power and compute-in-memory applications. Overall, this work establishes TRPP as a high-resolution, scalable methodology for reliability characterization, bridging the gap between device physics and system-level deployment.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"175 ","pages":"Article 115920"},"PeriodicalIF":1.9,"publicationDate":"2025-09-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145158882","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Dan Zhang , Yudong Li , Haonan Feng , Xiaowen Liang , Chengcheng Shi , Yu Song , Ying Wei , Dong Zhou , Jingyi Xu , Yongheng Luo , Jie Feng , Xuefeng Yu , Qi Guo , Teng Zhang , Bo Wang
{"title":"The dynamic and static radiation damage of silicon carbide MOSFETs with different gate oxide thickness","authors":"Dan Zhang , Yudong Li , Haonan Feng , Xiaowen Liang , Chengcheng Shi , Yu Song , Ying Wei , Dong Zhou , Jingyi Xu , Yongheng Luo , Jie Feng , Xuefeng Yu , Qi Guo , Teng Zhang , Bo Wang","doi":"10.1016/j.microrel.2025.115918","DOIUrl":"10.1016/j.microrel.2025.115918","url":null,"abstract":"<div><div>Radiation effects are a critical issue for SiC MOSFETs in space and nuclear applications. The thickness of the oxide layer is an important factor affecting the radiation resistance of SiC MOSFETs. The thickness of the gate oxide layer will affect the radiation effects of Si MOSFETs, to study the effects of different gate oxide thickness (<em>t</em><sub>ox</sub>) on the total dose radiation damage of SiC MOSFETs, In this paper, we demonstrate the effects of two different <em>t</em><sub>ox</sub> with 50 nm and 70 nm on the dynamic and static characteristics of SiC vertical double-diffused MOS (VDMOS) after gamma irradiation, and the total dose effect radiation damage mechanism is revealed through experiments and simulations, the main reasons for the degradation of static parameters and dynamic characteristics of the devices are identified. The results indicate that gate oxide thickness will also impact the radiation effects of SiC MOSFETs significantly, a thicker gate oxide layer accumulates more captured charge under the total ionizing dose (TID), thus producing a more severe performance degradation. The results can provide a basis for the optimization of the gate oxide thickness and the application of TID radiation-resistant of SiC MOSFETs.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"175 ","pages":"Article 115918"},"PeriodicalIF":1.9,"publicationDate":"2025-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145107578","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Shengze Yang , Chenxiao Li , Yangyi Zhu , Hangtian Shen , Liyong Fang
{"title":"An informer network-based circuit boards fault detection method using infrared temperature series","authors":"Shengze Yang , Chenxiao Li , Yangyi Zhu , Hangtian Shen , Liyong Fang","doi":"10.1016/j.microrel.2025.115890","DOIUrl":"10.1016/j.microrel.2025.115890","url":null,"abstract":"<div><div>As industrial demand for circuit board fault detection increases, infrared thermography has become a crucial non-invasive technique for the efficient identification of internal faults. However, existing methods exhibit limitations in feature extraction, local detail capture, and the modeling of correlations between chips and faults. To address these challenges, a comprehensive method that integrates a preprocessing stage and an enhanced Informer-based model, termed Informer-Fault-Net, is proposed. This method begins with preprocessing the long-term time-series heating data of components, which is collected by infrared cameras during power-on cycles. Subsequently, the processed data is fed into the Informer-Fault-Net model to identify faulty components on circuit boards. Within this network, a Statistic-SENet module is designed to pre-condition the input data by leveraging multiple statistical characteristics of component temperatures, and a channel attention mechanism is embedded within this module to strengthen the correlation between different chips and faults, thereby improving detection accuracy and robustness. Simultaneously, a Fully Convolutional Network (FCN) and an improved distillation mechanism are incorporated into the Informer encoder to enhance the model's capacity for local feature extraction and to reduce computational cost. A multi-scale feature fusion strategy is also employed to improve the model's ability to capture features across multiple scales. To validate the effectiveness of the proposed method, we designed and implemented an experimental hardware platform to collect a temperature time-series dataset from the components of circuit boards for fault detection. Finally, a series of experiments showed that the proposed method achieved an accuracy of 0.990.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"175 ","pages":"Article 115890"},"PeriodicalIF":1.9,"publicationDate":"2025-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145107579","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Mohammad M. Hamasha , Sa'd Hamasha , Khalid Alzoubi , Raghad Massadeh , Khozima Hamasha
{"title":"Comparative analysis of mechanical and thermal stresses in ITO and AZO thin films on flexible PET substrates for flexible electronic applications","authors":"Mohammad M. Hamasha , Sa'd Hamasha , Khalid Alzoubi , Raghad Massadeh , Khozima Hamasha","doi":"10.1016/j.microrel.2025.115921","DOIUrl":"10.1016/j.microrel.2025.115921","url":null,"abstract":"<div><div>This study investigates the mechanical and thermal characteristics of indium tin oxide (ITO) and aluminum-doped zinc oxide (AZO) thin films on flexible polyethylene terephthalate (PET) substrates. The percentage change in electrical resistance (PCER) was investigated through cyclic bending fatigue, thermal cycling, and thermal aging tests to simulate the film's degradation over time under conditions similar to real-life use. Results reveal that AZO films are more prone to crack development and resistance increase under mechanical and thermal stress, especially at elevated temperatures. ITO films proved to be more stable and have smaller PCER values with superior performance under long-term stress. The findings pinpoint ITO's superior mechanical and thermal reliability when compared with AZO and its applicability in long-term flexible electronic devices. This comparative study presents important evidence towards the stability of transparent conductive oxides (TCOs) on flexible substrates and educates the selection of material in stable, resilient, and flexible optoelectronic and photovoltaic devices.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"175 ","pages":"Article 115921"},"PeriodicalIF":1.9,"publicationDate":"2025-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145107577","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Soft fault localization on CMOS differential circuit using dynamic analysis by laser stimulation","authors":"Chi He , Diwei Fan , Kuibo Lan , Sheng Xie","doi":"10.1016/j.microrel.2025.115917","DOIUrl":"10.1016/j.microrel.2025.115917","url":null,"abstract":"<div><div>With the rapid development of semiconductor process, the smaller device geometries make the occurrence of soft fault become more frequent. Although the soft fault localization techniques for digital circuit have been developed, their applications in analogue circuit are limited. In this work a soft fault localization methodology is proposed for CMOS differential circuits based on Dynamic Analysis by Laser Stimulation (DALS) technique. Firstly, the theoretical model for soft fault localization of differential circuit is established, and then its feasibility is verified by DALS experiment on the reference samples fabricated in TSMC 130BCD process. Moreover, the effects of laser scanning power on the sensitivity of MOS transistors' characteristics are investigated in detail. Finally, two real cases fabricated in the same CMOS process are selected to perform the soft fault localization. The failed MOS transistor is successfully located, demonstrating the effectiveness of DALS technique in soft fault localization of CMOS differential circuit.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"175 ","pages":"Article 115917"},"PeriodicalIF":1.9,"publicationDate":"2025-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"145107576","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}