Microelectronics Reliability最新文献

Fatigue lifetime prediction of power modules under power cycling using a volume-weighted averaging technique 功率循环下功率模块疲劳寿命的体积加权平均预测

IF 1.9 4区工程技术

Microelectronics Reliability Pub Date : 2025-07-31 DOI: 10.1016/j.microrel.2025.115866

Guoliao Sun , Wenhui Zhu , Liangcheng Wang , Hongwei Liu , Xianchi Wang

{"title":"Fatigue lifetime prediction of power modules under power cycling using a volume-weighted averaging technique","authors":"Guoliao Sun , Wenhui Zhu , Liangcheng Wang , Hongwei Liu , Xianchi Wang","doi":"10.1016/j.microrel.2025.115866","DOIUrl":"10.1016/j.microrel.2025.115866","url":null,"abstract":"<div><div>With the continuous increase in power density of electric vehicle (EV) power modules, double-sided cooling (DSC) technology has become a focal point of research. However, the commercialization of DSC power modules is significantly hindered by their complex manufacturing processes and high development costs. Traditional power cycling reliability assessment methods, which are costly and time-consuming, are not conducive to rapid technological iteration and advancement. This study proposes a lifetime prediction model based on volume-weighted average strain energy density, utilizing a global volume-weighted averaging technique rather than focusing on the maximum stress and strain locations at solder joints. Through least-squares curve fitting analysis, numerous volume-weighted average strain energy density simulation results were correlated with corresponding power cycling test results, allowing the determination of material-specific fatigue coefficients in the lifetime prediction model. The feasibility of the proposed model was validated using commercially available insulated-gate bipolar transistor (IGBT) power modules. Furthermore, the influence of different buffer materials on the lifetime of DSC IGBT power modules was thoroughly evaluated. This study provides valuable insights for accelerating the development of DSC power modules in the future.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"174 ","pages":"Article 115866"},"PeriodicalIF":1.9,"publicationDate":"2025-07-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144749407","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Modified TCAD simulation approach for 4H-SiC JBS diode to investigate electron trapping effects 改进的4H-SiC JBS二极管TCAD仿真方法研究电子俘获效应

IF 1.9 4区工程技术

Microelectronics Reliability Pub Date : 2025-07-29 DOI: 10.1016/j.microrel.2025.115876

Shikha Kumari , Pierre Brosselard , Dominique Planson , P. Vigneshwara Raja

{"title":"Modified TCAD simulation approach for 4H-SiC JBS diode to investigate electron trapping effects","authors":"Shikha Kumari , Pierre Brosselard , Dominique Planson , P. Vigneshwara Raja","doi":"10.1016/j.microrel.2025.115876","DOIUrl":"10.1016/j.microrel.2025.115876","url":null,"abstract":"<div><div>A modified TCAD approach is developed for 4H-SiC junction barrier Schottky (JBS) diode by placing distinct contacts to the Schottky barrier diode (SBD) and PN junction regions. Like reality, if a common metal contact with work function is specified for top electrode, TCAD model simulates back-to-back serially connected metal/p<sup>+</sup>-type Schottky and PN junction characteristics at the PN regions. Hence, the conventional contact definition simulates only the SBD characteristics with the reduced active area, while PN junctions remain inactive. Using modified contact strategy, the simulated forward I-V is matched with the measurements, and the SBD and PN diode current components are disassociated. The peak electric field occurs at the PN junction during reverse bias; however, reverse current is entirely caused by SBD tunneling current, thereby realizing the typical JBS diode operation. Trap-assisted tunneling (TAT) current induced by omnipresent electron traps (E<sub>C</sub> – 0.19 eV, E<sub>C</sub> – 0.65 eV, and E<sub>C</sub> – 1.65 eV) in 4H-SiC is explored for JBS diodes. The reverse I-V is eventually validated using non-local tunneling model. The TCAD simulations are extended to investigate the electron trapping effects on the I-V properties with increasing trap concentrations. Consequently, the trapping-induced changes in the internal device parameters are probed to correlate with the macroscopic variation in the diode characteristics.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"173 ","pages":"Article 115876"},"PeriodicalIF":1.9,"publicationDate":"2025-07-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144723284","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Condition monitoring of a DC-link capacitor in an inverter with a front-end diode rectifier under imbalanced three-phase supply voltage 三相电源电压不平衡情况下前置二极管整流器逆变器直流电容状态监测

IF 1.6 4区工程技术

Microelectronics Reliability Pub Date : 2025-07-28 DOI: 10.1016/j.microrel.2025.115873

Takuma Yamasoto , Kazunori Hasegawa

引用次数: 0

Toward robust structure function-based thermal analysis: Quantitative metrics for semiconductor packaging evaluation 迈向基于稳健结构功能的热分析：半导体封装评估的定量指标

IF 1.9 4区工程技术

Microelectronics Reliability Pub Date : 2025-07-28 DOI: 10.1016/j.microrel.2025.115867

Wonbin Song , Guesuk Lee , Byeng D. Youn

{"title":"Toward robust structure function-based thermal analysis: Quantitative metrics for semiconductor packaging evaluation","authors":"Wonbin Song , Guesuk Lee , Byeng D. Youn","doi":"10.1016/j.microrel.2025.115867","DOIUrl":"10.1016/j.microrel.2025.115867","url":null,"abstract":"<div><div>Thermal management remains a critical challenge in modern semiconductor packaging, where escalating power densities and advanced 2.5D/3D integrated architectures drive the need for accurate and reliable thermal analysis. Structure function (SF)-based thermal analysis provides valuable insights into internal heat transport mechanisms through transient temperature responses. However, its broader adoption is hindered by limitations in data quality, comparison methodologies, and the interpretability of multilayered structures. This study established a robust framework to improve the precision and utility of SF analysis in semiconductor applications. Optimal transient measurement conditions, such as initial time windows (10<sup>−6</sup>–10<sup>−5</sup> s) and sampling density (≥10 points/decade), were identified to enhance the SF accuracy without excessive computational cost. The influence of the thermal and geometric properties was systematically evaluated, highlighting how the layer contrasts and structural voids impact the SF resolution. To overcome the limitations of existing comparison metrics, two new quantitative approaches— the Area Metric and Dynamic Time Warping Metric—are proposed, demonstrating superior sensitivity to both global and localized thermal structure changes. These findings offer practical guidance for thermal design optimization, enable defect detection, and support the development of standardized, simulation-driven SF methodologies.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"173 ","pages":"Article 115867"},"PeriodicalIF":1.9,"publicationDate":"2025-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144723285","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Effect of Al content on microstructure and solder joint reliability of SAC305-2.0Sb-3.0Bi-0.1Ni solder alloys Al含量对SAC305-2.0Sb-3.0Bi-0.1Ni钎料合金组织及焊点可靠性的影响

IF 1.6 4区工程技术

Microelectronics Reliability Pub Date : 2025-07-26 DOI: 10.1016/j.microrel.2025.115874

Yipeng Xiang , Jiayi Xu , Biao Wang , Jianhua Zhao , Jikang Yan

{"title":"Effect of Al content on microstructure and solder joint reliability of SAC305-2.0Sb-3.0Bi-0.1Ni solder alloys","authors":"Yipeng Xiang , Jiayi Xu , Biao Wang , Jianhua Zhao , Jikang Yan","doi":"10.1016/j.microrel.2025.115874","DOIUrl":"10.1016/j.microrel.2025.115874","url":null,"abstract":"<div><div>Currently, most studies on solder alloy reliability focus on six-element systems, while research on seven-element solder alloy alloys, particularly concerning the influence of Al is limited. To address this gap, this study investigates the effect of Al microalloying on the mechanical and interfacial properties of a newly developed seven-element solder alloy. SAC305-2.0Sb-3.0Bi-0.1Ni was used as the base composition, and varying amounts of Al were added to form the SACSBN-<em>x</em>Al alloy system. Microstructural analysis and mechanical testing were conducted, including X-ray diffraction (XRD), scanning electron microscopy (SEM), and high-temperature aging, to evaluate hardness, tensile strength, and intermetallic compound (IMC) growth behavior. The results show that the addition of Al significantly refines the microstructure and promotes a more uniform phase distribution. Notably, at 0.2 wt% Al addition, the solder exhibited the highest hardness (22.133 HV) and tensile strength (67.575 MPa), indicating substantial performance enhancement. Furthermore, high-temperature aging tests revealed that the IMC growth coefficient at the solder/substrate interface reached a minimum of 0.0128, suggesting improved interfacial stability. These findings demonstrate that Al microalloying, particularly at 0.2 wt%, effectively enhances the reliability and mechanical performance of the solder joint.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"173 ","pages":"Article 115874"},"PeriodicalIF":1.6,"publicationDate":"2025-07-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144711935","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Physics-informed deep learning approach for nanoindentation-based thin film analysis 基于纳米压痕的薄膜分析的物理信息深度学习方法

IF 1.6 4区工程技术

Microelectronics Reliability Pub Date : 2025-07-25 DOI: 10.1016/j.microrel.2025.115875

Yusuf Burak Ozdemir , Oguzhan Orkut Okudur , Mario Gonzalez , Clement Merckling

{"title":"Physics-informed deep learning approach for nanoindentation-based thin film analysis","authors":"Yusuf Burak Ozdemir , Oguzhan Orkut Okudur , Mario Gonzalez , Clement Merckling","doi":"10.1016/j.microrel.2025.115875","DOIUrl":"10.1016/j.microrel.2025.115875","url":null,"abstract":"<div><div>This study presents an application of a physics-informed deep learning framework to improve and accelerate the yield stress characterization of thin films used in microelectronics to ensure long-term mechanical reliability via nanoindentation measurements. By combining finite element modeling (FEM) with neural networks, an accurate model for thin film yield stress has been demonstrated. This model offers comprehensive insights into the mechanical properties and plasticity of thin films under various loading conditions. The decision-making process of the model is investigated using explainable AI visualization techniques, enhancing the model's transparency and interpretability. Nanoindentation experiments on metal and dielectric thin films validate the high accuracy of the proposed deep learning models. This approach allows for the rapid analysis of load-displacement curves in milliseconds while providing high accuracy in yield stress estimations. Consequently, the proposed methodology significantly accelerates the characterization process and provides accurate yield stress estimations for thin film nanoindentation measurements, which is crucial for applications in microelectronics and the reliability of semiconductor devices.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"173 ","pages":"Article 115875"},"PeriodicalIF":1.6,"publicationDate":"2025-07-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144702883","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Accelerated flowers of sulfur test method for power semiconductor modules 功率半导体模块加速硫花试验方法

IF 1.6 4区工程技术

Microelectronics Reliability Pub Date : 2025-07-24 DOI: 10.1016/j.microrel.2025.115870

Daniel T. Kaminski , Christopher Genthe , Benjamin C. Church

{"title":"Accelerated flowers of sulfur test method for power semiconductor modules","authors":"Daniel T. Kaminski , Christopher Genthe , Benjamin C. Church","doi":"10.1016/j.microrel.2025.115870","DOIUrl":"10.1016/j.microrel.2025.115870","url":null,"abstract":"<div><div>In humid sulfur-bearing gas application environments, power semiconductor modules can be susceptible to a corrosion failure mechanism consisting of electrically conductive copper sulfide dendrite filaments formed within insulation trenches leading to electrical shorting. A simple, safe, and low-cost corrosion test method is presented here for reliability testing for this type of failure mechanism. The test method is based on a modified version of ASTM B809–95 that was first reported for use on sulfur resistant thick film chip resistors. Here, the test was further modified to include DC voltage for accelerated reliability testing of commercially available power semiconductor modules. It is shown that the field corrosion failure mechanism can be replicated by this accelerated test within as little as 120 h in fully populated commercial modules and can discern comparative susceptibility of packaging between manufacturers. This test method adds to the collection of accelerated corrosion tests previously reported for investigation of the dendritic filament corrosion failure mechanism and stands as an option that is less complex and less toxic. A three-stage hypothesis for the corrosion dendritic failure mechanism is also presented.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"173 ","pages":"Article 115870"},"PeriodicalIF":1.6,"publicationDate":"2025-07-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144694363","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Low-voltage Schottky p-GaN HEMT properties under extreme repetitive short-circuit operation conditions: 2DEG pinch-off, stability, aging, robustness and failure-modes analysis 极端重复短路操作条件下的低压肖特基p-GaN HEMT性能：2DEG断头、稳定性、老化、鲁棒性和失效模式分析

IF 1.6 4区工程技术

Microelectronics Reliability Pub Date : 2025-07-24 DOI: 10.1016/j.microrel.2025.115871

F. Richardeau , L. Ghizzo , D. Trémouilles , S. Vinnac

引用次数: 0

Conducted EMI assessment of aging power Si-MOSFET in 3 phase inverter 对三相逆变器老化功率Si-MOSFET进行了电磁干扰评估

IF 1.6 4区工程技术

Microelectronics Reliability Pub Date : 2025-07-23 DOI: 10.1016/j.microrel.2025.115872

Mohamed TLIG , Bassem ZITOUNA , Moncef KADI , Mahmoud HAMMOUDA , Jaleleddine BEN HADJ SLAMA

引用次数: 0

RHBD current-mode bandgap with SET isolation using PVT-independent sensors RHBD电流模式带隙与使用pvt独立传感器的SET隔离

IF 1.6 4区工程技术

Microelectronics Reliability Pub Date : 2025-07-23 DOI: 10.1016/j.microrel.2025.115865

Jaime Cardenas Chavez , Ming Yan , Tejinder Sandhu , Adriana Noguera Cundar , Kamal El-Sankary , Li Chen

{"title":"RHBD current-mode bandgap with SET isolation using PVT-independent sensors","authors":"Jaime Cardenas Chavez , Ming Yan , Tejinder Sandhu , Adriana Noguera Cundar , Kamal El-Sankary , Li Chen","doi":"10.1016/j.microrel.2025.115865","DOIUrl":"10.1016/j.microrel.2025.115865","url":null,"abstract":"<div><div>This manuscript introduces a single event transient (SET) detecting circuit which is used in a current- mode bandgap reference circuit to reduce the magnitude of SET-induced voltage pulses at the bandgap output. Switches controlled by the SET detectors are inserted between the bandgap and output. When either a positive or negative voltage transient is detected at bandgap, one of the switches will be turned off to temporarily isolate the bandgap circuit from the output, thus preventing the SET glitches from propagating to the load devices. A capacitor at the output was used to keep the output voltage stable in case of an SET. Once the collected charge is dissipated and the bandgap reference circuit resumes normal operation, the switches will be turned on so that normal reference voltage will be reconnected to the output. This proposed structure was fabricated in a 28-nm FDSOI technology. Simulated results revealed a significant reduction in the SET magnitude. These results were also validated experimentally by using a 105 MeV proton radiation facility, and the SET magnitude at the bandgap reference output can be limited to 10 mV. The implemented SET detector is a versatile structure that can be applicable to DC circuits including LDOs, DC-DC converters and other types of bandgap reference circuits, enhancing their reliability when operating in high radiation environments.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"173 ","pages":"Article 115865"},"PeriodicalIF":1.6,"publicationDate":"2025-07-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144687579","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0