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Analyzing the electrical response of Au-GaAs Schottky diodes to proton irradiation at room temperature
IF 1.6 4区 工程技术
Microelectronics Reliability Pub Date : 2025-02-01 DOI: 10.1016/j.microrel.2025.115593
Driss Saadaoui, Mustapha Elyaqouti, Imade Choulli, Souad Lidaighbi, El Hanafi Arjdal, Dris Ben Hmamou, Abdelfattah Elhammoudy, Ismail Abazine, Brahim Ydir, Khalid Assalaou
{"title":"Analyzing the electrical response of Au-GaAs Schottky diodes to proton irradiation at room temperature","authors":"Driss Saadaoui,&nbsp;Mustapha Elyaqouti,&nbsp;Imade Choulli,&nbsp;Souad Lidaighbi,&nbsp;El Hanafi Arjdal,&nbsp;Dris Ben Hmamou,&nbsp;Abdelfattah Elhammoudy,&nbsp;Ismail Abazine,&nbsp;Brahim Ydir,&nbsp;Khalid Assalaou","doi":"10.1016/j.microrel.2025.115593","DOIUrl":"10.1016/j.microrel.2025.115593","url":null,"abstract":"<div><div>This work investigates the electrical behavior of Schottky diodes fabricated by gold evaporation on n-type GaAs substrates. The substrates were cleaned using proton irradiation with a fluence of 10<sup>15</sup> P/cm<sup>2</sup> and energy range of 0.75–3 MeV. Current-voltage (I-V) analysis revealed significant changes in the electrical properties under various irradiation conditions. Key findings show that the Schottky barrier height decreases as proton fluence increases at constant energy, while it increases with rising proton energy at constant fluence. Additionally, the ideality factor, greater than unity, varies systematically with proton energy. These results highlight complex interactions at the Semiconductor-Metal (SM) interface, likely due to defect generation from proton irradiation. <em>Re</em>-analysis of experimental data confirmed these trends and provided deeper insight into the defect generation process. This study contributes to understanding radiation effects on semiconductor devices, offering insights crucial for optimizing radiation-hardened electronics.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"165 ","pages":"Article 115593"},"PeriodicalIF":1.6,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143275872","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Effect of PCB fastening method and thickness on PCB assembly vibration reliability in thermal environments
IF 1.6 4区 工程技术
Microelectronics Reliability Pub Date : 2025-02-01 DOI: 10.1016/j.microrel.2024.115587
Fang Liu , Runze Gong , Zhongwei Duan , Zhen Wang , Jiacheng Zhou
{"title":"Effect of PCB fastening method and thickness on PCB assembly vibration reliability in thermal environments","authors":"Fang Liu ,&nbsp;Runze Gong ,&nbsp;Zhongwei Duan ,&nbsp;Zhen Wang ,&nbsp;Jiacheng Zhou","doi":"10.1016/j.microrel.2024.115587","DOIUrl":"10.1016/j.microrel.2024.115587","url":null,"abstract":"<div><div>The reliability of solder joints in board-level packaging has always been a research focus, but there is still insufficient research on board-level vibration reliability at service temperatures. This paper investigated the dynamic characteristics and fatigue life of printed circuit board (PCB) assemblies under different fastening methods (with or without plain washer) and board thicknesses in thermal environments. Firstly, effective finite element models were established for diverse PCB fastening methods and thicknesses at 24 °C and 60 °C, and these models were verified by modal experiments. Then, modal analysis and harmonic response analysis were conducted to investigate the effect of PCB fastening methods and thickness on the inherent characteristics of PCB assemblies. Finally, the stresses of solder joints were analyzed by isothermal random vibration simulations, and the three-band method was applied to predict the vibration fatigue life of the solder joints. The results show that the board fastening method and thickness significantly affect the inherent characteristics and vibration reliability of PCB assembly. The addition of plain washers increases the fastening area. At 24 °C and 60 °C, the increase in fastening area and board thickness cause higher natural frequency of the system, lower displacement amplitude and solder stresses, which improve the fatigue life of the solder joints under random vibration loading. The application of the plain washers and the increase in PCB thickness improve the solder joints fatigue life by 8.5 % and 66.7 %, respectively, at 24 °C, and by 6.6 % and 66.5 %, respectively, at 60 °C. In addition, as the temperature rises, the improvement effects of PCB fastening methods and thickness on the fatigue life of solder joints diminish, especially for the case with adding plain washers. This research has important guiding significance for the reliability design of PCB assemblies.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"165 ","pages":"Article 115587"},"PeriodicalIF":1.6,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143275809","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Analysis on thermal simulation of MOSFET based on voids under working conditions
IF 1.6 4区 工程技术
Microelectronics Reliability Pub Date : 2025-02-01 DOI: 10.1016/j.microrel.2024.115585
Shiming Lyu , Xiangyu Yang , Baofan Chen , Shijian Su
{"title":"Analysis on thermal simulation of MOSFET based on voids under working conditions","authors":"Shiming Lyu ,&nbsp;Xiangyu Yang ,&nbsp;Baofan Chen ,&nbsp;Shijian Su","doi":"10.1016/j.microrel.2024.115585","DOIUrl":"10.1016/j.microrel.2024.115585","url":null,"abstract":"<div><div>In automotive electronic water pumps, MOSFET is used as power conversion devices to drive water pump motors, however, the high temperature of the engine will cause the electronic water pump MOSFET to overheat and fail. In order to effectively reduce the overheating failure of MOSFET, a thermal simulation model of printed circuit board MOSFET for automotive electronic water pump controllers was established using FLUENT software. The temperature rise characteristics of MOSFET with different void rates under single and multi-void SMT states were analyzed. The analysis results indicate that the thermal resistance of MOSFET in printed circuit boards increases with the increase of void fraction, and the simulation results are verified through experiments, which are consistent with the simulation results. At the same time, when the void ratio is greater than 10 %, the heat dissipation effect of a single void is more pronounced than that of a void. The thermal analysis of printed circuit board MOSFET provides support for effectively controlling MOSFET temperature rise and reducing MOSFET thermal failure.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"165 ","pages":"Article 115585"},"PeriodicalIF":1.6,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143352106","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Feedback reinforced accelerated aging for improved physical unclonable function stability
IF 1.6 4区 工程技术
Microelectronics Reliability Pub Date : 2025-02-01 DOI: 10.1016/j.microrel.2025.115592
Eric Hunt-Schroeder , Tian Xia
{"title":"Feedback reinforced accelerated aging for improved physical unclonable function stability","authors":"Eric Hunt-Schroeder ,&nbsp;Tian Xia","doi":"10.1016/j.microrel.2025.115592","DOIUrl":"10.1016/j.microrel.2025.115592","url":null,"abstract":"<div><div>The Pre-Amplifier Physical Unclonable Function (Pre-Amp PUF) is a promising new PUF topology with a low native array bit error rate (BER). Stabilization techniques to reduce the BER exist but often require storing the location of repeatable bit locations in non-volatile memory. This ‘helper data’ is expensive in chip area and power. In this paper we study for the first time the effects of aging on the Pre-Amp PUF design and its ability to self-reinforce the initial preferred state automatically. We then propose a novel Feedback Reinforced Accelerated Aging (FRAA) technique wherein the Pre-Amp PUF key error rate can be reduced to “zero” with no external user interaction required. Data is gated from leaving the PUF design during the FRAA process thereby keeping the PUF enrollment process dedicated to the end user. Statistical modeling and aging analysis are performed using a 5-nm FinFET process development kit.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"165 ","pages":"Article 115592"},"PeriodicalIF":1.6,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143351881","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Vibration analysis of low temperature BGA and LGA solder joints at elevated test temperatures
IF 1.6 4区 工程技术
Microelectronics Reliability Pub Date : 2025-02-01 DOI: 10.1016/j.microrel.2024.115586
Martin K. Anselm , Nithin Lakshminarayan , Michael Meilunas
{"title":"Vibration analysis of low temperature BGA and LGA solder joints at elevated test temperatures","authors":"Martin K. Anselm ,&nbsp;Nithin Lakshminarayan ,&nbsp;Michael Meilunas","doi":"10.1016/j.microrel.2024.115586","DOIUrl":"10.1016/j.microrel.2024.115586","url":null,"abstract":"<div><div>Dummy BGA and LGA components containing the low temperature solder alloy known as B37 from Nihon Superior were subjected to sinusoidal vibration testing at three environmental temperatures in order to evaluate the effect of the temperature condition on the relative reliability of their solder joints. Similar test vehicles constructed with SAC305 solder were also evaluated for general comparative purposes with the understanding that the SAC305 and B37 alloys are intended for different applications and usage environments. Significantly discernable resonance frequencies and accelerations differences were observed with respect to alloy and type of component. This was evident across the different environmental temperature vibration test conditions. The identified differences between the alloys and component types underscore the importance of considering all the factors in the B37 and SAC305 behavior under vibration. While this study successfully highlighted variations in the response of BGAs to LGAs for the B37 versus SAC305 alloys, further research is needed to identify the underlying mechanisms causing these differences, potentially involving more detailed analyses or complementary testing approaches.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"165 ","pages":"Article 115586"},"PeriodicalIF":1.6,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143352101","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Effect of TEOS layer on wafer warpage for wafer-to-wafer bonding
IF 1.6 4区 工程技术
Microelectronics Reliability Pub Date : 2025-02-01 DOI: 10.1016/j.microrel.2025.115591
Wei Feng , Haruo Shimamoto , Katsuya Kikuchi
{"title":"Effect of TEOS layer on wafer warpage for wafer-to-wafer bonding","authors":"Wei Feng ,&nbsp;Haruo Shimamoto ,&nbsp;Katsuya Kikuchi","doi":"10.1016/j.microrel.2025.115591","DOIUrl":"10.1016/j.microrel.2025.115591","url":null,"abstract":"<div><div>The key enabling technology for 3D integration is Wafer-to-Wafer (WoW) bonding. One of the main issues for the W2W bonding fabrication process is the wafer warpage. We explore the possibility of wafer warpage reduction considering the large material properties variation of the tetraethoxysilane (TEOS) layer. We investigated the effect of the TEOS layer on the wafer warpage with different equipment and sources in experiments. Furthermore, the effect of the material property of TEOS as the coefficient of thermal expansion (CTE) and Young's modulus on the wafer warpage was analyzed with finite element method (FEM) simulation. We demonstrated quantitatively the variation of wafer warpage with different TEOS layers. We reveal that convex wafer warpage is beneficial for wafer deformation control, as it counteracts the concave warpage caused by the metal materials in W2W bonding. Especially with the development of multi-stacked WoW bonding process for advanced devices with complex structures, controlling the warpage of each wafer becomes more important.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"165 ","pages":"Article 115591"},"PeriodicalIF":1.6,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143275871","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Assessing the reliability of SiC MOSFET through inverter-like accelerated test vs. power cycling test
IF 1.6 4区 工程技术
Microelectronics Reliability Pub Date : 2025-02-01 DOI: 10.1016/j.microrel.2025.115589
Mohammad A. Abbaszada , Nanditha Gajanur , Sudip K. Mazumder
{"title":"Assessing the reliability of SiC MOSFET through inverter-like accelerated test vs. power cycling test","authors":"Mohammad A. Abbaszada ,&nbsp;Nanditha Gajanur ,&nbsp;Sudip K. Mazumder","doi":"10.1016/j.microrel.2025.115589","DOIUrl":"10.1016/j.microrel.2025.115589","url":null,"abstract":"<div><div>Silicon carbide (SiC) MOSFETs are known for their superior performance compared to traditional silicon devices, making them well-suited for a wide range of applications in power electronics. However, there is a lack of long-term reliability studies for SiC MOSFETs under real-world operating conditions. This article introduces an innovative inverter-like accelerated test (IAT) and compares it with the standard power cycling test (PCT) to thoroughly assess the degradation mechanisms and reliability of SiC MOSFETs. The IAT is designed to replicate the operational conditions of an inverter, providing a more realistic evaluation of the long-term performance of the SiC MOSFET. There are some differences in the principles of these two accelerated tests (ATs). The paper provides detailed insights into these differences and the methodologies used, including the test bench design and junction temperature estimation, and presents the experimental results. The findings highlight significant differences in the degradation behavior observed under IAT and PCT conditions and the lifetime evaluation, underscoring the necessity for realistic testing protocols to ensure reliable lifetime predictions for SiC MOSFETs in practical applications.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"165 ","pages":"Article 115589"},"PeriodicalIF":1.6,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143275509","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Effect of stress interruption on TDDB lifetime during constant voltage stressing in metal-ferroelectric-insulator-semiconductor ferroelectric devices
IF 1.6 4区 工程技术
Microelectronics Reliability Pub Date : 2025-02-01 DOI: 10.1016/j.microrel.2024.115584
Tiang Teck Tan , Tian-Li Wu , Hsien-Yang Liu , Cheng-Yu Yu , Kalya Shubhakar , Nagarajan Raghavan , Kin Leong Pey
{"title":"Effect of stress interruption on TDDB lifetime during constant voltage stressing in metal-ferroelectric-insulator-semiconductor ferroelectric devices","authors":"Tiang Teck Tan ,&nbsp;Tian-Li Wu ,&nbsp;Hsien-Yang Liu ,&nbsp;Cheng-Yu Yu ,&nbsp;Kalya Shubhakar ,&nbsp;Nagarajan Raghavan ,&nbsp;Kin Leong Pey","doi":"10.1016/j.microrel.2024.115584","DOIUrl":"10.1016/j.microrel.2024.115584","url":null,"abstract":"<div><div>TDDB lifetime is an important reliability metric for ferroelectric devices, which is dependent on the complex interplay between a multitude of factors. Mechanisms such as oxygen vacancy generation, charge trapping and detrapping are relevant in the degradation physics of hafnia-based ferroelectric devices. A large difference in Time-to-Failure in Metal – Ferroelectric – Insulator - Semiconductor (MFIS) devices in response to Interrupted and Uninterrupted Constant Voltage Stressing was found, which underscores the significance of stress interruption on the degradation physics occurring in the device. However, the effect of interruptions during stressing in MFIS devices is relatively unexplored. This work aims to pave the way for the development of stressing schemes for the evaluation of ferroelectric devices with closer adherence to practical operating conditions.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"165 ","pages":"Article 115584"},"PeriodicalIF":1.6,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143352104","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Total ionizing dose radiation effect of HfO2/TaOx-based resistive random-access memories
IF 1.6 4区 工程技术
Microelectronics Reliability Pub Date : 2025-02-01 DOI: 10.1016/j.microrel.2025.115590
Xinpei Duan , Yahui Qing , Yong Wang , Ruohao Hong , Jiawei Chen , Pei Yang , Yanan Yin , Xinjie Zhou , Xingqiang Liu , Bei Jiang
{"title":"Total ionizing dose radiation effect of HfO2/TaOx-based resistive random-access memories","authors":"Xinpei Duan ,&nbsp;Yahui Qing ,&nbsp;Yong Wang ,&nbsp;Ruohao Hong ,&nbsp;Jiawei Chen ,&nbsp;Pei Yang ,&nbsp;Yanan Yin ,&nbsp;Xinjie Zhou ,&nbsp;Xingqiang Liu ,&nbsp;Bei Jiang","doi":"10.1016/j.microrel.2025.115590","DOIUrl":"10.1016/j.microrel.2025.115590","url":null,"abstract":"<div><div>Resistive random-access memory (RRAM) demonstrates excellent radiation tolerance characteristics, making it highly suitable for a wide range of applications in harsh radiation environments such as aerospace. This work specifically investigates the impact of total ionizing dose (TID) radiation on the electrical performance of HfO<sub>2</sub>/TaO<sub>x</sub>-based RRAM. Through an analysis of the electrical characteristics before and after irradiation, we thoroughly examine the evolution of performance and the mechanism of radiation damage in two types of HfO<sub>2</sub>/TaO<sub>x</sub>-based RRAMs under high-energy gamma rays. The findings from this study will serve as a valuable reference for the development and radiation hardening of HfO<sub>2</sub>/TaO<sub>x</sub>-based RRAMs designed to operate effectively in harsh radiation environments.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"165 ","pages":"Article 115590"},"PeriodicalIF":1.6,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143352102","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Interface trap charge modeling of surrounding gate-engineered tubular channel junctionless MOSFET exploring temperature induced variations
IF 1.6 4区 工程技术
Microelectronics Reliability Pub Date : 2025-02-01 DOI: 10.1016/j.microrel.2024.115583
Pritha Banerjee, Jayoti Das
{"title":"Interface trap charge modeling of surrounding gate-engineered tubular channel junctionless MOSFET exploring temperature induced variations","authors":"Pritha Banerjee,&nbsp;Jayoti Das","doi":"10.1016/j.microrel.2024.115583","DOIUrl":"10.1016/j.microrel.2024.115583","url":null,"abstract":"<div><div>Current research presents the mathematical modeling highlighting the interface trap charge degraded characteristics of Surrounding Gate-Engineered Tubular Channel Junctionless MOSFET including temperature variation. Salient device features such as drain current, Ion/Ioff ratio, transconductance, off-current temperature sensitivity, threshold voltage have been explored to investigate the temperature influences comparing the damaged and undamaged configuration of the device. Extent of subthreshold swing variations under thermal influence has been analyzed. Impact of channel length scaling, channel thickness and oxide-thickness variation on device features have also been reported in this research. Analytical outputs have been corroborated using simulation outputs from Silvaco Atlas 3D.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"165 ","pages":"Article 115583"},"PeriodicalIF":1.6,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143352105","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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