Microelectronics Reliability最新文献

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Effect of electro-mechanical coupling on the electrical performance and microvoid evolution of Sn3.0Ag0.5Cu solder joint 机电耦合对Sn3.0Ag0.5Cu焊点电学性能及微空洞演变的影响
IF 1.6 4区 工程技术
Microelectronics Reliability Pub Date : 2025-07-09 DOI: 10.1016/j.microrel.2025.115861
Weiqi Guo , Peng Liu , Yinghao Bi , Shuaifeng Zhao , Ping Wu
{"title":"Effect of electro-mechanical coupling on the electrical performance and microvoid evolution of Sn3.0Ag0.5Cu solder joint","authors":"Weiqi Guo ,&nbsp;Peng Liu ,&nbsp;Yinghao Bi ,&nbsp;Shuaifeng Zhao ,&nbsp;Ping Wu","doi":"10.1016/j.microrel.2025.115861","DOIUrl":"10.1016/j.microrel.2025.115861","url":null,"abstract":"<div><div>The evolution of microstructure and internal voids in Sn3.0Ag0.5Cu solder joints under electro-mechanical coupling loading conditions was systematically investigated. Experimental results revealed that under electrical loading (1.5 × 10<sup>4</sup> A cm<sup>−2</sup>), the solder joint resistance exhibited initial stability followed by a progressive increase until catastrophic failure through melting and open-circuit formation at 405 h. This phenomenon was accompanied by accelerated Cu dissolution, leading to extensive intermetallic compound formation and significant void growth perpendicular to the current direction. However, under electro-mechanical coupling conditions with an applied force of 5 N and current density of 1.5 × 10<sup>4</sup> A cm<sup>−2</sup>, the solder joint microstructure demonstrated remarkable stability, with void volume variations remaining below 1 %. This enhanced stability was attributed to the external stress gradient effectively counteracting the electron wind force, thus suppressing atomic migration. These findings provide new insights into the beneficial effects of applied stress on solder joint reliability, suggesting a novel approach for enhancing long-term solder joint performance.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"173 ","pages":"Article 115861"},"PeriodicalIF":1.6,"publicationDate":"2025-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144580487","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Free-standing silver nanobelt foils for sintering die bonding of power electronics and its power cycle reliability 电力电子烧结模键合用独立式纳米银带箔及其功率循环可靠性
IF 1.6 4区 工程技术
Microelectronics Reliability Pub Date : 2025-07-07 DOI: 10.1016/j.microrel.2025.115860
Xinda Wang , Yanli Xu , Wei Guo , Zilong Peng , Hongqiang Zhang , Xingwen Zhou
{"title":"Free-standing silver nanobelt foils for sintering die bonding of power electronics and its power cycle reliability","authors":"Xinda Wang ,&nbsp;Yanli Xu ,&nbsp;Wei Guo ,&nbsp;Zilong Peng ,&nbsp;Hongqiang Zhang ,&nbsp;Xingwen Zhou","doi":"10.1016/j.microrel.2025.115860","DOIUrl":"10.1016/j.microrel.2025.115860","url":null,"abstract":"<div><div>Silver nanomaterials are considered as promising joining materials for power electronics due to their excellent thermo-stability and high electrical/thermal conductivity. In this work, a free-standing silver interlayer composed of nanobelts with low organic content is used for sintering die bonding of power electronics. The sintered joints exhibit a high shear strength of 29.4 MPa, a low porosity of 5.2 % and high thermal conductivity. These remarkable properties are attributed to the special sintering process and bridging effect of the silver nanobelts. Especially, the face-to-face connection provides a high green density and more diffusion paths for the silver atoms, resulting in a dense silver joint. This free-standing Ag interlayer shows feasibility and capability in electronic packaging and good power cycle reliability under harsh conditions.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"173 ","pages":"Article 115860"},"PeriodicalIF":1.6,"publicationDate":"2025-07-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144570463","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Influence of die and lid shapes on void formation in solder thermal interface materials 模盖形状对焊料热界面材料中空洞形成的影响
IF 1.6 4区 工程技术
Microelectronics Reliability Pub Date : 2025-07-07 DOI: 10.1016/j.microrel.2025.115847
Nurul Ashikin Mohd Nazrul Aman , Mohd Zulkifly Abdullah , Loh Wei Keat , Ooi Chun Keang
{"title":"Influence of die and lid shapes on void formation in solder thermal interface materials","authors":"Nurul Ashikin Mohd Nazrul Aman ,&nbsp;Mohd Zulkifly Abdullah ,&nbsp;Loh Wei Keat ,&nbsp;Ooi Chun Keang","doi":"10.1016/j.microrel.2025.115847","DOIUrl":"10.1016/j.microrel.2025.115847","url":null,"abstract":"<div><div>Thermal interface material (TIM) is used to improve heat transfer between surfaces such as die to the lid. Solder-TIM is the popular choice for lidded electronic packages to effectively remove the heat from the compute die during operation due to its high thermal conductivity. However, solder-TIM is susceptible to form voids between the lid and the die which reduces the heat transfer effectiveness. In this study, computational fluid dynamics (CFD) was used to understand the mechanisms and behaviors of solder-TIM voiding for different die and lid shapes. Results from the simulations were validated with error less than 1 % to the experiments. It was found that the die shape is a crucial factor that influences the solder-TIM voiding. At same flatness of 60 μm, concave die resulted more voids at 30 % located near the die centre as compared to 3.66 % voids for convex die located near the die edges. For the lid shapes, it was found that conforming the lid to the die shape reduces the air gaps and which translated to minimum voids. For concave lid matching to convex die of same flatness, significant solder-TIM voids reduction of 0.55 % from 3.66 % was observed. This study signifies the importance of die and lid shapes to understand the solder-TIM voiding behavior and accurate method to mitigate it.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"173 ","pages":"Article 115847"},"PeriodicalIF":1.6,"publicationDate":"2025-07-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144570341","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Electrical and reliability characterization with an optimized extrapolation model of two- and three-dimensional metal-insulator-metal decoupling capacitors with ZrAlxOy high-κ dielectric under BEoL-friendly conditions 基于优化外推模型的ZrAlxOy高介电介质二维和三维金属-绝缘体-金属去耦电容器在beol友好条件下的电气和可靠性表征
IF 1.6 4区 工程技术
Microelectronics Reliability Pub Date : 2025-07-07 DOI: 10.1016/j.microrel.2025.115845
Konstantinos Efstathios Falidas , Kati Kühnel , Matthias Rudolph , Maximilian Everding , André Reck , Malte Czernohorsky , Johannes Heitmann
{"title":"Electrical and reliability characterization with an optimized extrapolation model of two- and three-dimensional metal-insulator-metal decoupling capacitors with ZrAlxOy high-κ dielectric under BEoL-friendly conditions","authors":"Konstantinos Efstathios Falidas ,&nbsp;Kati Kühnel ,&nbsp;Matthias Rudolph ,&nbsp;Maximilian Everding ,&nbsp;André Reck ,&nbsp;Malte Czernohorsky ,&nbsp;Johannes Heitmann","doi":"10.1016/j.microrel.2025.115845","DOIUrl":"10.1016/j.microrel.2025.115845","url":null,"abstract":"<div><div>This study investigates the material properties, electrical characteristics, and reliability/lifetime aspects of ZrAl<sub>x</sub>O<sub>y</sub> dielectric films deposited by atomic layer deposition for Metal-Insulator-Metal decoupling capacitors in advanced CMOS technology under Back-End-of-Line-friendly conditions. Through experimental investigation, including structural and electrical characterization, the impact of Al concentration on capacitance behavior, leakage current, and breakdown characteristics in both 2D and 3D configurations is explored. Results indicate that higher Al concentrations contribute to higher field linearity and reduced leakage in both topologies, while thinner dielectrics exhibit a power-law relationship with breakdown temperature. Notably, 3D samples demonstrate a breakdown behavior less influenced by chemical composition. Lifetime analyses reveal excellent reliability in 2D devices with the highest Al concentration, necessitating higher Al concentrations to improve reliability, especially in challenging deep 3D topologies. These findings underscore the importance of material composition in conjunction with structural stability and their relation to reliability, ensuring stable and long-term performance of decoupling devices.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"173 ","pages":"Article 115845"},"PeriodicalIF":1.6,"publicationDate":"2025-07-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144570412","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Study on the optimization of bending-vibration coupling stress of QFN solder joints based on Taguchi orthogonal experimental design and Harris Hawks Optimization algorithm 基于田口正交试验设计和Harris Hawks优化算法的QFN焊点弯曲-振动耦合应力优化研究
IF 1.6 4区 工程技术
Microelectronics Reliability Pub Date : 2025-07-05 DOI: 10.1016/j.microrel.2025.115839
Jisheng Wei, Chunyue Huang, Chao Gao, Gui Wang
{"title":"Study on the optimization of bending-vibration coupling stress of QFN solder joints based on Taguchi orthogonal experimental design and Harris Hawks Optimization algorithm","authors":"Jisheng Wei,&nbsp;Chunyue Huang,&nbsp;Chao Gao,&nbsp;Gui Wang","doi":"10.1016/j.microrel.2025.115839","DOIUrl":"10.1016/j.microrel.2025.115839","url":null,"abstract":"<div><div>A three-dimensional finite element analysis model of QFN (Quad Flat No-Lead package) solder joints was established, and stress–strain analysis under bending-vibration coupling conditions was conducted. A validation experiment for measuring the bending-vibration coupled strain of QFN solder joints was designed and successfully carried out. Based on Taguchi Orthogonal Experimental Design and analysis of variance and range, the effects of pad length, pad width, and solder joint standoff height on the bending-vibration coupled stress and strain of solder joints were investigated. Taking the bending-vibration coupled stress as the optimization objective, the structural parameters of the solder joints were optimized using the Harris Hawks Optimization (HHO) algorithm. The results show that the solder joint standoff height has the greatest influence on the bending-vibration coupled stress. The optimal parameter combination for the QFN solder joints is: pad length of 0.62 mm, pad width of 0.21 mm, and solder joint standoff height of 0.09 mm. The optimized parameter combination reduced the bending-vibration coupled stress by 34.8%. These findings provide theoretical guidance for reducing the bending-vibration coupled stress in QFN solder joints.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"173 ","pages":"Article 115839"},"PeriodicalIF":1.6,"publicationDate":"2025-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144563138","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Reliability of discrete SiC MOSFETs under severe temperature-shock and power cycling tests 离散SiC mosfet在剧烈温度冲击和功率循环试验下的可靠性
IF 1.6 4区 工程技术
Microelectronics Reliability Pub Date : 2025-07-03 DOI: 10.1016/j.microrel.2025.115844
Patrick Heimler, Sandro Richter, Josef Lutz, Thomas Basler
{"title":"Reliability of discrete SiC MOSFETs under severe temperature-shock and power cycling tests","authors":"Patrick Heimler,&nbsp;Sandro Richter,&nbsp;Josef Lutz,&nbsp;Thomas Basler","doi":"10.1016/j.microrel.2025.115844","DOIUrl":"10.1016/j.microrel.2025.115844","url":null,"abstract":"<div><div>In this work, discrete SiC MOSFETs with an R<sub>DS(ON)</sub> of 60 mΩ and a blocking capability of 1200 V have been subjected to extreme thermal shock tests and additional power cycling tests to study interactions between the failure modes in both tests. In this context, an R<sub>th,jc</sub> (thermal resistance: junction - case) increase of up to 55 %, confirmed by found solder degradation in cross sections, can be noted after the thermal shock test. However, bond wire degradation remains the dominant cause of failure after the power cycling test, even if the solder layer of the test specimens was previously damaged.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"173 ","pages":"Article 115844"},"PeriodicalIF":1.6,"publicationDate":"2025-07-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144534338","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Impact of near interface defects on NO annealed SiC MOSFET mobility 近界面缺陷对NO退火SiC MOSFET迁移率的影响
IF 1.6 4区 工程技术
Microelectronics Reliability Pub Date : 2025-07-02 DOI: 10.1016/j.microrel.2025.115841
Yu-Xin Wen , Bing-Yue Tsui , Kin P. Cheung
{"title":"Impact of near interface defects on NO annealed SiC MOSFET mobility","authors":"Yu-Xin Wen ,&nbsp;Bing-Yue Tsui ,&nbsp;Kin P. Cheung","doi":"10.1016/j.microrel.2025.115841","DOIUrl":"10.1016/j.microrel.2025.115841","url":null,"abstract":"<div><div>The cause of low mobility in SiC MOSFETs, particularly after post-oxidation nitric oxide (NO) annealing, remains a critical question in wide-bandgap device reliability. Previous reports have attributed poor mobility to the formation of fast near-interface traps (NITs) introduced by NO annealing. In this study, we utilize fast drain current–gate voltage (<em>I</em><sub><em>d</em></sub>-<em>V</em><sub><em>g</em></sub>) measurements, which has a simple interpretation, to directly probe these NITs to check if these assertions are true. Our fast drain current–gate voltage measurements show that on the time scales of 10 ns to 500 ns, filling near interface traps leads to &lt;10 % reduction in the mobility, implying that such traps cannot explain the poor mobility in SiC MOSFETs. This finding challenges the attribution of poor mobility solely to fast NITs and point toward alternative mechanisms, such as above band edge states.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"173 ","pages":"Article 115841"},"PeriodicalIF":1.6,"publicationDate":"2025-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144523120","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Stress–strain analysis and optimization of BGA stacked solder joints under extreme temperatures based on orthogonal design and grey relational analysis 基于正交设计和灰色关联分析的极端温度下BGA堆叠焊点应力应变分析与优化
IF 1.6 4区 工程技术
Microelectronics Reliability Pub Date : 2025-07-02 DOI: 10.1016/j.microrel.2025.115846
Yonglin Chen, Chunyue Huang, Chao Gao, Gui Wang
{"title":"Stress–strain analysis and optimization of BGA stacked solder joints under extreme temperatures based on orthogonal design and grey relational analysis","authors":"Yonglin Chen,&nbsp;Chunyue Huang,&nbsp;Chao Gao,&nbsp;Gui Wang","doi":"10.1016/j.microrel.2025.115846","DOIUrl":"10.1016/j.microrel.2025.115846","url":null,"abstract":"<div><div>A finite element analysis (FEA) model of Ball Grid Array (BGA) stacked solder joints was established, and the stress–strain behavior under extreme temperature conditions was simulated. Using an orthogonal experimental design method, the influence and significance ranking of four structural parameters—solder ball diameter, solder joint height, pad diameter, and joint pitch—on the stress and strain of the solder joints were analyzed. Grey relational analysis was employed to determine the correlation between these structural parameters and solder joint stress. A multi-objective optimization of stress and strain was then performed based on orthogonal experimental results to identify the optimal combination of structural parameters. The results show that, with a confidence level of 95 %, solder ball diameter and joint height have a significant effect on stress and strain in BGA stacked solder joints. The influence ranking of the four structural parameters on solder joint stress is as follows: solder ball diameter &gt; solder joint height &gt; joint pitch &gt; pad diameter. The optimal combination of parameters is: solder ball diameter of 0.60 mm, solder joint height of 0.52 mm, pad diameter of 0.50 mm, and joint pitch of 0.96 mm. This configuration reduces the maximum stress and strain under extreme temperature conditions by 14.2 %, thereby effectively improving the reliability of BGA stacked solder joints under extreme temperature conditions.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"173 ","pages":"Article 115846"},"PeriodicalIF":1.6,"publicationDate":"2025-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144523026","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Significance of phase formation in multicomponent lead-free solder alloys 多组分无铅钎料合金相形成的意义
IF 1.6 4区 工程技术
Microelectronics Reliability Pub Date : 2025-07-01 DOI: 10.1016/j.microrel.2025.115843
Farzaneh Zareipour , Hamed Shahmir , Ali Mirzavand-Borujeni , Alireza Derakhshandeh , Farsad Forghani
{"title":"Significance of phase formation in multicomponent lead-free solder alloys","authors":"Farzaneh Zareipour ,&nbsp;Hamed Shahmir ,&nbsp;Ali Mirzavand-Borujeni ,&nbsp;Alireza Derakhshandeh ,&nbsp;Farsad Forghani","doi":"10.1016/j.microrel.2025.115843","DOIUrl":"10.1016/j.microrel.2025.115843","url":null,"abstract":"<div><div>This research focuses on the significance of alloying elements and phase formation in the microstructure, mechanical properties, wettability and interfacial behaviour of multicomponent lead-free solder alloys to address important parameters for achieving high-performance solder joints in electronic packages. For this purpose, five lead-free solder alloys including Sn-0.7Cu, Sn-1.0Ag-0.5Cu, Sn-3.0Ag-0.5Cu, Sn-3.0Ag-0.5Cu-0.8Bi and Sn-4.0Ag-0.5Cu-4.1In (all in wt%) were fabricated and studied in this investigation. Experiments and thermodynamic calculations confirm the formation of different phases including Cu<sub>6</sub>Sn<sub>5</sub> in binary Sn<img>Cu, Cu<sub>6</sub>Sn<sub>5</sub> and Ag<sub>3</sub>Sn in ternary Sn-Ag-Cu and, Cu<sub>6</sub>(Sn,In)<sub>5</sub> and Ag<sub>3</sub>(Sn,In) in quaternary Sn-Ag-Cu-In solder alloys. Nevertheless, the β-Sn matrix can dissolve a small amount of Bi, which effectively produces finer eutectic phases of β-Sn and Cu<sub>6</sub>Sn<sub>5</sub> during solidification in the quaternary Sn-Ag-Cu-Bi solder alloy. In fact, there is a favorable bonding tendency between Sn<img>Ag, Sn<img>Cu and Sn<img>In, which promotes the formation of intermetallic compounds. In addition, the significant difference between the atomic radius of Sn elements with Cu and In (&gt;10 %) promotes the formation of secondary phases. The slightly positive mixing enthalpy of Sn and Bi, together with their similarity in atomic size, allows for slight solubility of Bi in Sn. The addition of 0.8 wt% Bi and 4.1 wt% In reduced the melting points and solidification range of the lead-free solder alloy and led to improved wettability. The quaternary solder alloys exhibit superior thermal and mechanical properties compared to conventional alloys, making them potential replacements for lead-containing solder alloys.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"173 ","pages":"Article 115843"},"PeriodicalIF":1.6,"publicationDate":"2025-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144518057","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Geometry-driven physics-of-failure lifetime analysis of aluminum bonding wires in discrete SiC power electronics 离散碳化硅电力电子中铝键合线的几何驱动失效寿命分析
IF 1.6 4区 工程技术
Microelectronics Reliability Pub Date : 2025-06-30 DOI: 10.1016/j.microrel.2025.115835
Borja Kilian , Youssef Maniar , Jonas Gleichauf , Olaf Wittler , Martin Schneider-Ramelow
{"title":"Geometry-driven physics-of-failure lifetime analysis of aluminum bonding wires in discrete SiC power electronics","authors":"Borja Kilian ,&nbsp;Youssef Maniar ,&nbsp;Jonas Gleichauf ,&nbsp;Olaf Wittler ,&nbsp;Martin Schneider-Ramelow","doi":"10.1016/j.microrel.2025.115835","DOIUrl":"10.1016/j.microrel.2025.115835","url":null,"abstract":"<div><div>Bonding wire reliability remains one of the major challenges in power electronics as device miniaturization progresses and demands on performance increase. Physics-of-failure models are commonly formulated to determine the lifetime of wire bond interconnects, relying on damage metrics derived from finite element models often based on modeling assumptions, especially when dealing with molded packages. These conventional approaches neglect the effect of the actual geometries of the bond foot and encapsulation cavity.</div><div>In this work, the reliability of encapsulated Al bonding wires in SiC power devices is investigated using active power cycling tests. The bonding wire material is characterized across various strain rates and temperatures, while its geometry is measured using high-resolution white light interferometry. Finite element models are solved using a two-stage simulation approach: First, an upstream wire bonding simulation is performed to obtain realistic bond foot and mold cavity geometries, and then the active power cycling tests are simulated. A Coffin–Manson lifetime model is calibrated using damage quantities derived from the simulation results, and the effect of various bond foot geometries on lifetime is analyzed. The results demonstrate that the modeled bond foot geometry can significantly influence lifetime predictions. By addressing the limitations of conventional simplified models, the presented approach offers a more accurate prediction.</div><div>The aim of the presented methodology is to accelerate the design of ECUs for automotive applications with the help of robust simulation models, reducing the experimental effort and ultimately the time to market.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"172 ","pages":"Article 115835"},"PeriodicalIF":1.6,"publicationDate":"2025-06-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144514206","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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