Microelectronics Reliability最新文献

{"title":"Remaining useful life prediction of DC contactor based on LSTM","authors":"Yu Wang ,&nbsp;Yong Xie ,&nbsp;Huimin Liang ,&nbsp;Hangyu Ma","doi":"10.1016/j.microrel.2025.115815","DOIUrl":"10.1016/j.microrel.2025.115815","url":null,"abstract":"<div><div>As a crucial electronic component in DC systems, predicting the Remaining Useful Life (RUL) of DC contactors can significantly enhance the operational reliability of the systems they are part of. Current methods for RUL prediction, which are based on single data points or traditional machine learning, face issues such as the selection of features that are inconvenient to monitor, high application costs, and low accuracy. In response, this paper proposes a method for predicting the RUL of DC contactors using Long Short-Term Memory (LSTM) neural networks. A specific DC contactor is examined as a case study to demonstrate the feasibility of applying this method. The advantage of the proposed method lies in its requirement for only the collection of current signals throughout the full lifecycle of the DC contactor to predict its RUL, resulting in low application costs. Compared to RUL prediction methods based on traditional Back Propagation Neural Networks (BPNN), this method achieves higher accuracy. Moreover, by considering key structural parameters that affect the lifespan of DC contactors, the method provides guidance for contactor design and exhibits better generalization capabilities in the predictive model.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"172 ","pages":"Article 115815"},"PeriodicalIF":1.6,"publicationDate":"2025-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144194684","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Single-particle irradiation effect and anti-irradiation optimization of a heterogeneous dielectric vertical TFET with dual material gate","authors":"Haiwu Xie ,&nbsp;Fujin Yu","doi":"10.1016/j.microrel.2025.115816","DOIUrl":"10.1016/j.microrel.2025.115816","url":null,"abstract":"<div><div>In this paper, the single-particle irradiation effect of a dual material gate heterogeneous dielectric vertical TFET (DMG-HD-VTFET) is investigated. During the irradiation, single-particle having a certain energy value generates electron-hole pairs along the incident path, which results in transient current that can disrupt the device's logic state when the quantity of these pairs becomes sufficiently large. In simulation of single-particle irradiation effect and anti-irradiation optimization, the energy carried by single-particle is represented by the linear energy transfer (LET) value. The typical value of LET is 10 MeV·cm²/mg, which is equivalent to 0.25 pC/μm along incident path. In our simulation, we first investigate the influence of single-particle with different LET energy, then the influence of incident angle variation on single-particle effect is simulated. Further, the influence of incident completion time, incident position and drain bias voltage on single-particle effect is explored. Based on these findings, anti-irradiation optimization for DMG-HD-VTFET is performed, where the dielectric and length of tunneling gate is compromised to enhance the reliability.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"171 ","pages":"Article 115816"},"PeriodicalIF":1.6,"publicationDate":"2025-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144178171","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Fatigue damage of automotive LEDs: Experimental approach and thermomechanical model","authors":"Khalil Maarouf ,&nbsp;Christine Roucoules ,&nbsp;Kouadio Joseph Akrou ,&nbsp;Sergio Sao-Joao ,&nbsp;Helmut Klöcker","doi":"10.1016/j.microrel.2025.115799","DOIUrl":"10.1016/j.microrel.2025.115799","url":null,"abstract":"<div><div>The automotive lighting industry continues to experience significant growth as it embraces new trends focused on higher performance and smarter functionalities.</div><div>Any new products in automotive must undergo severe accelerated tests in order to ensure its reliability under the various conditions that it may be confronted with during its lifetime.</div><div>Due to the coefficient of thermal expansion mismatch between the LED package and the PCB substrate, the solder joint fatigue failure was revealed to be one of the major failure modes during accelerated thermal cycling.</div><div>The present work focuses on analyzing three LEDs (2-pads, 3-pads and 4-pads) configurations subject to thermal cycling test. First, the damage in the solder joints during tests is observed with dye penetration at different stages of cycling. During the tests, monitoring of the variation of ΔV_F was made to follow the performance evolution of LED as a function of cycles. The dye penetration observations were analyzed to follow the evolution of the damage. On the 3 configurations of LEDs (2-pads, 3-pads and 4-pads) a model predicting the damage as function of the ΔV_F was defined and used to establish a damage law.</div><div>The second part is focusing on a thermomechanical modeling of the strains on the solder SAC305 joint occurring during thermal cycles for the 3 configurations of LEDs mounted on the type of IMS PCB.</div><div>Finally, a fatigue analysis is addressed based on the 3 configurations of LEDs on the time to failure in the thermal cycle test. A comparison between three configurations is made and a correlation with test results is performed to evaluate the accuracy of the prediction.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"171 ","pages":"Article 115799"},"PeriodicalIF":1.6,"publicationDate":"2025-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144178046","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Vibration characteristics and lead stress optimization for printed circuit board with PQFP under random loads","authors":"Bin Hu,&nbsp;Yunyun Sun,&nbsp;Shijing Wu","doi":"10.1016/j.microrel.2025.115817","DOIUrl":"10.1016/j.microrel.2025.115817","url":null,"abstract":"<div><div>Random vibration loads are one of the important causes of electronic device failure, and it is necessary to conduct vibration reliability analysis on the circuit boards and their leads that are prone to failure. In this paper, a finite element model of the printed circuit board (PCB) with plastic quad flat package (PQFP) is established, to investigate the reliability design of the PCB under random vibration load. The modal analysis of the circuit board is conducted using the digital image correlation (DIC) technology combined with the force hammer method, which is a non-contact measurement method, to verify the validity of the simulation model and avoid the additional mass caused by contact measurement. Based on the verified model, the optimal parameter configuration of PCB thickness (H1), package thickness (H2), lead width (w), thickness (t), length (l) and foot angle (θ) is obtained by using Taguchi orthogonal method. After the collaborative optimization of the structural parameters of the PCBA, the maximum equivalent stress value of the leads decreased by 33.54 %. Based on the response surface method, a nonlinear mapping relationship between the lead stress and the component placement was established with the offset in the X and Y directions as variables. The response surface results show that the lead stress varies non-monotonically with the component offset, and there exists an optimal placement of the component with the minimum lead stress. Moreover, the maximum stress value of the component leads is highly sensitive to the combined effect of the X and Y offset. The optimal offset from the center position reduces the lead stress by 72 %. In addition, the circuit boards before and after optimization are compared under different random vibration environments, the results show that the lead stress of the optimized circuit board is 48 % smaller than that of the unoptimized circuit board, verifying the effectiveness of the optimization design. The simultaneous optimization provides a systematic framework for early-stage design optimization, reducing development costs and improving reliability.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"171 ","pages":"Article 115817"},"PeriodicalIF":1.6,"publicationDate":"2025-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144185142","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Reduced-order model for solder balls – Potential of projection-based approaches for representing viscoplastic behavior","authors":"Mike Feuchter ,&nbsp;Hanna Baumgartl ,&nbsp;Martin Hanke ,&nbsp;Bernhard Wunderle ,&nbsp;Sven Rzepka","doi":"10.1016/j.microrel.2025.115796","DOIUrl":"10.1016/j.microrel.2025.115796","url":null,"abstract":"<div><div>The increasing complexity of automotive and industrial electronic control units makes traditional finite element analysis impractical for comprehensive design optimization, particularly when addressing thermomechanical reliability. To tackle this issue, a novel approach is introduced that dramatically reduces computational effort while preserving accuracy. The key innovation lies in utilizing a modular system of reduced-order models, which provides a more efficient way to simulate and optimize complex systems. This paper presents projection-based techniques specifically designed to effectively capture the nonlinear material behavior of solder balls, a critical component in electronic assemblies. Employing the Discrete Empirical Interpolation Method enables the representation of all solder balls within an assembly using a single, generalized reduced-order model that captures the highly nonlinear, viscoplastic behavior. This approach reduces the number of elements, leading to significantly faster simulations. Despite the reduction in computational effort, the accuracy of the simulations is maintained, ensuring reliable predictions of the thermomechanical behavior of the solder balls under different loadings. The paper demonstrates the advantages of this method, showing that it can be applied to assemblies with multiple solder balls, offering substantial reductions in the number of elements without compromising accuracy. The results indicate that the proposed approach has great potential for the design process for electronic control units, allowing for more efficient thermomechanical design optimization. Further research will focus on extending the method to handle larger models and investigating its performance for more complex applications.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"171 ","pages":"Article 115796"},"PeriodicalIF":1.6,"publicationDate":"2025-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144185147","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Disentangling bulk and interfacial factors in solder joint reliability of fine pitch packages","authors":"You-Cheol Jang","doi":"10.1016/j.microrel.2025.115791","DOIUrl":"10.1016/j.microrel.2025.115791","url":null,"abstract":"<div><div>This study evaluates the effects of solder alloy composition and pad surface finish on the mechanical strength and thermal aging behavior of solder joints in fine pitch BGA packages. Three lead-free solder alloys—Sn–1.2Ag–0.5Cu–0.05Ni (SAC1205N), Sn–1.0Ag–0.5Cu (SAC105), and Sn–3.0Ag–0.5Cu (SAC305)—were combined with three surface finishes (CuOSP, ENEPIG, and NiAu) to fabricate nine joint configurations. Mechanical integrity was assessed using ball shear testing (BST) and ball pull testing (BPT) both before and after isothermal aging at 150 °C (0–192 h). BST results indicated that solder composition—particularly Ag content—was the dominant factor in bulk joint strength, with SAC305 consistently demonstrating the highest shear resistance due to its Ag₃Sn-reinforced microstructure. In contrast, BPT results emphasized the critical role of pad finish, with NiAu delivering superior interfacial strength through the formation of uniform Ni₃Sn₄ intermetallic layers. Statistical correlation analysis reinforced these trends, revealing a strong correlation between solder alloy and BST (<em>r</em> = 0.781, <em>p</em> = 0.013), and between pad finish and BPT (<em>r</em> = 0.695, <em>p</em> &lt; 0.0001). Thermal aging accelerated strength degradation across all configurations; however, Ni-doped and high-Ag solders showed improved resistance to intermetallic coarsening. Fracture mode analysis and cross-sectional imaging further demonstrated that cohesive bulk failure in SAC305–NiAu joints correlated with stable interfacial morphology, while interfacial separation was more prevalent in CuOSP-based joints due to brittle IMCs and void formation. These insights highlight the stress-mode-dependent nature of solder joint degradation.</div><div>These results elucidate the differentiated contributions of bulk solder alloy and interfacial pad finish to joint performance under distinct mechanical loading conditions. In particular, the SAC305–NiAu and SAC1205N–CuOSP combinations demonstrated superior reliability, rendering them promising candidates for fine-pitch interconnects in high-performance applications. Overall, this study provides material-level design guidance for optimizing solder–pad combinations tailored to shear- or tensile-dominant loading in fine-pitch, high-performance electronic packaging.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"171 ","pages":"Article 115791"},"PeriodicalIF":1.6,"publicationDate":"2025-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144166443","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Impact of constant and pulsed active balancing current patterns on the aging of lithium-ion batteries","authors":"M.A. Hussain,&nbsp;A. Soldati,&nbsp;G. Sozzi","doi":"10.1016/j.microrel.2025.115814","DOIUrl":"10.1016/j.microrel.2025.115814","url":null,"abstract":"<div><div>Lithium-ion batteries (LIB) have been widely used in electric vehicles for the past decade because of their advantageous properties, such as low self-discharge, high power and energy density, long life, wide operating temperature range, and lack of memory effect. However, the available energy and power deteriorate because of inconsistent operations caused by various external factors. For stable operation, it is crucial to focus on the accurate assessment of the state of health (SOH) of LIB, which is a challenging task. This article presents an investigation of the effect of different current patterns (constant- and pulsed-current discharge) on battery performance. Constant current (CC) and pulsed current (PC) cycles were used to represent possible current battery patterns to be used during active cell balancing. This analysis was conducted using a simple and cost-effective method that aims to measure the battery capacity directly by integrating current over time. The findings indicate higher capacity retention and lower thermal stress when the LIB is cycled under PC discharge than under CC discharge. To thoroughly explore the effects of both current patterns, a comparative analysis of the capacity fade and change in internal resistance is considered. Compared with CC discharge, the capacity fade and power loss due to increase in resistance were relatively improved by 2 % and 8.7 %, respectively, under PC discharge. These results show that PC is preferable in active balancing solutions to preserve the LIB lifetime and performance.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"171 ","pages":"Article 115814"},"PeriodicalIF":1.6,"publicationDate":"2025-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144147206","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Effect of load sequence interaction for low ∆Tj's on the reliability of bonded aluminum wires in IGBTs","authors":"A. Halouani,&nbsp;Z. Khatir,&nbsp;R. Lallemand,&nbsp;A. Ibrahim,&nbsp;D. Ingrosso","doi":"10.1016/j.microrel.2025.115793","DOIUrl":"10.1016/j.microrel.2025.115793","url":null,"abstract":"<div><div>This paper focuses on the effects of load sequence on the reliability of insulated gate bipolar transistors (IGBTs). Precisely, the effect of junction temperature swing (<span><math><mo>∆</mo><msub><mi>T</mi><mi>j</mi></msub></math></span>) is investigated in low ranges. A series of power cycling tests have been done; first, two tests with a single <span><math><mo>∆</mo><msub><mi>T</mi><mi>j</mi></msub><mspace></mspace></math></span> conditions are performed in order to serve as test reference. Then, combined power cycling tests with two-level of <span><math><mo>∆</mo><msub><mi>T</mi><mi>j</mi></msub></math></span> are conducted sequentially. The crack propagation for both combined tests specimens is analysed. Results show that a sequencing in <span><math><mo>∆</mo><msub><mi>T</mi><mi>j</mi></msub><mspace></mspace></math></span> of the high-low stress level leads to crack retardation and then a crack acceleration after a number of cycles. In addition, the crack propagation of the low-high stress level follows the same evolution of the high stress crack propagation. These results were correlated to the microstructure parameters using Electron Backscatter Diffraction (EBSD) technique with a focus on the effect of residual stress. Local misorientation, grain size and grain boundaries evolution at the sites of crack propagation confirmed the phenomenon observed for the crack propagation for both combined tests.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"171 ","pages":"Article 115793"},"PeriodicalIF":1.6,"publicationDate":"2025-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144166441","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Effective number of accelerated thermal cycles (ATCs) for accurate prediction of damage and fatigue life of solder joints in IGBT power module","authors":"Sunday E. Nebo,&nbsp;Emeka H. Amalu,&nbsp;David J. Hughes","doi":"10.1016/j.microrel.2025.115798","DOIUrl":"10.1016/j.microrel.2025.115798","url":null,"abstract":"<div><div>Insulated gate bipolar transistor (IGBT) power module is vital to efficient functioning of several critical systems in electric vehicle (EV), photovoltaic (PV) module, and more/all electric aircrafts (MEA/AEA). As reliability qualification of IGBT immensely depends on system's modelling which employs thermal cycling, identification of effective number of accelerated thermal cycles (ATCs) is important to ensure accurate reliability prediction. This investigation advises on the effective number of ATCs for modelling damage and fatigue life of 96.5 % tin, 3 % silver, and 0.5 % copper (SAC305) solder joints in IGBT module. SolidWorks software is used to create four realistic 3-D finite element (FE) models of typical IGBT module. The IEC 60068-2-14 thermal cycle test and Anand's time independent visco-plastic constitutive model are implemented in static structural package in ANSYS mechanical software to simulate the response of the models to 6 ATCs, 12 ATCs, 18 ATCs and 24 ATCs. Thirty ATCs produced magnitudes of von-Mises stress, equivalent plastic strain and accumulated strain energy density which are almost invariant with application of greater number of ATC. Deployment of four fatigue life constitutive equations from Morrow, Coffin-Manson, and Syed generated polynomial model which produced minimum and consistent lives of the IGBT modules at about 30 ATCs. Based on this finding, 30 ATCs are proposed as the effective number. The generated models establish the relationship between the number of ATCs and fatigue life predicted for IGBT module. It is proposed to be used to evaluate the effect of number of ATCs employed and the resultant predicted fatigue life of IGBT module.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"171 ","pages":"Article 115798"},"PeriodicalIF":1.6,"publicationDate":"2025-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144147205","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Development challenges of a one-sided GaN-based high-current density buck converter through multiphysics optimization for electric vehicle applications","authors":"M. Belguith ,&nbsp;S. Eloued ,&nbsp;M. Kadi ,&nbsp;J. Ben Hadj Slama","doi":"10.1016/j.microrel.2025.115792","DOIUrl":"10.1016/j.microrel.2025.115792","url":null,"abstract":"<div><div>GaN's advantages over conventional semiconductors make it an excellent candidate for deployment in the transportation area. This work aims to develop a simple, one-sided DC/DC GaN-based buck converter for manufacturing and prove its feasibility through multiphysics optimization of the chosen topology. To enhance the design, the Ansys “Q3D tool” is employed to estimate parasitic elements, which are subsequently incorporated into an electrical model in the waveform viewer software “LTspice” to evaluate their impact on the switching node signal “Vsw” of the half bridge structure. Next, we will examine the overshoots and ringings by comparing the measured and simulated converter's Vsw and the output signals. We have implemented robust thermal management in this work. Additionally, this study provides an analysis of current density in the layout and heat distribution in the converter circuit. We will present more precise measurement results that align with the simulation in the primary outcomes, showcasing the effectiveness of the converter layout optimization topology.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"171 ","pages":""},"PeriodicalIF":1.6,"publicationDate":"2025-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144138086","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}