Microelectronics Journal最新文献_第5页

A Switchable-core Wideband Class-F23 VCO with 200.8 dBc/Hz Peak FoMT in 130-nm SiGe

IF 1.9 3区工程技术

Microelectronics Journal Pub Date : 2025-02-27 DOI: 10.1016/j.mejo.2025.106613

Lianzhen Zhang, Haipeng Fu, Lang Nie, Zhipeng Wang, Hao Shi, Kaixue Ma

引用次数: 0

An accurate non-uniformity characterization of the temperature field in microsystems based on singular value decomposition

IF 1.9 3区工程技术

Microelectronics Journal Pub Date : 2025-02-27 DOI: 10.1016/j.mejo.2025.106619

Yanrong Pei , Wenchang Li , Jian Liu

{"title":"An accurate non-uniformity characterization of the temperature field in microsystems based on singular value decomposition","authors":"Yanrong Pei , Wenchang Li , Jian Liu","doi":"10.1016/j.mejo.2025.106619","DOIUrl":"10.1016/j.mejo.2025.106619","url":null,"abstract":"<div><div>The significant thermal challenges faced by the new generation of high-density integrated microsystems have become hot research topics in current thermal design, management, and reliability of microsystems. The non-uniformity of temperature field (NUTF) is at the core of these challenges. Accurately characterizing the NUTF of microsystems has been a difficult task. This paper proposes an accurate characterization method for microsystem NUTF based on singular value decomposition (SVD) to enhance the effectiveness and accuracy of traditional NUTF characterization methods. The paper also investigates the impact of the non-uniform distribution of the microsystem's heat flux densities (HFDs) on the temperature field and its complexity using the singular value properties. The results demonstrate that the proposed method can quantitatively characterize the steady-state NUTF and the spatial-temporal transient NUTF of the microsystems. The decay rate of the singular values can effectively identify the non-uniformity of the microsystem's HFDs. The number of singular values above a threshold can quantitatively assess the complexity of the microsystem temperature field.</div></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":"158 ","pages":"Article 106619"},"PeriodicalIF":1.9,"publicationDate":"2025-02-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143527114","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Investigation of LTPS and a-Si TFT pixel circuit for micro-light-emitting-triode with current gain

IF 1.9 3区工程技术

Microelectronics Journal Pub Date : 2025-02-26 DOI: 10.1016/j.mejo.2025.106615

Keren Wang , Jinyu Ye , Wenjuan Su , Yibin Lin , Xiongtu Zhou , Jianpu Lin , Tailiang Guo , Chaoxing Wu , Yongai Zhang

{"title":"Investigation of LTPS and a-Si TFT pixel circuit for micro-light-emitting-triode with current gain","authors":"Keren Wang , Jinyu Ye , Wenjuan Su , Yibin Lin , Xiongtu Zhou , Jianpu Lin , Tailiang Guo , Chaoxing Wu , Yongai Zhang","doi":"10.1016/j.mejo.2025.106615","DOIUrl":"10.1016/j.mejo.2025.106615","url":null,"abstract":"<div><div>The driving capability of Micro-LED displays based on thin film transistor (TFT) often falls short due to limited TFT current output performance. In this study, we propose a 6T2C pixel circuit for micro light-emitting-triode (Micro-LET), which integrates GaN-based LED and bipolar junction transistor (BJT) in a single chip vertically. The proposed pixel circuit, utilizing low-temperature polysilicon (LTPS) TFT, effectively compensates for threshold voltage shifts and mobility variations, thereby addressing the issue of pixel non-uniformity. Circuit simulation results demonstrate that the current error rates (CER) of the emission current are less than 4.71 % and 1.83 %, respectively, when subjected to ±0.5 V threshold voltage change and ±30 % mobility variation. Furthermore, the LTPS TFT can be extended to amorphous silicon (a-Si) TFT in the pixel circuit, showcasing its potential in enabling high-brightness Micro-LED displays driven by a-Si TFT technology with current amplification capabilities. These findings validate the feasibility of cost-effective and highly luminous Micro-LED displays while also alleviating concerns regarding overcapacity issues associated with a-Si TFT.</div></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":"158 ","pages":"Article 106615"},"PeriodicalIF":1.9,"publicationDate":"2025-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143529447","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A power-efficient spiking convolutional neural network accelerator based on temporal parallelism and streaming dataflow

IF 1.9 3区工程技术

Microelectronics Journal Pub Date : 2025-02-25 DOI: 10.1016/j.mejo.2025.106616

Jian Zhang , Yong Wang , Yanlong Zhang , Bo Bi , Qiliang Chen , Yimao Cai

引用次数: 0

A 100-MHz bandwidth continuous-time sigma-delta ADC with 1 V supply in 28 nm CMOS

IF 1.9 3区工程技术

Microelectronics Journal Pub Date : 2025-02-22 DOI: 10.1016/j.mejo.2025.106597

Ben He , Xuan Guo , Hanbo Jia , Xinyu Liu

{"title":"A 100-MHz bandwidth continuous-time sigma-delta ADC with 1 V supply in 28 nm CMOS","authors":"Ben He , Xuan Guo , Hanbo Jia , Xinyu Liu","doi":"10.1016/j.mejo.2025.106597","DOIUrl":"10.1016/j.mejo.2025.106597","url":null,"abstract":"<div><div>A fourth-order continuous-time (CT) sigma-delta modulator (SDM) is presented for RF front-end system-on-chip (SoC) applications. Due to system constraints, only a 1 V power supply is available. To address this, we propose a three-stage operational amplifier with feedforward compensation that operates efficiently at low voltage. This amplifier achieves a DC gain of 78.5 dB and maintains a gain of 53.4 dB at an input signal frequency of 100 MHz, with a unity gain bandwidth of only 4.2 GHz. In contrast, traditional Miller-compensated operational amplifiers would require a unity gain bandwidth as high as 40.7 GHz to achieve similar performance. To mitigate DAC unit cell mismatch, we propose a dynamic element matching (DEM) circuit implementation utilizing a data-weighted averaging (DWA) algorithm. By removing the DEM block from the loop, the delay of this block does not affect the delay of the loop filter. This DEM technique enhances the signal-to-noise and distortion ratio (SNDR) by 13.9 dB and the spurious-free dynamic range (SFDR) by 20 dB. The prototype, implemented using a 28 nm CMOS process, achieves a dynamic range (DR) of 73.7 dB and a peak SNDR of 66.8 dB.</div></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":"158 ","pages":"Article 106597"},"PeriodicalIF":1.9,"publicationDate":"2025-02-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143474105","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Design of wideband high-efficiency power amplifier based on microstrip filter matching network with hybrid rings

IF 1.9 3区工程技术

Microelectronics Journal Pub Date : 2025-02-22 DOI: 10.1016/j.mejo.2025.106614

Sen Xu , JianFeng Wu , Xiang Chen

引用次数: 0

WiseEDA: LLMs in RF Circuit Design

IF 1.9 3区工程技术

Microelectronics Journal Pub Date : 2025-02-22 DOI: 10.1016/j.mejo.2025.106607

Hangjiang Jin, Junchao Wang, Junjie Sheng, Yifan Wu, Jiayu Chen, Yaqi Wang, Jun Liu

引用次数: 0

Power-efficient SAR ADC with noise-reduction scheme based on kT/C noise cancellation and adaptive tracking averaging

IF 1.9 3区工程技术

Microelectronics Journal Pub Date : 2025-02-21 DOI: 10.1016/j.mejo.2025.106599

Anji Huang , Gefeng Zeng , Yi Shen , Angyang Li , Libo Qian , Qing Zou , Zheng Qiu , Min Wang , Shubin Liu , Ruixue Ding , Yinshui Xia , Zhangming Zhu

{"title":"Power-efficient SAR ADC with noise-reduction scheme based on kT/C noise cancellation and adaptive tracking averaging","authors":"Anji Huang , Gefeng Zeng , Yi Shen , Angyang Li , Libo Qian , Qing Zou , Zheng Qiu , Min Wang , Shubin Liu , Ruixue Ding , Yinshui Xia , Zhangming Zhu","doi":"10.1016/j.mejo.2025.106599","DOIUrl":"10.1016/j.mejo.2025.106599","url":null,"abstract":"<div><div>Conventional successive approximation register (SAR) ADCs encounter a compromise between accuracy and power consumption. This work presents an efficient noise-reduction scheme to mitigate sampling noise and comparator noise. The kT/C noise cancellation technique reduces the kT/C noise and facilitates the reduction of the sampling capacitance to one-sixth of its typical value in conventional architectures. LSB repeating and adaptive tracking averaging(ATA) technique are also employed to decouple the correlation between the energy and the noise in the comparator. Post-simulation results indicate that the signal-to-noise distortion ratio (SNDR) and spurious-free dynamic range (SFDR) of the proposed 14-bit prototype SAR ADC attain values of 84.5 dB and 95.5 dB respectively at a Nyquist input rate and a sampling rate of 1 MS/s. The power consumption is 431.6 <span><math><mi>μ</mi></math></span>W with a 1.8 V power supply, resulting in a “Walden” figure of merit (FoMw) of 35.7 fJ/conv-step and a “Schreier” figure of merit (FoMs) of 173.3 dB in a 0.18-<span><math><mi>μ</mi></math></span>m CMOS process.</div></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":"158 ","pages":"Article 106599"},"PeriodicalIF":1.9,"publicationDate":"2025-02-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143471711","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

An area-efficient and process-variable insensitive readout circuit for Computing-in-Memory based on NOR flash

IF 1.9 3区工程技术

Microelectronics Journal Pub Date : 2025-02-21 DOI: 10.1016/j.mejo.2025.106598

Xiaofeng Gu, Hai Zhou, Yang Qiao, Xiaoyu Zhong, Zhiguo Yu

引用次数: 0

Humidity and ring spacing variation tolerant design of a SiC power MOSFET using mirrored floating field rings

IF 1.9 3区工程技术

Microelectronics Journal Pub Date : 2025-02-20 DOI: 10.1016/j.mejo.2025.106611

Prashant Singh , Shreepad Karmalkar , Akshay K

{"title":"Humidity and ring spacing variation tolerant design of a SiC power MOSFET using mirrored floating field rings","authors":"Prashant Singh , Shreepad Karmalkar , Akshay K","doi":"10.1016/j.mejo.2025.106611","DOIUrl":"10.1016/j.mejo.2025.106611","url":null,"abstract":"<div><div>Prior designs of the number and spacing of the Floating Field Rings (FFRs) in the edge termination of SiC MOS-FETs have limitations. They neglect the possible degradation of the breakdown voltage, <em>V</em><sub><em>BR</em></sub>, due to two reasons: (1) widening, <em>α</em>, of the ring due to lateral straggle of dopants during implant-action, and over-etching of the window during the prior lithography step; (2) presence of a negative SiC/SiO<sub>2</sub> interface charge, <em>Q</em><sub><em>H</em></sub>, over a part or whole of the edge termination length due to migration of aluminates formed from reaction of the gate metal with humidity in the environment. We propose an improved algorithm to design a FFR structure considering <em>α</em>. Further, we show that by extending this structure by its mirrored version, we get what we call a Mirrored FFR (MFFR) structure, which is tolerant to <em>Q</em><sub><em>H</em></sub> as well as <em>α</em>. The concept is illustrated using well calibrated TCAD simulations of a 600 V SiC MOSFET with α = 0.3 μm and <em>Q</em><sub><em>H</em></sub> = − 3 × 10<sup>12</sup> cm<sup>−2</sup>; the <em>V</em><sub><em>BR</em></sub> with prior FFR designs degraded by up to 48 % while that with MFFR design by just 16 %. Thus, MFFR structure yields a device with the least overhead factor of <em>V</em><sub><em>BR</em></sub>, that in turn allows realization of a lower specific on-resistance.</div></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":"158 ","pages":"Article 106611"},"PeriodicalIF":1.9,"publicationDate":"2025-02-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143509043","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0