Authentication scheme resistant to machine learning based on obfuscation of multiple PUF responses

Traditional authentication protocols leveraging Physical Unclonable Functions (PUFs) face vulnerabilities to modeling attacks, this paper proposes multi-Arbiter-PUF obfuscation PUF (MAO PUF) architecture. This architecture incorporates $n$ Arbiter PUFs (APUFs) and a $k$-stage Linear Feedback Shift Register (LFSR), where the responses from n APUFs are employed to obfuscate the LFSR's configuration parameters, thereby enhancing resistance against machine learning-based modeling attacks. The (n,k)-MAO PUF architecture was implemented on a Xilinx Virtex-7 Field Programmable Gate Array (FPGA) platform, demonstrating that the (5,3)-MAO PUF achieves an optimal balance between resource overhead and performance metrics. The (5,3)-MAO PUF depends on responses from five APUFs to obfuscate both the initial seed and feedback coefficients of a 3-stage LFSR. This approach reduces the prediction accuracy of three mainstream machine learning attacks to nearly 50 %, while maintaining statistical characteristics close to ideal values. Furthermore, based on the structural characteristics of (n,k)-MAO PUF, we further propose a novel highly secure authentication protocol which is particularly suitable for the Internet of Things (IoT) systems.