采用双反馈积分的二阶CIFF宽输入电压范围δ - σ调制器

IF 1.9 3区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Microelectronics Journal Pub Date : 2025-09-03 DOI:10.1016/j.mejo.2025.106869

Neungin Jeon , Juncheol Kim , Seong Bok , Young-Chan Jang

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引用次数: 0

摘要

提出了一种宽输入电压范围的二阶δ - σ调制器（DSM）。为了实现高分辨率和小面积的特点，它采用了级联积分器前馈（CIFF）架构和3位量化器的逐次逼近寄存器（SAR）模数转换器（ADC）。为了实现宽输入电压范围，所提出的DSM的第一个积分器对每个采样输入执行双反馈积分。这使得使用单个电源的拟议DSM使用来自内部参考驱动器的参考电压，并且在不使用额外电容器的情况下具有两倍于参考电压范围的模拟输入电压范围。二阶DSM采用130 nm CMOS工艺实现，电源电压为1.5 V。当采样频率为500 kHz，过采样比为125 kHz时。对于353 Hz的输入信号，所实现的DSM的测量SNDR约为85.49 dB。有效面积为0.095 mm2，功耗为315.45 μW。

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A second-order CIFF delta-sigma modulator with wide input voltage range using double feedback integration

A second-order delta-sigma modulator (DSM) with a wide input voltage range is proposed for sensor applications. To achieve the characteristics of high resolution and small area, it uses a cascaded-of-integrators feedforward (CIFF) architecture and a successive approximation register (SAR) analog-to-digital converter (ADC) for a 3-bit quantizer. To implement a wide input voltage range, the first integrator of the proposed DSM performs double feedback integration for each sampled input. This makes the proposed DSM, which uses a single power supply, to use the reference voltage from the internal reference driver and have an analog input voltage range twice the reference voltage range without the use of additional capacitors. The second-order DSM is implemented using a 130 nm CMOS process with a supply voltage of 1.5 V. When the sample frequency and oversampling ratio (OSR) are 500 kHz and 125, respectively. The measured SNDR of the implemented DSM is approximately 85.49 dB of SNDR for an input signal of 353 Hz. The active area and power consumption are 0.095 mm² and 315.45 μW, respectively.

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来源期刊

Microelectronics Journal 工程技术-工程：电子与电气

CiteScore

4.00

自引率

27.30%

发文量

222

审稿时长

43 days

期刊介绍： Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.