A 7-bit 8 GHz phase interpolator with eight-phase output using a linear weighting scheme using only 50 % interpolation units

IF 1.9 3区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Microelectronics Journal Pub Date : 2025-09-06 DOI:10.1016/j.mejo.2025.106874

Jie Liu, Xianting Su, Zekai Yang, Zhicheng Dong, Chenxi Han, Xiaoteng Zhao, Shubin Liu

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引用次数: 0

Abstract

This paper proposes a 7-bit four-phase-input, eight-phase-output phase interpolator (PI) that adopts an improved linear weighting scheme to fully utilize the interpolation units and avoid area waste. To improve nonlinearity, the approach leverages the fact that adjacent signals among the eight-phase signals exhibit opposite integral nonlinearity (INL) characteristics using linear weighting. The adjacent signals are first regulated to the same amplitude and then combined to improve the INL of the summation signal. The PI, implemented in a 28 nm CMOS process, is designed to operate at 8 GHz. Post-layout simulation results demonstrate that the PI achieves a peak-to-peak integral nonlinearity (INL_pp) of 2.05 LSB and a peak-to-peak differential nonlinearity (DNL_pp) of 0.48 LSB at 8 GHz, with a power consumption of 30.84 mW, and an area of 0.006 mm². The proposed PI maintains robust performance across PVT, with INL_pp below 2.47LSB and DNL_pp below 0.61LSB. The overall system achieves a jitter of 60.3 fs_rms integrated from 10 kHz to 1 GHz.

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一个7位8 GHz相位插补器，8相位输出，采用线性加权方案，仅使用50%的插补单元

为了充分利用插补单元，避免面积浪费，本文提出了一种采用改进线性加权方案的7位四相输入、八相输出相位插补器（PI）。为了改善非线性，该方法利用线性加权的事实，即八相信号中的相邻信号表现出相反的积分非线性（INL）特征。首先将相邻信号调节到相同的幅度，然后将其组合以提高求和信号的INL。PI采用28纳米CMOS工艺，设计工作频率为8 GHz。布局后仿真结果表明，该PI在8 GHz时实现了2.05 LSB的峰峰积分非线性（INLpp）和0.48 LSB的峰峰差分非线性（DNLpp），功耗为30.84 mW，面积为0.006 mm2。所提出的PI在PVT中保持稳健的性能，INLpp低于2.47LSB， DNLpp低于0.61LSB。整个系统在10khz到1ghz的范围内实现了60.3 fsrms的抖动。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Microelectronics Journal 工程技术-工程：电子与电气

CiteScore

4.00

自引率

27.30%

发文量

222

审稿时长

43 days

期刊介绍： Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.