Shih-Hao Tsai, Zhonghua Li, Ma Mo Mo Ei Phyu, Zihang Fang, S. Hooda, Chun-Kuei Chen, E. Zamburg, A. Thean
{"title":"Back-End-of-Line-Compatible Anneal-Free Ferroelectric Field-Effect Transistor","authors":"Shih-Hao Tsai, Zhonghua Li, Ma Mo Mo Ei Phyu, Zihang Fang, S. Hooda, Chun-Kuei Chen, E. Zamburg, A. Thean","doi":"10.1109/EDTM55494.2023.10103049","DOIUrl":"https://doi.org/10.1109/EDTM55494.2023.10103049","url":null,"abstract":"In this work, we develop an anneal-free back-end-of-line (BEOL) process for ferroelectric hafnium zirconium oxide (HZO)/indium gallium zinc oxide (IGZO)-based ferroelectric field-effect transistor (FeFET), suitable for in-memory computing. The novel anneal-free BEOL FeFET presented in this work stunningly achieves a competitive performance under a record-low thermal budget. Ultra-low subthreshold swing (SS) of 66.2 mV/dec, large on/off current ratio $(mathrm{I}_{text{ON}}/mathrm{I}_{text{OFF}})$ of $> 10^{7}$, large memory window (MW) of $> 1.7$ V, high endurance of $> 10^{7}$ cycles without significant degradation are obtained.","PeriodicalId":418413,"journal":{"name":"2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129862711","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"System-level Performance of Mos2Synaptic Transistors in MLP and DNN Architectures","authors":"Aaseesh Rallapalli, Shubhadeep Bhattacharjee","doi":"10.1109/EDTM55494.2023.10103053","DOIUrl":"https://doi.org/10.1109/EDTM55494.2023.10103053","url":null,"abstract":"Synaptic devices promise drastically lower power consumption in artificial neural networks vis-à-vis CMOS memories. In this work, we have demonstrated $text{MoS}_{2}$ synaptic transistors in n-FET, p-FET, and inverter configurations. Accounting for device non-idealities, we have simulated the system-level performance for MLP and VGG-8 DNN architectures. DNNs are robust to non-idealities with $sim$ 15% higher accuracy but at the cost of increased complexity as compared to MLPs. This work explores the complexity-accuracy trade-offs in ANNs for offsetting non-ideal device behavior.","PeriodicalId":418413,"journal":{"name":"2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115953493","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Organic Transistors with Biopolymer Gate Dielectric for Circuit and Photo-Sensing Applications","authors":"Gargi Konwar, Sachin Rahi, S. P. Tiwari","doi":"10.1109/EDTM55494.2023.10103060","DOIUrl":"https://doi.org/10.1109/EDTM55494.2023.10103060","url":null,"abstract":"Solution-processed organic transistors were demonstrated with a natural protein-based gate dielectric gelatin. These devices have shown exceptional switching in transfer and saturation behaviors in output curves at low operating voltage of −5 V. Resistive load-based inverter behavior was also studied for circuit applicability. Effect of ultra-violet (UV) light on device performance was studied to observe their photo-transistor characteristics. This natural-protein based UV-sensitive transistor open a new era in biodegradable electronics for optoelectronic applications.","PeriodicalId":418413,"journal":{"name":"2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)","volume":"336 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122322325","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Rajeewa Kumar Jaisawal, Sunil Rathore, N. Gandhi, P. Kondekar, Shashank Banchhor, V. B. Sreenivas, Young Suh Song, N. Bagga
{"title":"Self-Heating and Interface Traps Assisted Early Aging Revelation and Reliability Analysis of Negative Capacitance FinFET","authors":"Rajeewa Kumar Jaisawal, Sunil Rathore, N. Gandhi, P. Kondekar, Shashank Banchhor, V. B. Sreenivas, Young Suh Song, N. Bagga","doi":"10.1109/EDTM55494.2023.10103127","DOIUrl":"https://doi.org/10.1109/EDTM55494.2023.10103127","url":null,"abstract":"The realization of a Negative Capacitance (NC) phenomenon in TCAD, considering several realistic aspects of transport physics, remains challenging. In this paper, we investigated the aging and reliability of the NC-FinFET considering the self-heating effect (SHE) and interface trap charges with varying concentration and energy location. In general, the FEPolarization and hydrodynamic models cannot be coupled at the same simulation flow; thus, we employed the iterative approach. Due to SHE, the lattice temperature increases, which impacts the Landau parameters and, in turn, the NC behavior. Moreover, we also evaluated the impact of ambient temperature on device performance with and without (w/o) considering SHE.","PeriodicalId":418413,"journal":{"name":"2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)","volume":"84 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126223300","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Jeong-hwan Hwang, Yong Gon Lee, Sang Ho Lee, Sung Kye Park
{"title":"A Study of the non-Weibull distribution of HK PMOS TDDB","authors":"Jeong-hwan Hwang, Yong Gon Lee, Sang Ho Lee, Sung Kye Park","doi":"10.1109/EDTM55494.2023.10102956","DOIUrl":"https://doi.org/10.1109/EDTM55494.2023.10102956","url":null,"abstract":"In DRAM manufacturing, HK dielectric stacks with HfO2/HfSiOx are being used as a replacement for conventional silicon oxide dielectrics for high speed. One of the major problems is reliability of gate dielectric. Especially, non-Weibull distribution in PMOS TDDB has been observed. This abnormal behavior has been attributed to the effect of HKMG bi-layer structure and the Tinv variation. Finally, we suggest precise method for lifetime extraction in this abnormal case.","PeriodicalId":418413,"journal":{"name":"2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)","volume":"122 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121435130","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
W. Ki, Minjae Choi, Yong-Koun Lee, Kiseop Yoon, Hanchan Hwang, Jisoo Park, Taewook Kang, Jaeyong Park, Younghoon Kim
{"title":"Graphical approach of equipment health monitoring using network analysis","authors":"W. Ki, Minjae Choi, Yong-Koun Lee, Kiseop Yoon, Hanchan Hwang, Jisoo Park, Taewook Kang, Jaeyong Park, Younghoon Kim","doi":"10.1109/EDTM55494.2023.10102976","DOIUrl":"https://doi.org/10.1109/EDTM55494.2023.10102976","url":null,"abstract":"As the complexity of semiconductor devices increases, new approaches are required for monitoring equipment health. In this paper, we adopt the weighted gene co-expression network analysis (WGCNA) for sensor data following in three stages: 1) construction of networks, 2) identification of modules, and 3) detection of abnormal sensors by the graphical approach. Therefore, manufacturing process conditions are able to modify, the similarity between sensors was increased, and in return 0.3% yield rate gain is achieved.","PeriodicalId":418413,"journal":{"name":"2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128702529","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Shinichi Takagi, K. Toprasertpong, E. Nako, M. Takenaka, R. Nakane
{"title":"Hafnia-based ferroelectric devices for lower power memory and AI applications","authors":"Shinichi Takagi, K. Toprasertpong, E. Nako, M. Takenaka, R. Nakane","doi":"10.1109/EDTM55494.2023.10102996","DOIUrl":"https://doi.org/10.1109/EDTM55494.2023.10102996","url":null,"abstract":"We address our recent activities on TiN/HfZrO2 (HZO)/TiN MFM capacitors, HZO/Si FeFETs for memory applications, and reservoir computing using HZO/Si FeFETs for AI applications. We have shown that MFM capacitors with 4-nm-thick HZO realizes low operating voltage and high read/write endurance. We have pointed out the importance of a large amount of electron traps in HZO on the FeFET memory characteristics. Also, we have demonstrated reservoir computing using FeFETs for applications of speech recognition.","PeriodicalId":418413,"journal":{"name":"2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132837862","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
ByongJin Kim, A. Bolotnikov, Helen Jeong, Chandong Kim, Hrishkesh Das, Ganesh Ponram
{"title":"Advanced SiC Power Technology and Package","authors":"ByongJin Kim, A. Bolotnikov, Helen Jeong, Chandong Kim, Hrishkesh Das, Ganesh Ponram","doi":"10.1109/EDTM55494.2023.10103126","DOIUrl":"https://doi.org/10.1109/EDTM55494.2023.10103126","url":null,"abstract":"The new era in power application is being driven by the wide band gap semiconductor material such as SiC and GaN. The major benefits from them are better power efficiency by low Rdson and high breakdown voltage and high temperature stability. Cascode device is one of them to require the more power efficiency and density. This device based on Si has a limit in application by switching loss and Rdson loss. In this paper, various challenges from SiC material, fabrication to assembly are discussed. Also, the co-package integrating SiC and Si MOSFET in a package for better power efficiency has been studied if it is applicable to cascode device.","PeriodicalId":418413,"journal":{"name":"2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130705278","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"MoS2 - based 3D stackable charge-trap memory with AlN interface layer for reducing optical phonon scattering","authors":"Sanggeun Bae, Jungyeop Oh, Mingu Kang, Sungmin Choi","doi":"10.1109/EDTM55494.2023.10103077","DOIUrl":"https://doi.org/10.1109/EDTM55494.2023.10103077","url":null,"abstract":"2D materials are one of the promising alternatives to Si channel for future electronic devices due to their unique characteristics. Herein, we have demonstrated a MoS<inf>2</inf>-based memory device with Al<inf>2</inf>O<inf>3</inf>/HfO<inf>2</inf>/ AlN (A/H/N) as a gate dielectric. We revealed that HfO<inf>2</inf> leads to facilitating memory operation and AlN gives rise to a great electrical performance. With the help of low process temperature, the proposed device can be a milestone in future 3D stackable electronics.","PeriodicalId":418413,"journal":{"name":"2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134368672","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Analysis and Design of Stacked-Nanosheet FeFET Synapse Conductance Response under Identical Pulse Scheme for Neuromorphic Applications","authors":"Hengzhi Lin, P. Su","doi":"10.1109/EDTM55494.2023.10102967","DOIUrl":"https://doi.org/10.1109/EDTM55494.2023.10102967","url":null,"abstract":"This work investigates and analyzes the synapse response under the identical gate pulse stimulation scheme for Stacked-Nanosheet FeFET by using Monte Carlo nucleation-limited-switching (NLS) based model. Our study indicates that thinner EOT of interfacial layer and smaller saturated polarization (Ps) can be used to improve the linearity and symmetry of GDS due to smaller depolarization field. In addition, Stacked-Nanosheet structure can increase effective $mathrm{W}/mathrm{L}$ without footprint penalty to boost $mathrm{G}_{max}/mathrm{G}_{min}$.","PeriodicalId":418413,"journal":{"name":"2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133374677","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}