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IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412)最新文献

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Picosecond time-domain photoconductive sampling method for measuring guided and free-space pulse propagation 测量引导和自由空间脉冲传播的皮秒时域光导采样方法
IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412) Pub Date : 1999-10-25 DOI: 10.1109/EPEP.1999.819194
Joungho Kim, Jongjoo Lee, Heeseok Lee, Woopoung Kim, Jaeyoung Ryu
{"title":"Picosecond time-domain photoconductive sampling method for measuring guided and free-space pulse propagation","authors":"Joungho Kim, Jongjoo Lee, Heeseok Lee, Woopoung Kim, Jaeyoung Ryu","doi":"10.1109/EPEP.1999.819194","DOIUrl":"https://doi.org/10.1109/EPEP.1999.819194","url":null,"abstract":"The picosecond photoconductive method is demonstrated as an efficient and accurate time-domain measurement method with less than 300 fs resolution, and is applied to characterizing guiding structures and to extract scattering parameters over 100 GHz.","PeriodicalId":299335,"journal":{"name":"IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412)","volume":"421 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123097466","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Computation of the frequency response of multiple planes in gigahertz packages and boards 千兆赫封装和电路板中多平面频率响应的计算
IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412) Pub Date : 1999-10-25 DOI: 10.1109/EPEP.1999.819216
Jinseong Choi, M. Swaminathan
{"title":"Computation of the frequency response of multiple planes in gigahertz packages and boards","authors":"Jinseong Choi, M. Swaminathan","doi":"10.1109/EPEP.1999.819216","DOIUrl":"https://doi.org/10.1109/EPEP.1999.819216","url":null,"abstract":"This paper discusses a simple and efficient method for computing the frequency response of a plane pair stack-up in multi-layered packages and boards. This method is suitable for high speed digital systems where the skin effect approximation is valid. The results have been compared to S-parameter measurements and show good correlation in the frequency range 50 MHz-1 GHz. The effects of decoupling capacitors on the frequency response have also been computed.","PeriodicalId":299335,"journal":{"name":"IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132605848","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
Achieving 800 MT/s performance with PGA370 socket 使用PGA370插座实现800 MT/s的性能
IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412) Pub Date : 1999-10-25 DOI: 10.1109/EPEP.1999.819209
C. Chung, A. Waizman
{"title":"Achieving 800 MT/s performance with PGA370 socket","authors":"C. Chung, A. Waizman","doi":"10.1109/EPEP.1999.819209","DOIUrl":"https://doi.org/10.1109/EPEP.1999.819209","url":null,"abstract":"This paper describes the innovative solutions that enabled the implementation of high speed I/O (800 MT/s) performance for an integrated RDRAM controller on an Intel Celeron CPU, under low cost constraints of packaging, socket-able solution and 4-layer motherboard.","PeriodicalId":299335,"journal":{"name":"IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412)","volume":"91 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134453273","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Application of subspace projection approaches for reduced-order modeling of electromagnetic systems 子空间投影方法在电磁系统降阶建模中的应用
IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412) Pub Date : 1999-10-25 DOI: 10.1109/EPEP.1999.819200
T. Zhou, S. Dvorak, J. Prince
{"title":"Application of subspace projection approaches for reduced-order modeling of electromagnetic systems","authors":"T. Zhou, S. Dvorak, J. Prince","doi":"10.1109/EPEP.1999.819200","DOIUrl":"https://doi.org/10.1109/EPEP.1999.819200","url":null,"abstract":"The requirements for fast switching speeds, low voltage, low power, tightly integrated, and mixed analog-digital circuits, have brought the need for electromagnetic computer-aided design capability to integrated circuit design, especially for packaging and interconnect design. For clock frequencies in the GHz regime and rise times of a few tens of ps, full wave electromagnetic analysis may be required for packaging design and interconnection simulation. Subspace projection approaches, including the Pade via Lanczos (PVL), Krylov, and rational Krylov algorithms, have been used for reduced-order modeling of wide-band electromagnetic systems. A frequency segmentation technique has also been used with the Lanczos algorithm to obtain benchmark data and for scattering parameter extraction from the electromagnetic system. From the various techniques, the combined PVL/frequency segmentation technique is the most promising for efficient and accurate modeling of electromagnetic systems.","PeriodicalId":299335,"journal":{"name":"IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131163398","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
77 GHz band surface mountable ceramic package 77 GHz频段表面贴装陶瓷封装
IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412) Pub Date : 1999-10-25 DOI: 10.1109/EPEP.1999.819231
S. Koriyama, K. Kitazawa, H. Minamiue, M. Fujii
{"title":"77 GHz band surface mountable ceramic package","authors":"S. Koriyama, K. Kitazawa, H. Minamiue, M. Fujii","doi":"10.1109/EPEP.1999.819231","DOIUrl":"https://doi.org/10.1109/EPEP.1999.819231","url":null,"abstract":"We have developed a ceramic package for 77 GHz millimeter wave applications. The package has a new terminal structure for surface mount, and a feedthrough for electromagnetic coupling. We confirmed that the surface mounted package shows high transmission characteristics.","PeriodicalId":299335,"journal":{"name":"IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412)","volume":"98 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127238369","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Enhanced skin effect for partial element equivalent circuit (PEEC) models 局部元件等效电路(PEEC)模型的趋肤效应增强
IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412) Pub Date : 1999-10-25 DOI: 10.1109/EPEP.1999.819223
K. Coperich, A. Ruehli, A. Cangellaris
{"title":"Enhanced skin effect for partial element equivalent circuit (PEEC) models","authors":"K. Coperich, A. Ruehli, A. Cangellaris","doi":"10.1109/EPEP.1999.819223","DOIUrl":"https://doi.org/10.1109/EPEP.1999.819223","url":null,"abstract":"A convenient skin effect model for the partial element equivalent circuits (PEEC) technique is the so-called volume filament technique. This approach is an integral part of the basic PEEC model if the conductor cross-sections are subdivided into cells. This model is efficient for geometries and frequencies where the skin depth is moderate compared to the conductor thickness. However, the computational cost may be too high for the case where the skin depth is a small fraction of the cross-section, especially if it is subdivided into uniform cells. In this paper, a model is presented that is suitable for all frequency regimes of interest, and thus is most appropriate for transient interconnect analysis using a full-wave model denoted as (Lp, P, Z/sub s/, /spl tau/)PEEC, to indicate the inclusion of the complex skin effect model Z/sub s/.","PeriodicalId":299335,"journal":{"name":"IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126848328","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 49
An accurate and complete frequency dependent transmission line characterization using S-parameter measurements 使用s参数测量准确和完整的频率相关传输线特性
IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412) Pub Date : 1999-10-25 DOI: 10.1109/EPEP.1999.819210
T. Winkel
{"title":"An accurate and complete frequency dependent transmission line characterization using S-parameter measurements","authors":"T. Winkel","doi":"10.1109/EPEP.1999.819210","DOIUrl":"https://doi.org/10.1109/EPEP.1999.819210","url":null,"abstract":"A very accurate and complete characterization of interconnects is presented. The method is based upon high-frequency S-parameter measurements of two lines of different lengths. The influence of the contact structures of the measurement probes are taken into account with the help of three additional measurements. A comparison of results obtained from measurements on a silicon substrate and from calculations is given and shows excellent agreement.","PeriodicalId":299335,"journal":{"name":"IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128200819","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Power plane decoupling strategy for high speed processor boards 高速处理器板的电源平面去耦策略
IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412) Pub Date : 1999-10-25 DOI: 10.1109/EPEP.1999.819212
Tushar K. Roy, L. Smith
{"title":"Power plane decoupling strategy for high speed processor boards","authors":"Tushar K. Roy, L. Smith","doi":"10.1109/EPEP.1999.819212","DOIUrl":"https://doi.org/10.1109/EPEP.1999.819212","url":null,"abstract":"New generations of high speed processors are requiring more power. Consequently, in order to cope with the high amount of switching currents, efficient decoupling of power planes has become critical for both signal integrity (SI) and EMC. In this paper, an investigation has been conducted to find out the effects of decoupling capacitors on SI. A procedure for optimization of the decoupling capacitors based on the fundamental frequency and harmonic frequencies has been illustrated. The optimized decoupling strategy was then implemented on a dual processor board and was measured on a network analyzer. The authors have examined the effect of the decoupling strategy on SI.","PeriodicalId":299335,"journal":{"name":"IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115118721","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Implementation considerations for RAMBUS/sup TM/-based systems 基于RAMBUS/sup TM/系统的实现注意事项
IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412) Pub Date : 1999-10-25 DOI: 10.1109/EPEP.1999.819184
R. J. Evans, J. Diepenbrock, R. Sharrar
{"title":"Implementation considerations for RAMBUS/sup TM/-based systems","authors":"R. J. Evans, J. Diepenbrock, R. Sharrar","doi":"10.1109/EPEP.1999.819184","DOIUrl":"https://doi.org/10.1109/EPEP.1999.819184","url":null,"abstract":"Implementation of high bandwidth memory architectures presents many new design challenges. These include new memory socket designs, new process control and monitoring capabilities for PC board manufacturers, new tools and techniques for board designers, and investment in test equipment. This paper looks at a number of design challenges encountered in developing Direct RAMBUS/sup TM/ based designs.","PeriodicalId":299335,"journal":{"name":"IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412)","volume":"62 6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132945455","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
High performance socket characterization technique for microprocessors 微处理器的高性能插座表征技术
IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412) Pub Date : 1999-10-25 DOI: 10.1109/EPEP.1999.819208
D. Figueroa, C. Chung, M.D. Cornelius, T. Yew, Yuan-liang Li
{"title":"High performance socket characterization technique for microprocessors","authors":"D. Figueroa, C. Chung, M.D. Cornelius, T. Yew, Yuan-liang Li","doi":"10.1109/EPEP.1999.819208","DOIUrl":"https://doi.org/10.1109/EPEP.1999.819208","url":null,"abstract":"At present, most socket suppliers provide different specifications and measurement data based on their own \"in-house\" characterization set-up, which has resulted in a variety of different data reported. To provide a means for designers to correctly decide on a socket or vendor, a standard specification and standard characterization method are necessary. This standard specification will also correctly represent the physical and electrical behavior of the socket. In this paper, a new socket specification is given. To more accurately estimate the socket parasitics, a new 3D modeling method is proposed. A new measurement technique is defined for precisely extracting a socket's model component values. The measurement technique utilizes a de-embedding process and a unique test fixture to ensure the final parasitic values included only the parasitics of the socket. The difference between modeling and measured socket parasitics is within 10%. This technique has been demonstrated and adopted for all Intel socket suppliers.","PeriodicalId":299335,"journal":{"name":"IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412)","volume":"74 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1999-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115272530","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
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