基于RAMBUS/sup TM/系统的实现注意事项

IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412) Pub Date : 1999-10-25 DOI:10.1109/EPEP.1999.819184

R. J. Evans, J. Diepenbrock, R. Sharrar

{"title":"基于RAMBUS/sup TM/系统的实现注意事项","authors":"R. J. Evans, J. Diepenbrock, R. Sharrar","doi":"10.1109/EPEP.1999.819184","DOIUrl":null,"url":null,"abstract":"Implementation of high bandwidth memory architectures presents many new design challenges. These include new memory socket designs, new process control and monitoring capabilities for PC board manufacturers, new tools and techniques for board designers, and investment in test equipment. This paper looks at a number of design challenges encountered in developing Direct RAMBUS/sup TM/ based designs.","PeriodicalId":299335,"journal":{"name":"IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412)","volume":"62 6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Implementation considerations for RAMBUS/sup TM/-based systems\",\"authors\":\"R. J. Evans, J. Diepenbrock, R. Sharrar\",\"doi\":\"10.1109/EPEP.1999.819184\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Implementation of high bandwidth memory architectures presents many new design challenges. These include new memory socket designs, new process control and monitoring capabilities for PC board manufacturers, new tools and techniques for board designers, and investment in test equipment. This paper looks at a number of design challenges encountered in developing Direct RAMBUS/sup TM/ based designs.\",\"PeriodicalId\":299335,\"journal\":{\"name\":\"IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412)\",\"volume\":\"62 6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-10-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPEP.1999.819184\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEP.1999.819184","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 2

摘要

高带宽存储器架构的实现提出了许多新的设计挑战。这些包括新的内存插座设计，新的过程控制和监控功能的PC板制造商，新的工具和技术的板设计师，和测试设备的投资。本文着眼于在开发基于Direct RAMBUS/sup TM/的设计时遇到的一些设计挑战。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Implementation considerations for RAMBUS/sup TM/-based systems

Implementation of high bandwidth memory architectures presents many new design challenges. These include new memory socket designs, new process control and monitoring capabilities for PC board manufacturers, new tools and techniques for board designers, and investment in test equipment. This paper looks at a number of design challenges encountered in developing Direct RAMBUS/sup TM/ based designs.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412)

自引率

0.00%

发文量