发布求助
文献互助 智能选刊 最新文献

2008 IEEE Radio Frequency Integrated Circuits Symposium最新文献

筛选
英文 中文
Efficient three-state WCDMA PA integrated with high-performance BiHEMT HBT / E-D pHEMT process 高效三态WCDMA PA集成高性能BiHEMT HBT / E-D pHEMT工艺
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561406
T. Apel, T. Henderson, Yunxin Tang, O. Berger
{"title":"Efficient three-state WCDMA PA integrated with high-performance BiHEMT HBT / E-D pHEMT process","authors":"T. Apel, T. Henderson, Yunxin Tang, O. Berger","doi":"10.1109/RFIC.2008.4561406","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561406","url":null,"abstract":"Power amplifiers for WCDMA applications must provide competitive power efficiency at low power levels as well as at full power. This paper presents a novel approach to obtain high PAE performance over a wide power band from three power states. It uses a novel BiHEMT process to co-integrate InGaP/GaAs HBT technology with InGaAs/AlGaAs E/D-Mode pHEMT into a single process. No bias reference voltage is required. Typical ultra-low power mode quiescent current is 5 mA.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125461473","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
A compact 5GHz Q-enhanced standing-wave resonator-based filter in 0.13μm CMOS 基于0.13μm CMOS的紧凑5GHz增q驻波谐振器滤波器
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561475
D. Shi, M. Flynn
{"title":"A compact 5GHz Q-enhanced standing-wave resonator-based filter in 0.13μm CMOS","authors":"D. Shi, M. Flynn","doi":"10.1109/RFIC.2008.4561475","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561475","url":null,"abstract":"A fully-integrated 5 GHz bandpass filter with 0 dB IL and 3 dB bandwidth of 9.5% (1 dB bandwidth of 6%) is reported. The filter employs novel on-chip capacitively-loaded, transmission-line standing-wave resonators and Q-enhancement circuits. A prototype 5 GHz on-chip filter, implemented in 0.13 mum CMOS, dissipates 2.88 mW from a 1.2 V supply, and occupies a die area of 0.3 mm2.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"91 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126889137","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A novel compact complementary Colpitts differential CMOS VCO with low phase-noise performance 一种具有低相位噪声性能的新型紧凑互补Colpitts差分CMOS压控振荡器
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561495
Chien-Cheng Wei, H. Chiu, Yi-Tzu Yang
{"title":"A novel compact complementary Colpitts differential CMOS VCO with low phase-noise performance","authors":"Chien-Cheng Wei, H. Chiu, Yi-Tzu Yang","doi":"10.1109/RFIC.2008.4561495","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561495","url":null,"abstract":"A low phase-noise Ka-band CMOS voltage-controlled oscillator is proposed in this paper. The CMOS VCO core adopts a new complementary Colpitts structure in a 0.18- mum CMOS technology to achieve the differential-ended outputs with low phase-noise performance, as well as operate at much higher frequency. The VCO oscillates from 29.8 to 30 GHz with 200 MHz tuning range. The measured phase-noise at 1-MHz offset is -109 dBc/Hz at 30 GHz and 105.5 dBc/Hz at 29.8 GHz. The power consumption of the VCO core is only 27 mW. To the authorspsila knowledge, the proposed CMOS VCO achieves the best figure of merit (FOM) of -185 dB at 29.95- GHz band.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127037939","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Active mitigation of induced phase distortion in a GSM SoC GSM SoC中诱导相位失真的主动缓解
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561376
O. Eliezer, B. Staszewski, S. Bhatara, I. Bashir, P. Balsara
{"title":"Active mitigation of induced phase distortion in a GSM SoC","authors":"O. Eliezer, B. Staszewski, S. Bhatara, I. Bashir, P. Balsara","doi":"10.1109/RFIC.2008.4561376","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561376","url":null,"abstract":"A novel technique for the mitigation of self-interference in a GSM transmitter is presented. It was designed to mitigate the impact of interference caused by the transmitterpsilas high frequency signals to the on-chip circuitry responsible for generating the PLLpsilas crystal-based reference clock. Excessive jitter experienced in this reference clock causes intolerable modulation distortion, as it is effectively amplified by the PLL that produces the transmitterpsilas modulated carrier. The presented technique, leveraging on specific features of the all-digital PLL (ADPLL), was demonstrated in a GSM system-on-chip (SoC) based on the digital RF processor (DRPtrade) technology in 90 nm CMOS.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126416690","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A 38-Gb/s 2-tap transversal equalizer in 0.13-μm CMOS using a microstrip delay element 采用微带延迟元件的0.13 μm CMOS 38 gb /s双抽头横向均衡器
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561419
G. Ng, A. C. Carusone, E. Rogers
{"title":"A 38-Gb/s 2-tap transversal equalizer in 0.13-μm CMOS using a microstrip delay element","authors":"G. Ng, A. C. Carusone, E. Rogers","doi":"10.1109/RFIC.2008.4561419","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561419","url":null,"abstract":"This paper describes a single-ended integrated transversal 2-tap feed-forward equalizer implemented using a commercial 0.13-mum CMOS process. Equalization of a 38-Gb/s data stream over SMA cables with 14.3 dB of channel loss is demonstrated on-wafer. The equalizer features a microstrip transmission line as the delay element and ldquoline inductorsrdquo for improved impedance matching. The IC measures 1.5 mm times 0.26 mm, and consumes 30 mW of power from a 1.2 V supply.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123714452","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
(Invited) ESD-RFIC Co-design methodology (特邀)ESD-RFIC协同设计方法
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561478
X. Guan, Xin Wang, Lin Lin, Guang Chen, A. Wang, Hainan Liu, Yumei Zhou, Hongyi Chen, Lee Yang, B. Zhao
{"title":"(Invited) ESD-RFIC Co-design methodology","authors":"X. Guan, Xin Wang, Lin Lin, Guang Chen, A. Wang, Hainan Liu, Yumei Zhou, Hongyi Chen, Lee Yang, B. Zhao","doi":"10.1109/RFIC.2008.4561478","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561478","url":null,"abstract":"RF ESD protection circuitry design emerges as a big challenge to RF IC design, where the main problem is associated with performance degradation of RF IC due to ESD-induced parasitics. It has been difficult to incorporate the ESD impacts into RF IC design due to lack of proper co-design approach and ESD device models. This paper presents a new ESD-RFIC co-design methodology, including RF ESD design optimization and characterization, as well as RF I/O re-matching techniques, developed to enable wholechip design optimization of ESD-protected RF IC circuits, which is verified by practical designs in 0.18 mum RFCMOS.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124970089","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
A W-band SiGe 1.5V LNA for imaging applications 用于成像应用的w波段SiGe 1.5V LNA
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561427
J. May, G. Rebeiz
{"title":"A W-band SiGe 1.5V LNA for imaging applications","authors":"J. May, G. Rebeiz","doi":"10.1109/RFIC.2008.4561427","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561427","url":null,"abstract":"This paper presents a 4-stage SiGe W-band amplifier for imaging applications designed in a 200 GHz ft SiGe BiCMOS process (IBM 8HP). The amplifier exhibits a gain of 19 dB at 85-89 GHz, a 3-dB bandwidth of 17 GHz, a NF of 8-10 dB over the measurement band, and consumes only 25 mW of DC power. The amplifier is very small (0.1 mm2 without pads), making it ideal for 8 or 16-element imaging arrays on a single chip. To our knowledge, this is the first demonstration of a high-gain, high-bandwidth W-band amplifier using SiGe technology.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123838477","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 26
A 5.8GHz low-IF multi-data rate GFSK transceiver with clock recovery and integrated 21dBm power amplifier 带时钟恢复和集成21dBm功率放大器的5.8GHz低中频多数据速率GFSK收发器
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561433
C. Quek, S. Farahvash, W. Roberts, M. Romney, D. Walker, C. Otten, R. Wei, D. Schwan, M. Mostafa, D. Haab, J. Liu, H. Liem, R. Koupal
{"title":"A 5.8GHz low-IF multi-data rate GFSK transceiver with clock recovery and integrated 21dBm power amplifier","authors":"C. Quek, S. Farahvash, W. Roberts, M. Romney, D. Walker, C. Otten, R. Wei, D. Schwan, M. Mostafa, D. Haab, J. Liu, H. Liem, R. Koupal","doi":"10.1109/RFIC.2008.4561433","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561433","url":null,"abstract":"A highly integrated 5.8 GHz transceiver capable of supporting multiple data rates has been designed in 0.18 um SiGe BiCMOS for digital cordless phones and streaming audio applications. It also has a clock data recovery (CDR) circuit which can be supplied to baseband chips in conjunction with the digital received data. The transmitter with an integrated power amplifier consumes 185 mA achieving an output power of 20.5 dBm and the receiver consumes 65 mA achieving a sensitivity of -103.5 dBm and -101.5 dBm at 1.536 Mbps and 2.048 Mbps respectively. The active area is 7.3 mm2.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131296895","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 91 GHz receiver front-end in silicon-germanium technology 采用硅锗技术的91 GHz接收机前端
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561426
Jihwan Kim, J. Alvarado, K. Kornegay
{"title":"A 91 GHz receiver front-end in silicon-germanium technology","authors":"Jihwan Kim, J. Alvarado, K. Kornegay","doi":"10.1109/RFIC.2008.4561426","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561426","url":null,"abstract":"A W-band receiver front-end, including a low-noise amplifier (LNA), a coupled-wire Marchand balun and a double-balanced mixer, has been designed and fabricated in IBMpsilas 8 HP 0.12 mum, 200 GHz-fT SiGe technology. The circuit operates in the 87-94 GHz frequency range with a peak conversion gain of 36.3 dB and a minimum single side-band (SSB) noise figure of 10 dB. At 91 GHz the measured 1 dB input compression point is -36 dBm. The entire circuit occupies 1.82 mm2 including bond pads and dissipates only 109.7 mW. To the authorspsila knowledge this front-end achieves the highest conversion gain among published receiver front-ends in silicon-based technology operating beyond 90 GHz.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"452 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125784247","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A transfer-curve-folded DCO in 0.13μm CMOS 0.13μm CMOS中的传递曲线折叠DCO
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561461
J. Zhan, Hsiang-Hui Chang, Ping-Ying Wang
{"title":"A transfer-curve-folded DCO in 0.13μm CMOS","authors":"J. Zhan, Hsiang-Hui Chang, Ping-Ying Wang","doi":"10.1109/RFIC.2008.4561461","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561461","url":null,"abstract":"A DCO which achieves fine frequency resolution, provides interface controls for all-digital PLLs, and has a folded transfer curve to avoid frequency discontinuity is presented. The DCO occupies 520 mum times 780 mum, uses 20 mA current and operates from 3.2 GHz to 4.0 GHz. Its phase noise at 400 kHz, 3 MHz and 20 MHz are -117.3, -135.9 and -153.3 dBc/Hz, respectively. Its frequency coverage range and the phase noise satisfy requirements for GSM/GPRS/EDGE applications.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130977580","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
首页 上一页 下一页 尾页
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整，为了账户安全，请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们：info@booksci.cn Book学术提供免费学术资源搜索服务，方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号：604180095
Book学术官方微信